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Research Article On Designing Feedback Controllers for Master-Slave Synchronization of Memristor-Based Chuas Circuits Ke Ding 1,2 1 School of Information Technology, Jiangxi University of Finance and Economics, Nanchang 330013, China 2 Jiangxi E-commerce High Level Engineering Technology Research Centre, Jiangxi University of Finance and Economics, Nanchang 330013, China Correspondence should be addressed to Ke Ding; [email protected] Received 26 April 2018; Accepted 22 July 2018; Published 16 October 2018 Academic Editor: Viet-Thanh Pham Copyright © 2018 Ke Ding. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. This paper is concerned with designing feedback controllers for master-slave synchronization of two chaotic memristor-based Chuas circuits. The memductance function of memristor-based Chuas circuits is a bounded function with a bounded derivative which is more generalized than those piecewise constant-valued functions or quadratic functions in some existing papers. The main contributions are that one master-slave synchronization criterion is established for two chaotic memristor-based Chuas circuits, and the feedback controller gain is easily obtained by solving a set of linear matrix inequalities. One numerical example is given to illustrate the eectiveness of the design method. 1. Introduction Since the memristor, a missing circuit element, was rst introduced by Chua in 1971 [1] and was realized in 2008 [2], memristor-based Chuas circuits have received some attention, see, for example, [35]. When some equipment of circuits in oscillators were replaced by memristors, complex and dynamical properties were revealed in the circuits. Chaotic attractors have been studied in memristor-based Chuas circuits in which the memductance functions of memristors were characterized by a piecewise constant-valued function [3, 6, 7] or a qua- dratic function [4, 5, 8, 9]. It should be pointed out that the memductance function of memristor can be represented by a bounded function with a bounded derivative [2], which is more generalized than those piecewise constant- valued functions or quadratic functions in some existing papers [3, 4]. However, to the best of authors knowledge, there is no result available in the existing published literature to study memristor-based Chuas circuits with abovemen- tioned memductance function, which is the rst motivation of this paper. Chaotic synchronization and chaos control have received much attention due to its theoretical importance and practi- cal applications [1033]. Due to the existence of memristors, the product of the memductance function and voltage can give rise to chaotical behaviors in circuits. Most research eorts [35, 79, 1719] were made to chaotic behaviors of memristor-based circuits, rather than master-slave syn- chronization and chaos control for two memristor-based circuits. Zhang et al. [6] conducted stability analysis for a single circuit with a piecewise constant-valued memduc- tance function, but they did not consider the synchroniza- tion problem of two circuits. In [15, 16], synchronization of memristor-based Chuas circuits has been investigated, in which the memductance elements were piecewise linear functions. In addition, the memristor with a passive nonline- arity and a piecewise constant-valued memductance function is essential to generate the high signal-to-noise ratio which is not suitable for achieving the secure communication [5]. Therefore, the memristor with nonlinear memductance function which is suitable for secure communication should be worth studying. The memristor in which the memduc- tance function is a bounded function with a bounded Hindawi Complexity Volume 2018, Article ID 5431619, 8 pages https://doi.org/10.1155/2018/5431619

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Page 1: On Designing Feedback Controllers for Master-Slave ...downloads.hindawi.com/journals/complexity/2018/5431619.pdfResearch Article On Designing Feedback Controllers for Master-Slave

Research ArticleOn Designing Feedback Controllers for Master-SlaveSynchronization of Memristor-Based Chua’s Circuits

Ke Ding 1,2

1School of Information Technology, Jiangxi University of Finance and Economics, Nanchang 330013, China2Jiangxi E-commerce High Level Engineering Technology Research Centre, Jiangxi University of Finance and Economics,Nanchang 330013, China

Correspondence should be addressed to Ke Ding; [email protected]

Received 26 April 2018; Accepted 22 July 2018; Published 16 October 2018

Academic Editor: Viet-Thanh Pham

Copyright © 2018 Ke Ding. This is an open access article distributed under the Creative Commons Attribution License, whichpermits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

This paper is concerned with designing feedback controllers for master-slave synchronization of two chaotic memristor-basedChua’s circuits. The memductance function of memristor-based Chua’s circuits is a bounded function with a bounded derivativewhich is more generalized than those piecewise constant-valued functions or quadratic functions in some existing papers. Themain contributions are that one master-slave synchronization criterion is established for two chaotic memristor-based Chua’scircuits, and the feedback controller gain is easily obtained by solving a set of linear matrix inequalities. One numerical exampleis given to illustrate the effectiveness of the design method.

1. Introduction

Since the memristor, a missing circuit element, was firstintroduced by Chua in 1971 [1] and was realized in 2008[2], memristor-based Chua’s circuits have received someattention, see, for example, [3–5].

When some equipment of circuits in oscillators werereplaced by memristors, complex and dynamical propertieswere revealed in the circuits. Chaotic attractors have beenstudied in memristor-based Chua’s circuits in which thememductance functions of memristors were characterizedby a piecewise constant-valued function [3, 6, 7] or a qua-dratic function [4, 5, 8, 9]. It should be pointed out thatthe memductance function of memristor can be representedby a bounded function with a bounded derivative [2],which is more generalized than those piecewise constant-valued functions or quadratic functions in some existingpapers [3, 4]. However, to the best of author’s knowledge,there is no result available in the existing published literatureto study memristor-based Chua’s circuits with abovemen-tioned memductance function, which is the first motivationof this paper.

Chaotic synchronization and chaos control have receivedmuch attention due to its theoretical importance and practi-cal applications [10–33]. Due to the existence of memristors,the product of the memductance function and voltage cangive rise to chaotical behaviors in circuits. Most researchefforts [3–5, 7–9, 17–19] were made to chaotic behaviorsof memristor-based circuits, rather than master-slave syn-chronization and chaos control for two memristor-basedcircuits. Zhang et al. [6] conducted stability analysis for asingle circuit with a piecewise constant-valued memduc-tance function, but they did not consider the synchroniza-tion problem of two circuits. In [15, 16], synchronizationof memristor-based Chua’s circuits has been investigated,in which the memductance elements were piecewise linearfunctions. In addition, the memristor with a passive nonline-arity and a piecewise constant-valued memductance functionis essential to generate the high signal-to-noise ratio which isnot suitable for achieving the secure communication [5].Therefore, the memristor with nonlinear memductancefunction which is suitable for secure communication shouldbe worth studying. The memristor in which the memduc-tance function is a bounded function with a bounded

HindawiComplexityVolume 2018, Article ID 5431619, 8 pageshttps://doi.org/10.1155/2018/5431619

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derivative can satisfy this criterion, but the mathematicalmodel of corresponding circuit is a set of nonlinear differen-tial equations as well as the corresponding error systemsderived by the master-slave scheme. Thus, how to derivemaster-slave synchronization criteria for two memristor-based Chua’s circuits in which the memductance functionis a bounded function with a bounded derivative and howto design a feedback controller matrix gain to achieve syn-chronization is the second motivation of this paper.

In this paper, we will deal with the problem of the con-troller design for master-slave synchronization of chaoticmemristor-based Chua’s circuits. The master-slave schemewill be constructed by using an error state feedback control.We will derive one synchronization criterion. Based on theobtained synchronization criterion, we will give the sufficientconditions on the existence of an error state feedback con-troller. Moreover, we will obtain the controller gain. We willalso use one numerical example to illustrate the effectivenessof the synchronization criterion and the design method.

Notation 1. ℝn denotes the n-dimensional Euclidean space.ℝm×n is the set of all m × n real matrices. For symmetricmatrices P and Q, the notation P >Q (respectively, P ≥Q)means that matrix P −Q is positive definite (respectively,positive semidefinite). λmax P and λmin P are the maxi-mum andminimum eigenvalues of the matrix P, respectively.

2. Memristor-Based Chua’s Circuits

The memristor in Chua’s circuits is a two-terminal element.The magnetic flux of memristor between the terminals is afunction of the electric charge which passes through thedevice [1]. A flux-controlled memristor can be characterizedby the incremental menductance function ω ϕ describingthe flux-dependent rate of change of charge [2], i.e., ω ϕ =dq ϕ /dϕ. Therefore, the voltage v t across and the cur-rent i t through the memristor can be described as i t =ω ϕ v t [3].

Figure 1 shows a smooth flux-controlled memristor-based Chua’s circuit, where v1 and v2 are the voltages acrosscapacitors C1 and C2, respectively; iL is the current throughthe inductances L; R is a linear resistor; the Chua’s diode isreplaced by a memristor. The mathematical model of the

Chua’s circuit with the memristor can be described as

dv1 tdt

=1C1

v2 t − v1 tR

−w ϕ t v1 t ,

dv2 tdt

=1C2

v1 t − v2 tR

− iL t ,

diL tdt

=1Lv2 t ,

dϕ tdt

= v1 t ,

1

with the initial condition v1 0 = v10 , v2 0 = v20 , iL 0 = iL0 ,ϕ 0 = ϕ0.

Let f · and g · : ℝ→ℝ be two differentiable functions.In this paper, we mainly focus on the following nonlinearity,i.e., q ϕ t = aϕ t + bg ϕ t , ω ϕ t = a + bf ϕ t , dgϕ /dϕ = f ϕ , and i t = a + bf ϕ t v t , where a and bare the parameters of electronic equipment. Besides f ϕ isdifferentiable, we assume that f ϕ is a bounded functionand df ϕ /dϕ is a bounded function where, i.e., there existtwo scales μf > 0 and μf ′ > 0 such that

f ϕ ≤ μf ,df ϕ

dϕ≤ μf ′, ∀ϕ ∈ℝ 2

Rescaling the parameters of the circuit as x1 t = v1 t ,x2 t = v2 t , x3 t = iL t , x4 t = ϕ t , τ = t/RC2, α = C2/C1, β = C2R/L, γ = C2R, ν1 = aR, and ν2 = bR, we obtainthe following dimensionless form for system (1):

dx1 τ

dτ= α x2 τ − 1 + v1 x1 τ − v2x1 τ f x4 τ ,

dx2 τ

dτ= x1 τ − x2 τ − Rx3 τ ,

dx3 τ

dτ= βx2 τ ,

dx4 τ

dτ= γx1 τ ,

3

where the initial condition is x1 0 = v10 , x2 0 = v20 , x30 = iL0 , and x4 0 = ϕ0. Let x τ = x1 τ , x2 τ , x3 τ ,x4 τ T ∈ℝ4, and

A =

−α 1 + v1 α 0 0

1 −1 −R 0

0 β 0 0

γ 0 0 0

4

L

i

Li

2V 2C 1C

Flux-controlledmemristor

1V V

R

Figure 1: The memristor-based chaotic Chua’s circuit.

2 Complexity

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Then, system (3) can be rewritten as

dx τ

dτ= Ax τ + φ x τ , 5

where φ x τ = ν3x1 τ f x4 τ and ν3 = −αν2.

Remark 1. In [3–5, 7–9, 17–19], dynamical behaviors of thesingle memristor-based Chua’s circuit have been studied. Inthis paper, the synchronization of two memristor-basedChua’s circuits is investigated.

Remark 2. In [6, 15, 16], the memductance elements ofmemristor-based Chua’s circuits were either piecewise lin-ear functions or piecewise constant-valued memductancefunctions. It is well known that the memristor with a passivenonlinearity or a piecewise constant-valued memductancefunction is easy to generate the high signal-to-noise ratiowhich is not suitable for achieving the secure communica-tion [5]. Thus, the memristor with nonlinear memductancefunction should be investigated. The memristor withbounded memductance functions and bounded derivativeswhich is suitable for secure communication can satisfy thiscriterion. Moreover, the mathematical model of corre-sponding circuit is easily to set up. Thus, it is worth study-ing master-slave synchronization for two memristor-basedChua’s circuits in which the memductance function is abounded function with a bounded derivative. It is alsoworth designing a feedback controller matrix gain toachieve synchronization.

3. Master-Slave Synchronization

Let z τ = z1 τ z2 τ z3 τ z4 τ T ∈ℝ4. We construct amaster-slave synchronization scheme for system (5).

ℳdx τ

dτ= Ax τ + φ x τ , 6

Sdy τ

dτ= Ay τ + φ y τ + u τ , 7

C u τ = K x τ − y τ , 8

with master system ℳ , slave system S , and controller C .Defining a signal e t = x t − y t = e1 τ e2 τ e3 τ e4

τ T ∈ℝ4 with ei t = xi t − yi t , i = 1, 2, 3, 4, we have theerror system

de τ

dτ= A − K e τ + φ e τ , 9

where

φ e τ = φ x τ − φ y τ 10

The initial values of (6) and (7) are x 0 = x1 0 , x20 , x3 0 , x4 0 T and y 0 = y1 0 , y2 0 , y3 0 , y4 0 T,respectively. Thus,

e 0 = e1 0 , e2 0 , e3 0 , e4 0 T, 11

with ei 0 = xi 0 − yi 0 , i = 1, 2, 3, 4It follows from (10) and the differential mean value theo-

rem that

φ e τ = φ x τ − φ y τ

= v3 x1 τ f x4 τ − y1 τ f y4 τ12

where ξ ∈ min x4 τ , y4 τ , max x4 τ , y4 τ . Noticethat the error system (9) can be rewritten as

de τ

dτ= A + B τ − K e τ , 13

where

B τ =

b11 τ 0 0 b14 τ

0 0 0 0

0 0 0 0

0 0 0 0

, 14

with

b11 τ = v3 f y4 τ , b14 τ

= v3x1 τdf ς

dς s=ξ,ς

∈ min x4 τ , y4 τ , max x4 τ , y4 τ

15

Choosing the proper parameters of system (3), there existsome chaotic attractors which indicate that for any initialcondition x0 within the domain of system (3), there arebounds μi x0 > 0, i = 1, 2, 3, 4, such that

xi t, x0 ≤ μi x0 , ∀t > 0, i = 1, 2, 3, 4 16

From inequalities (2) and (16), we know that

b11 τ ≤ ν3 μf , b14 τ ≤ ν3 μ1 x0 μf ′ 17

Therefore, the error system (13) can be modeled as apolytopic system.

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Let

B1 =

v3 μf 0 0 v3 μ1 x0 μf ′

0 0 0 0

0 0 0 0

0 0 0 0

,

B2 =

− v3 μf 0 0 v3 μ1 x0 μf ′

0 0 0 0

0 0 0 0

0 0 0 0

,

B3 =

v3 μf 0 0 − v3 μ1 x0 μf ′

0 0 0 0

0 0 0 0

0 0 0 0

,

B4 =

− v3 μf 0 0 − v3 μ1 x0 μf ′

0 0 0 0

0 0 0 0

0 0 0 0

18

It is clear that Bi i = 1, 2, 3, 4 are the vertices of B τ .This paper intends to derive synchronization criteria for

two memristor-based Chua’s circuits and to design the con-troller (8), i.e., to find the controller gain K , such that the sys-tem described by (13) is asymptotically stable, which meansthat the system described by (6), (7), and (8) synchronizes.

4. Controller Design

4.1. A Synchronization Criterion. This subsection aims toderive a synchronization criterion for two memristor-basedChua’s circuits. Choose the quadratic Lyapunov function.

V τ, e τ = eT τ Pe τ , 19

where P ∈ℝ4 × 4, P = PT > 0.Applying Lyapunov’s direct method, we obtain the fol-

lowing result.

Proposition 1. The error system described by (11) and (13)is asymptotically stable if there exists a matrix P = PT > 0such that

P A + Bi − K + A + Bi − K TP < 0, i = 1, 2, 3, 4 20

Proof 1. Taking the derivative of V τ, e τ with respect toτ along the trajectory of (13) yields

dV τ, e τ

dτ= eT τ P A + B τ − K e τ

+ eT τ A + B τ − K TPe τ

21

A sufficient condition for the asymptotic stability of sys-tem (13) is that there exists a matrix P = PT > 0 such that

P A + B τ − K + A + B τ − K TP < 0 22

It is easy to see that LMI (22) can be ensured by LMIs(20). This ends the proof.

If the menductance function is a linear piecewiseconstant-valued function, i.e.,

w ϕ t = κ1, forϕ t ≥ 1,

w ϕ t = κ2, forϕ t ≥ 1,23

we obtain the following dimensionless form for system (1):

dx τ

dτ= Aix τ , i = 1, 2, 24

by rescaling the parameters of the circuit as (3), where

A1 =

θ1 α 0 0

1 −1 R 0

0 β 0 0

γ 0 0 0

,

A2 =

θ2 α 0 0

1 −1 R 0

0 β 0 0

γ 0 0 0

,

25

θ1 = −α 1 + κ1R , θ2 = −α 1 + κ2R , and the initial condi-tion is x1 0 = v10 , x2 0 = v20 , x3 0 = iL0 , and x4 0 = ϕ0.

The switched rule is if x4 ≥ 1, then dx τ /dτ = A1x τ ; ifx4 < 1, then dx τ /dτ = A2x τ . The chaotical behaviors ofmodel (24) have been studied in [3, 6, 7].

We construct a master-slave synchronization scheme forsystem (24).

ℳdx τ

dτ= Aix τ , i = 1, 2,

Sdy τ

dτ= Aiy τ + ui t , i = 1, 2,

C ui τ = Ki x τ − y τ , i = 1, 2,

26

with master system ℳ , slave system S , and controller C .Defining an error signal e τ = x τ − y τ , we obtain theerror system.

de τ

dτ= Bie τ , i = 1, 2, 3, 4, 27

where B1 = B2 = 0, B3 = A1 − A2, B4 = −B3, C1 = C4 = −A1 +K1, and C2 = C3 = −A2 + K2. The initial value is the same as

4 Complexity

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that defined in (11). The switched rule is if x4 ≥ 1, y4 ≥ 1, thende τ /dτ = B1x τ − C1e τ ; if x4 < 1, y4 < 1, then de τ /dτ = B2x τ − C2e τ ; if x4 ≥ 1, y4 < 1, then de τ /dτ = B3xτ − C3e τ ; if x4 < 1, y4 ≥ 1, then de τ /dτ = B4x τ − C4e τ .

We choose the quadratic Lyapunov function.

V τ, e τ = eT τ e τ 28

Taking the derivative of (28) with respect to τ alongthe trajectory of (27), we can derive the following stateestate which can be stated as the error system describedby (27) and (11) converges exponentially to the followingball M with a convergence rate r/2, where M = e ∈ℝ4 ∣e 2 ≤ q/r with q =max q1, q2, q3, q4 , qi = λmax ρTBT

i Bi

ρ , ρT = μ1 x0 , μ2 x0 , μ3 x0 , μ4 x0 , r =min r1, r2, r3,r4 , and ri = λmin CT

i + Ci − I4 , i = 1, 2, 3, 4.

4.2. The Controller Design. In this subsection, we will designthe controller (8) based on the synchronization criterionderived in Section 4.1.

Applying Proposition 1, we establish the following result.

Proposition 2. The error system described by (11) and (13) is

asymptotically stable if there exists a matrix P = PT > 0 and a

matrix Y of appropriate dimensions such that

A + Bi P + P A + BiT − Y − YT < 0, i = 1, 2, 3, 4 29

Moreover, the feedback controller gain matrix is given by

K = YP−1.

Proof 2. Pre- and postmultiplying both sides of (20) withP−1 gives

A + Bi P−1 + P−1 A + Bi

T − KP−1 − P−1K < 0, i = 1, 2, 3, 430

Setting P = P−1 and Y = KP−1 yields (29).

5. Simulation Results

In this section, in order to illustrate the effectiveness of thederived results, we consider a memristor-based Chua’s cir-cuit (1) in which the parameters are chosen as R = 2 × 103Ω, C1 = 6 8 × 10−9nF, C2 = 6 8 × 10−8nF, and L = 1 8 × 10−2mH. Thus, we have α = 10, β = 7 5 × 10−3, γ = 1 36 × 10−4.

For the initial value (0.11, 0.11, 0, 0) of (6), we giveFigures 2 and 3 for system (3) with f x4 τ = arctan x4 τand f x4 τ = sin2x4 τ to illustrate the chaotic attractorsin the x4 − x1 plate. We can also obtain the values for μ1x0 , μf , μf ′, b11, and b14, respectively. If f x4 τ = arctanx4 τ , then a = −1 3550 × 10−4, b = 6 0930 × 10−4, μf = 1,μf ′ = π/2 μ1 x0 = 400, b11 = nu3 arctan y4 t , and b14 = v3x1 τ /1 + ξ2. If f x4 τ = sin2x4 τ , then a = −5 9900 ×

−90 −80 −70 −60 −50 −40 −30 −20 −10 0 10−400

−300

−200

−100

0

100

200

300

400

Stat

e var

iabl

e x1(�휏

)

State variable x4(�휏)

Plot of x4(�휏) vs. x1(�휏)

Figure 2: The chaotic attractors of system (3) with f x4 τ =arctan x4 τ .

−1.5 −1 −0.5 0 0.5 1−6

−4

−2

0

2

4

6St

ate v

aria

ble x

1(�휏

)

State variable x4(�휏)

Plot of x4(�휏) vs. x1(�휏)

Figure 3: The chaotic attractors of system (3) with f x4 τ = sin2x4 τ .

Table 1: The feedback gain matrix derived by Proposition 2.

f x4 τ K

arctan x4 τ

−10 10 0 691750

10 0 −1000 0

0 −1000 0 0

−40 0 0 9360

sin2x4 τ

0 0 0 6959000

0 0 −1000 0

0 −1000 0 0

−1620 0 0 200

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10−4, b = 6 0930 × 10−4, μf = 1, μf ′ = 1μ1 x0 = 6, b11 = ν3sin2y4 τ , and b14 = ν3x1 τ sin 2ξ .

We choose the initial condition of master system (6) asx10 , x20 , x30 , x40 = 0 11, 0 11, 0, 0 and the initial conditionof slave system (7) as y10 , y20 , y30 , y40 = 0 12, 0 12, 0 01,0 01 . From Proposition 2, we obtain the feedback gainmatrix K for f x4 τ = arctan x4 τ and f x4 τ = sin2x4τ , respectively, which are listed in Table 1.

The simulation results for master, slave, and error sys-tems for f x4 τ = arctan x4 τ and f x4 τ = sin2x4 τand the feedback controller gain derived by Proposition 2are illustrated in Figures 4 and 5, from which one can clearlysee that the master and slave systems are synchronized,which means that the design method is effective.

6. Conclusions and Future Works

We have addressed the problem of the controller design formaster-slave synchronization of memristor-based Chua’scircuits and constructed a master-slave scheme by using

an error state feedback control. We have derived a master-slave synchronization criterion and provided the sufficientconditions on the existence of an error feedback controller.Moreover, we have obtained the error state feedback control-ler gain by solving a set of LMIs. The effectiveness of the syn-chronization criterion and the design method has beenillustrated through one numerical example. It should bepointed out that we only consider the state feedback controlfor synchronization of memristor-based Chua’s circuits inthis paper. To design the time-delayed controller is our futureresearch focus.

Data Availability

The data used to support the findings of this study areincluded within the article.

Conflicts of Interest

The author declares that there is no conflict of interestregarding the publication of this paper.

−400−200

0200

400

State variable x1(�휏)

−100

−50

0

50

100

150

Stat

e var

iabl

e x2(�휏

)

−100−50

050

State variable x4(�휏)

(a)

−100−50

050

−500

0

500−100

−50

0

50

100

150

State variable y1(�휏)

Stat

e var

iabl

e y2(�휏

)

State variable y4(�휏)

(b)

Figure 4: (a) Simulation result for master system with f x4 τ = arctan x4 τ and K derived by Proposition 2. (b) Simulation result for slavesystem with f x4 τ = arctan x4 τ and K derived by Proposition 2.

−1.5 −1−0.5

0 0.51

−10−5

05

10−2

−1

0

1

2

State variable x1(�휏)

Stat

e var

iabl

e x2(�휏

)

State variable x4(�휏)

(a)

−1.5 −1−0.5

0 0.51

−10−5

05

10−2

−1

0

1

2

State variable y1(�휏)

Stat

e var

iabl

e y2(�휏

)

State variable y4(�휏)

(b)

Figure 5: (a) Simulation result for master system with f x4 τ = sin2x4 τ and K derived by Proposition 2. (b) Simulation result for slavesystem with f x4 τ = sin2x4 τ and K derived by Proposition 2.

6 Complexity

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Acknowledgments

This work is partially supported by the National NaturalScience Foundation of China under Grant 61561023, thekey project of Youth Science Fund of Jiangxi Chinaunder Grant 20133ACB21009, the project of Scienceand Technology Fund of Jiangxi Education Departmentof China under Grant GJJ160429, and the project ofJiangxi E-Commerce High Level Engineering TechnologyResearch Centre.

References

[1] L. Chua, “Memristor. The missing circuit element,” IEEETransactions on Circuit Theory, vol. 18, no. 5, pp. 507–519,1971.

[2] D. B. Strukov, G. S. Snider, D. R. Stewart, and R. S. Williams,“The missing memristor found,” Nature, vol. 453, no. 7191,pp. 80–83, 2008.

[3] M. Itoh and L. O. Chua, “Memristor oscillators,” InternationalJournal of Bifurcation and Chaos, vol. 18, no. 11, pp. 3183–3206, 2008.

[4] B. Muthuswamy, “Implementing memristor based chaotic cir-cuits,” International Journal of Bifurcation and Chaos, vol. 20,no. 5, pp. 1335–1350, 2010.

[5] B. Muthuswamy and P. Kokate, “Memristor-based chaotic cir-cuits,” IETE Technical Review, vol. 26, no. 6, pp. 417–429,2009.

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8 Complexity

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