part b assingment.programble elctronic assingmentdocx

7/27/2019 PART B Assingment.programble elctronic assingmentdocx

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PART B

Q1) Design and implement a DE2/DE1 project that demonstrates a binary to BCD converter. Use

the switches SW [15:0] to define the input binary value and the seven-segment displays to show

the resulting decimal equivalent. For example, if the first five switches are on: 0x1F, the seven-

segment display should read 31.

VHDL CODE FOR Q1:

library ieee;

use ieee.std_logic_1164.all;

use ieee.numeric_std.all;

entity binary2bcd is

port ( clk : in std_logic;

sw: in std_logic_vector(15 downto 0);

--7SEGMENT PIN ASSIGNMENT

hex0:out std_logic_vector(6 downto 0);




hex4:out std_logic_vector(6 downto 0));

end binary2bcd;

architecture behavior of binary2bcd is

begin

my_proc: process (clk)


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variable random: std_logic_vector(15 downto 0) := "0000000000000000";

variable one : std_logic_vector(3 downto 0) := "0000";

variable ten : std_logic_vector(3 downto 0) := "0000";

variable hund : std_logic_vector(3 downto 0) := "0000";

variable thou : std_logic_vector(3 downto 0) := "0000";

variable tthou: std_logic_vector(3 downto 0) := "0000";

begin

if (rising_edge(clk)) then

random := sw;

for i in 0 to 15 loop

if (tthou >= "0101") then

tthou := std_logic_vector (unsigned(tthou) +3);

end if;

if (thou >= "0101") then

thou := std_logic_vector (unsigned(thou) +3);

end if;

if (hund >= "0101") then

hund := std_logic_vector (unsigned(hund) +3);

end if;

if (ten >= "0101") then

ten := std_logic_vector (unsigned(ten) +3);


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end if;

if (one >= "0101") then

one := std_logic_vector (unsigned(one) +3);

end if;

-- THIS IS SHIFTING WORK

tthou := tthou(2 downto 0)& thou(3);

thou := thou (2 downto 0)& hund(3);

hund := hund (2 downto 0)& ten(3);

ten := ten (2 downto 0)& one(3);

one := one (2 downto 0)& random(15);

random := std_logic_vector(unsigned(random) sll 1);

end loop;

--DISPLAYING THE VALUE ON THE SEVEN SEGMENT

case one is

when "0000" => hex0 hex0 hex0 hex0 hex0 hex0 hex0


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when "0111" => hex0 hex0 hex0 hex0 hex0 hex0 hex0 hex0 hex0 hex0 hex1 hex1 hex1 hex1 hex1 hex1 hex1 hex1 hex1


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when "1111" => hex4 hex4


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2- Modify the binary to BCD converter project so that it handles and displays signed values.

VHDL CODE FOR Q2:

LIBRARY ieee;

USE ieee.std_logic_1164.all;

USE ieee.numeric_std.all;

entity binary2bcdsigned is

port ( CLK : in std_logic;

input: in signed(17 downto 0);

segment0:out signed(6 downto 0);





segment5:out signed(6 downto 0));

end binary2bcdsigned;

architecture behavior of binary2bcdsigned is

begin

my_proc: process (CLK)

--Variable assignment

variable random: signed(17 downto 0) := "000000000000000000";

variable one: std_logic_vector(3 downto 0) := "0000";


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variable ten: std_logic_vector(3 downto 0) := "0000";

variable hund: std_logic_vector(3 downto 0) := "0000";

variable thou: std_logic_vector(3 downto 0) := "0000";

variable tthou: std_logic_vector(3 downto 0) := "0000";

begin

if (rising_edge(CLK)) then

random := input;

if input(16)>='0' then

if input(17)>='0' then


segment5= "0101") then


end if;



end if;



end if;

if (ten >= "0101") then


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end if;

if (one >= "0101") then


end if;

tthou := tthou(2 downto 0) & thou(3);

thou := thou(2 downto 0)& hund(3);

hund := hund(2 downto 0)& ten(3);

ten := ten(2 downto 0)& one(3);

one := one(2 downto 0)& random(15);

random := signed(unsigned(random) sll 1);

end loop;

CASE one IS

when "0000" => segment0 segment0 segment0 segment0 segment0 segment0 segment0 segment0


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when "1000" => segment0 segment0 segment0 segment0 segment0 segment0 segment0 segment0 segment0 segment1 segment1 segment1 segment1 segment1 segment1 segment1 segment1 segment1 segment1


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when others => segment4 ='0' then


segment5= "0101") then


end if;




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end if;



end if;

if (ten >= "0101") then


end if;

if (one >= "0101") then


end if;







end loop;

CASE one IS

when "0000" => segment0 segment0 segment0


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when "0111" => segment2 segment2 segment2 segment2 segment2 segment2 segment2 segment2 segment2 segment2 segment3 segment3 segment3 segment3 segment3 segment3 segment3 segment3


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when "1010" => segment4 segment4 segment4 segment4 segment4 segment4 segment4 ='1' then

segment5='0' then


segment5


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if (tthou >= "0101") then


end if;



end if;



end if;

if (ten >= "0101") then


end if;

if (one >= "0101") then


end if;








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end loop;

CASE one IS

when "0000" => segment0 segment0 segment0 segment0 segment0 segment0 segment0 segment0 segment0 segment0 segment0 segment0 segment0 segment0 segment0 segment0 segment0


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when "1010" => segment4 segment4 segment4 segment4 segment4 segment4 segment4 segment4 segment4 segment4 segment4


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end behavior;

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