pasl manual mdp equipment description(english 060308)
TRANSCRIPT
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CONTENTS ROI-S04488
CL-2
TITLE PAGE
2.6 Receive Line Equalization 2-22
2.6.1 Demultiplexing 2-22
2.6.2 Unipolar-to-Bipolar Code Conversion 2-22
2.7 Analog Service Channel Signal Transmission(Optional) 2-23
2.7.1 ASC Transmit Side 2-23
2.7.2 ASC Receive Side 2-23
2.8 9.6 K Digital Service Channel Transmission 2-23
2.8.1 DSC Transmit Side 2-24
2.8.2 DSC Receive Side 2-24
2.9 Alarm Signal Transmission 2-24
2.10 Wayside Signal Transmission (Optional) 2-24
2.10.1 WS Transmit Side 2-24
2.10.2 WS Receive Side 2-24
2.11 64 K Digital Service Channel Transmission 2-25
2.11.1 Service Channel Transmission of G.703Codirectional 2-25
2.11.2 Service Channel Transmission of V.11 2-252.12 LAN Signal Transmission (Optional) 2-26
2.12.1 Transmit Side 2-26
2.12.2 Receive Side 2-26
2.13 Alarm and Control Functions 2-27
3 OPERATION 3-1
3.1 Interface Terminals and Jacks 3-1
3.2 Controls, Indicators and Test Jacks 3-29
3.2.1 75 ohms/120 ohms Impedance Switch 3-34
3.3 Equipment Start-up and Shut-down 3-373.3.1 Start-up 3-37
3.3.2 Shut-down 3-38
3.4 Equipment Setting and Monitoring 3-39
3.4.1 Setting Procedure from LCT 3-40
3.4.2 Alarm/Status Monitoring Procedure from LCT 3-62
3.4.3 Monitoring Voltage of the ODU 3-70
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ROI-S04488 CONTENTS
CL-3
TITLE PAGE
4 MAINTENANCE 4-1
4.1 Precautions 4-1
4.2 Maintenance Control from LCT 4-3
4.3 Test Equipment and Accessories 4-12
4.4 Periodic Maintenance 4-12
4.5 Corrective Maintenance 4-13
4.5.1 Fault Isolation Flow Chart 4-13
4.5.2 Replacement 4-19
4.5.3 Alignment 4-23
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CONTENTS ROI-S04488
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ROI-S04488 GENERAL
1-1
1. GENERAL
This section provides information on the equipment composition andequipment performance of the MDP-( )MB-( ) Modulator-Demodulator(Indoor Unit (IDU)) equipment. This manual is applied to the F/W version2.xx.
The IDU has the following two types for each 1+0 and 1+1 systems.
Fixed bit rate type (for 4 2MB and optional 2 10/100 BASE-T(X))
Free bit rate type (for 2/4/8/16 2MB and optional 2 10/100BASE-T(X) )
Front view of the IDUs are shown in Fig. 1-1, Fig. 1-2 (1/2) and Fig. 1-2(2/2).
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ROI-S04488 GENERAL
1-5
1.1 Equipment Composition
The equipment composition is shown in Fig. 1-3 and Fig. 1-4.
Fig. 1-3 Component Module Arrangement for the IDU in 1+0 System (1/2)
TOP LAYER
BOTTOM LAYER
1 4
3
9
5
6
10
2
78
Note: The module 8 can not be mounted if module 5 and/or 7 aremounted.
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GENERAL ROI-S04488
1-6
Note: : Mounted : Optional
: Not applicable *1 : H0091A/J/L/M MDP-8MB-12A H0091N MDP-17MB-3A H0091F/H/K/P MDP-34MB-25C
Fig. 1-3 Component Module Arrangement for the IDU in 1+0 System (2/2)
No. MODULE NAME
MDP-[ ]MB-[ ] (IDU) *1
REMARKSH0091
H0091A/J4x2MB
H0091L4x2MB
H0091M4x2MB
H0091N2/4/8x2MB
H0091F/H/K2/4/8/16x2MB
H0091P2/4/8/16x2MB
1
H0092A/M/WMAIN BOARD H0092D/N/X MAIN BOARD H2003A MAIN BOARD H2003B MAIN BOARD H2003D MAIN BOARD
2
H0093A FRONT BOARD1 H0093G FRONT BOARD1 H2004A FRONT BOARD1
75 ohms BNCH2004B FRONT BOARD1 75 ohms BNC
3H0095A FRONT BOARD2 75/120 ohmsH0095D FRONT BOARD2 75/120 ohms
4 X0581A/B DC-DC CONV
5
H0174A ASC INTFC VF x 2 CHH0175A DSC INTFC RS232/RS422 x 2 CHH0176A ALM INTFC Cluster ALM x 2CH
6H0172A 64K INTFC G.703
H0173A 64K INTFC V11
7 H0171A WS INTFC 2 MB x 1CH8 H0177A SC LAN INTFC 2 M/80Kbps
9 H0098B LAN INTFC 10/100BASE-T(X) x2CH
10G5440B/F/G PM CARD Serial
G8896B PM CARD Ether
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1-7
Fig. 1-4 Component Module Arrangement for the IDU in 1+1 System (1/3)
SW UNIT (U1)
MD Unit (U2/U3)
1
2
9
107
8
Note: The module 12 can not be mounted if module 8 and/or 9are mounted.
3
4
5611
U2 (MD Unit)
U3 (MD Unit)
U1 (SW Unit)
IDU
12
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GENERAL ROI-S04488
1-8
Note: : Mounted : Optional
: Not applicable *1 : H0161A/J/L/M MDP-8MB-13A H0161N MDP-17MB-4A H0161F/H/K/P MDP-34MB-26C
Fig. 1-4 Component Module Arrangement for the IDU in 1+1 System (2/3)
No. UNIT/MODULE NAME
MDP-[ ]MB-[ ] (IDU) *1
REMARKSH0161
H0161A/J 4x2MB
H0161L4x2MB
H0161M4x2MB
H0161N2/4/8x2MB
H0161F/H/K 2/4/8/16x2MB
H0161P 2/4/8/16x2MB
U1
H0164A/D SW UNIT H0164C/E SW UNIT H0164F SW UNIT H0164G SW UNIT 75 ohms BNCH0164H SW UNIT 75 ohms BNCH0164J SW UNIT
U2
H0163A/E/G MD UNIT H0163D/H MD UNIT H0163J MD UNIT H0163K MD UNIT H0163L MD UNIT
U3
H0163A/E/G MD UNIT H0163D/H MD UNIT H0163J MD UNIT H0163K MD UNIT H0163L MD UNIT
1
H0092H/P/U MAIN BOARD H0092K/R/V MAIN BOARD H2003D MAIN BOARD H2003E MAIN BOARD H2003F MAIN BOARD
2 H0093B FRONT BOARD1
3 X0581A/B DC-DC CONV
4
H0094B/H SW BOARD H0094D/J SW BOARD H2005A SW BOARD H2005B SW BOARD H2005C SW BOARD
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ROI-S04488 GENERAL
1-9
Note: : Mounted : Optional
: Not applicable *1 : H0161A/J/L/M MDP-8MB-13A H0161N MDP-17MB-4A H0161F/H/K/P MDP-34MB-26C
Fig. 1-4 Component Module Arrangement for the IDU in 1+1 System (3/3)
No. UNIT/MODULE NAME
MDP-[ ]MB-[ ] (IDU) *1
REMARKSH0161
H0161A/J 4x2MB
H0161L4x2MB
H0161M4x2MB
H0161N2/4/8x2MB
H0161F/H/K 2/4/8/16x2MB
H0161P 2/4/8/16x2MB
5
H0093C FRONT BOARD1 H0093H FRONT BOARD1 H2004C FRONT BOARD1 75 ohms BNCH2004D FRONT BOARD1 75 ohms BNC
6H0095A FRONT BOARD2 75/120 ohms
H0095D FRONT BOARD2 75/120 ohms
7H0172A 64K INTFC G.703
H0173A 64K INTFC V11
8 H0171A WS INTFC 2 MB x 1CH
9
H0174A ASC INTFC VF x 2 CH
H0175A DSC INTFC RS232/RS422x 2 CH
H0176A ALM INTFC Cluster ALMx 2CH
10 H0098B LAN INTFC 10/100BASE-T(X)x 2CH
11G5440B/F/G PM CARD Serial
G8896B PM CARD Ether
12 H0177A SC LAN INTFC 2 M/80Kbps
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GENERAL ROI-S04488
1-10
1.2 Equipment Performance
The performance characteristics of the IDU are listed in Table 1-1.
Table 1-1 Performance Characteristics of IDU
Data signal interface (between IDU and DTE)
Bit rate: 2.048 Mbps 50 ppm (2 x 2 MB/4 x 2 MB/8 x2 MB/ 16 x 2 MB system)
Level: Meets specification of ITU-T G.703.
Code format: High Density Bipolar-3 (HDB-3)
Impedance: 120 ohms, balanced or 75 ohms, unbalancedModulation method: 4-phase shift keying (4 PSK) system
Demodulation method: Quasi-coherent detection
IF signal interface (between IDU and ODU)
Signal frequency
TX: 850 MHz
RX: 70 MHz
Signal level
IF output: 5 dBm, nominal
IF input: 15 to 0 dBm (at, RX IN), varies with cable length(maximum cable length (8D-FB): L = 300m)
Impedance: 50 ohms, unbalanced
Orderwire frequency
Output: 450 kHz, amplitude modulation (AM)
Input: 468 kHz, AM
Power supply: 43 V DC (through) at IF IN/OUT
Control/Monitor signal frequency: 10 MHz, amplitude shift keying (ASK) (at IF IN/OUT)Analog service channel (ASC) signal interface (optional)
Frequency: 0.3 to 3.4 kHz
Impedance: 600 ohms, balanced
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ROI-S04488 GENERAL
1-11
Digital service channel (DSC) signal interface
Bit rate: 9.6 kbps (asynchronous) 64 kbps (G.703/V.11) (optional)
Level: RS-232, RS-422, RS-485 (TERM) or RS-485 (NON TERM)Meet specifications of ITU-T G.703/V.11 (64k)
Note: Depending on combination of optional module, both ASC and DSC cannot be used simultaneously.
Way Side (WS) signal interface (optional in 16 x 2 MB system)
Bit rate: 2.048 Mbps
Interface: HDB-3 (ITU-T G.703)
Impedance: 75 ohms or 120 ohms (selectable)
Local Area Network (LAN) signal interface (optional)
Standards Compliance IEEE 802.3 (10 BASE-T), IEEE 802.3u (100 BASE-TX),IEEE 802.3x (Flow control)
Network Port 10 Mbps/100 Mbps andFull/Half duplex Auto negotiation or Fixed
Total Port 2 (Each port is separated)
Flow Control 802.3x (Full Duplex), Back pressure (Half Duplex)Forwarding Mode Store-and -Forward
Transmission Length Category 5, Max. 100 m
Transmission Rate (Port 1 and Port 2)
2 Mbps to 32 Mbps (selectable, depends on the system)
House Keeping Alarm Input/Output (optional)
Output (Form-C): Rated Current 0.2 A Maximum Voltage 100 V (AC+DC)
Input (Photo coupler): Open > 200 kohms
Closed < 50 ohmsService channel (SC) Local Area Network (LAN) signal interface (optional)
Standards Compliance IEEE 802.3 (10 BASE-T)
Network Port 10 Mbps Half duplex Fixed
Total Port 1
Forwarding Mode Store-and -Forward
Transmission Length Category 5, Max. 100 m
Transmission Rate 80Kbps (in 2/4/8 x 2 MB) or 2Mbps(in 16 x 2 MB)
Table 1-1 Performance Characteristics of IDU (Contd)
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GENERAL ROI-S04488
1-1212 pages
Dimensions: 482 wide x 44 high x 240 deep (mm) for 1+0 482 wide x 132 high x 240 deep (mm) for 1+1
Weight: Approx. 4 kg (including all options) for 1+0 Approx. 11 kg (including all options) for 1+1
Relative Humidity: Less than 90% at +50C (Non-condensing)
Environmental temperature range
Operation: 5C to +50C
Storage: 30C to +70C
Table 1-1 Performance Characteristics of IDU (Contd)
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ROI-S04488 FUNCTIONAL OPERATION
2-1
2. FUNCTIONAL OPERATION
This section describes functional operation of the transmit lineequalization, transmit digital processing, modulation, demodulation,receive digital processing, receive line equalization, analog servicechannel signal transmission, 9.6k digital service channel transmission,alarm signal transmission, wayside signal transmission, 64k digital servicechannel transmission, LAN signal transmission, and alarm and control inthat order for the IDU.
The IDU provides four signal transmission systems; 2 x 2 MB, 4 x 2 MB,8 x 2 MB and 16 x 2 MB in 1+0 and 1+1 configuration as shown in Fig 2-
1 and Fig 2-2 Functional Block Diagram.
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FUNCTIONAL OPERATION ROI-S04488
2-2
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ROI-S04488
Fig. 2-1 Fun ctio nal Block Diagram of IDU (1/3)
CH1 IN
CH2 IN
CH1 OUT
CH2 OUT
4 x 2 MBSYSTEM
8 x 2 MBSYSTEM
16 x 2 MBSYSTEM
TRANS
TRANS
TRANS
TRANS
PLS
B-U
AIS
U-B
LOOPBACK
CONV
CONV
MON DETCKT
LOOPBACKCKT
AIS CTRL
AIS CTRL
PLS MONOUTPUT LOSS 1-2
PLS AISMON DET
CH3 IN
CH4 IN
CH3 OUT
CH4 OUT
TRANS
TRANS
TRANS
TRANS
B-U
U-B
CONV
CONV
PLS MON
AIS CTRL
AIS CTRL
LOOPBACKCKT
LOOPBACKCKT
1/8
MEM
MEM
MEM
MEM
MEM
MEM
MEM
MEM
MUX
DEMUX
FE LB CTRL 1-4
FE LB ANS 1-4
P-S CONV
TX CLK LOSS
RX CLK LOSS
S-P CONV
CLK MON
CLK MON
OUTPUT LOSS 1-2OUTPUT LOSS 3-4
AIS RCVD 3-4INPUT LOSS 3-4FE LB CTRL 1-4
FE LB ANS 1-4NE LB ANS 1-4
AIS RCVD 1-2INPUT LOSS 1-2 P-S
CONV
S-PCONV
FE LB CTRL 1-4NE LB CTRL 1-4
CH5 INCH6 INCH5 OUTCH6 OUTCH7 INCH8 INCH7 OUTCH8 OUT
CH9 INCH10 INCH9 OUTCH10 OUTCH11 INCH12 INCH11 OUTCH12 OUT
CH13 INCH14 INCH13 OUTCH14 OUTCH15 INCH16 INCH15 OUTCH16 OUT
(CH13 - CH16)
(CH5 - CH8)
(SAME AS ABOVE)
(CH9 - CH12)
(SAME AS ABOVE)
INPUT LOSS 1-2
AIS RCVD 1-2
INPUT LOSS 3-4
AIS RCVD 3-4
INTFC (CH1 - CH4)
TIM GEN
2 x 2 MBSYSTEM
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ROI-S04488
Fig. 2-1 Fun ctio nal Block Diagram of IDU (2/3)
ASC/DSC/ALM INTFC
abcdef gh
P-SCONV
PLS MON
MUX
SCRB
PARITY
CHECK
TIMGEN
PCMCODEC
H
DIFENC
DIGFIL
PLSMON
MSTCLKMON
EOWOUT
EOW IN
EOW
D-ACONV
D-A
CONV
4PHMOD
M
D
ED
EM
VCO450 kHz
MUX ALM 1-4
MOD CW
L BER ALM
H BER ALM
F SYNC ALM
BER ALM
BER THRESHOLD
FRAME ID
q
s
SERIAL ALM
F SYNC ALM
r SERIAL DATA
Ethernet SWSPEED CONV
LAN INTFC*
PORT1
PORT2
vRX FPLS
t
u
16M CLK
RX CLK
i jkl
mnop
S-PCONV DEMUX
TIMGEN
DSCRB
BERDET
F SYNC
DIFDEC
IN
OUT
OUT
INDSC/64K/
A-D CONV/LEV CONV
B-U CONVU-B CONV
64K/SC LAN INTFC*
A-DCONV
70 MHz
DEM
4 PHDEM
A-DCONV
From/ToFIG. 2-1 (1/3)
DPU
MOD
43 V DC
INTERFACE
TX FPLSwx TX CLK
VCO
AIS CTRL OFF
AIS CTRLy
TERMINAL
Note: * O
10BASE-T/100BASE-TX
z
WSIN/OUT(RJ45)
INTERFACETERMINAL
B-U CONVU-B CONV
WS/SC LAN INTFC*
ASC/EOW
OW/DSC/ASC
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ROI-S04488
Fig. 2-1 Functi onal Blo ck Diagram of IDU in 1+0 System (3/3)
From/ToFIG. 2-1 (2/3)
D
I
F
H
E
G
A
B
C
TX DPU ALM
BER ALM
F SYNC ALM
MOD ALM
DPU SERIAL
DPU SERIAL
DATA UP
DATA DOWNCPU
S-PCONV
S-PCONV
S-PCONV
TX PWR ALMRX LEV ALM
APC 1 ALM
APC 2 ALM
IF INPUT ALM
INPUT LOSS 1-16
TX CLK LOSSRX CLK LOSSOUTPUT LOSS 1-16DEM ALM
H BER ALM
FE LB CTRL 1-16
MOD CW
NE LB CTRL 1-16
AIS CTRL 1-16
CPU ALM
CPU RESET
CPU
LA PORT
NMS/RA
Notes: 1. *Optional.
2. Four relay contacts are outputed from interface terminal (ALM/ALM AUX). Plural alarms can be applied to a single relay. The figure shows the default settings. Refer to paragraph 3.4 for changing the settings.
3. Refer to the table 3.1 Interface Terminals and Jacks for the details of pin assignment for the alarmsignals.
CPU CLK
PM CARD*
PHOTOCOUPLERs
RELAYs
INTERFACETERMINAL
HOUSEKEEPINGOUTPUT
HOUSEKEEPINGINPUT
INTERFACETERMINAL
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ROI-S04488
Fig. 2-2 Functi onal Blo ck Diagram of IDU in 1+1 System (1/4)
CH1 IN
CH2 IN
CH1 OUT
CH2 OUT
4 2 MBSYSTEM
8 2 MBSYSTEM
16 2 MBSYSTEM
PLS
B-U
AIS
U-B
LOOPBACK
CONV
CONV
MON DETCKT
LOOPBACKCKT
AIS CTRL
AIS CTRL
PLS MONOUTPUT LOSS 1-2
PLS AISMON DET
CH3 IN
CH4 IN
CH3 OUT
CH4 OUT
B-U
U-B
CONV
CONV
PLS MON
AIS CTRL
AIS CTRL
LOOPBACKCKT
LOOPBACKCKT
1/8
MEM
MEM
MEM
MEM
MEM
MEM
MEM
MEM
MUX
DEMUX
FE LB CTRL 1-4
FE LB ANS 1-4
P-S CONV
TX CLK LOSS
RX CLK LOSS
S-P CONV
CLK MON
CLK MON
OUTPUT LOSS 1-2OUTPUT LOSS 3-4
AIS RCVD 3-4INPUT LOSS 3-4FE LB CTRL 1-4
FE LB ANS 1-4NE LB ANS 1-4
AIS RCVD 1-2INPUT LOSS 1-2 P-S
CONV
S-PCONV
FE LB CTRL 1-4NE LB CTRL 1-4
CH5 INCH6 INCH5 OUTCH6 OUTCH7 INCH8 INCH7 OUTCH8 OUT
CH9 INCH10 INCH9 OUTCH10 OUTCH11 INCH12 INCH11 OUTCH12 OUT
CH13 INCH14 INCH13 OUTCH14 OUTCH15 INCH16 INCH15 OUTCH16 OUT
(SAME AS ABOVE)
INTFC SECTION (CH13 - CH16)
(SAME AS ABOVE)
INTFC SECTION (CH5 - CH8)
(SAME AS ABOVE)
INTFC SECTION (CH9 - CH12)
INTFC SECTION (CH1 - CH4)INPUT LOSS 1-2 AIS RCVD 1-2
INPUT LOSS 3-4
AIS RCVD 3-4
2 2 MBSYSTEM
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ROI-S04488
Fig. 2-2 Functi onal Blo ck Diagram of IDU in 1+1 System (2/4)
D-ACONV 4 PH
MODD-A
CONV
DIGFIL
DIFENC
SCRB
PARITYCHECK
MUX
PLSMON
MSTCLK
MON
TIMGEN
P-SCONV
PLS MONTX FPLSTX CLK
g
s
y
SERIAL ALM
F SYNC ALM
AIS CTRL
From/ToFIG. 2-2 (1/4)
S-PCONV
A-DCONV
A-DCONV
BERDET
F SYNC
DIFDECDSCRB
TIMGEN
DEMUX
RX FPLS12M CLKRX CLK
No. 2 MD UNIT
(SAME AS ABOVE)
2 1
CLK MON
RXSW
H
H
H
H
H
H
H
H
h
g
f
e
d
c
b
a
x
w
H
H
SW
RXSW
ETHERNET SW
SPEED CONVPORT2
PORT110 BASE-T100 BASE-TX
EOWIN/OUT
LAN INTFC *
p
o
n
m
l
k
j
i
u
t
v
RX SW/HL SW
RXSW
To RX SWRX SW CONT6From FIG. 2-2 (4/4)
H ASC/DSC/ALM INTFC *
B-U CONV/DPUU-B CONV/DPU
64K/SC LAN INTFC *H
IN
OUT
OW/DSC/ASC
IN
OUT
DSC/64K/
RX CLK LOSSFrom/To FIG. 2-2 (4/4)
4 3
DPU
No. 1 MD UNITSW UNIT
Note: * Optional.
From/ToFIG. 2-2 (1/4)
From/To FIG. 2-2 (4/4)TX CLK LOSS
From/ToFIG. 2-2 (1/4)
MDP
850 MHzVCO
PCMCODEC
CLK MON
H
WS/SC LAN INTFC *IN
OUT
WS/SC LAN
B-U CONV/DPU
U-B CONV/DPU
SW
ASC/EOW
A-D CONV/LEV CONV
(RJ45)
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ROI-S04488
Fig. 2-2 Functi onal Blo ck Diagram of IDU in 1+1 System (3/4)
TX SW CTRLFrom/To FIG. 2-2 (4/4)
From/To FIG. 2-2 (2/4)
S/P
5
F
I
INTFC SERIAL
a A
BCD
JBER ALMF SYNC ALM
DATA UP
DATA DOWNCPU CLKTX DPU ALM
From/To FIG. 2-2 (2/4)
FE LB CTRL R 1-4
DPUSERIAL
FE LB ANS R 1-4INPUT LOSS 1-4
AIS RCVD 1-4NE LB ANS 1-4TX IN CLK LOSS
RX IN CLK LOSSOUTPUT LOSS 1-4 AIS SEND 1-4DEM ALML BER ALMH BER ALM
ODUSERIAL
DPUSERIAL
CPU ALM
P/SCONV
CPU
S-PCONV
S-PCONV
TX PWR ALM
RX LEV ALM
APC 1 ALM
APC 2 ALM
IF INPUT ALM
ALM CTRL (No. 1 CH)
INPUT LOSS 1-16
AIS RCVD 1-4
TX IN CLK LOSS
RX IN CLK LOSS
OUTPUT LOSS 1-16
DEM ALM
L BER ALM
H BER ALM
FE LB CTRL 1-16
MOD CWNE LB CTRL 1-16
AIS CTRL 1-16
S-PCONV
P/S CONVRESET
CPU
FE LB CTRL
PM CARD*
S/PCONV
P/SCONV
NE LB CTRL
DEM ALMMOD ALM
DPU SERIAL
HE
b
G
c
TX 1 ALM
RX 1 ALM
To FIG. 2-2 (1/4) r SERIAL DATA
LAPORT
NMS/RA
MAIN BOARD 1 SERIAL
MAIN BOARD 2 SERIAL
d
e
f
TX 2 ALM
From FIG. 2-2 (4/4)
From/To FIG. 2-2 (2/4)
From/To FIG. 2-2 (2/4)
RX 2 ALM
From/To FIG. 2-2 (1/4)
(SAME AS ABOVE)
ALM CTRL (No. 2 CH)
To FIG. 2-2 (4/4)
5
r
PTS
KLMNROQ
TX SW CTRL
INTFC SERIALBER ALMF SYNC ALM
DATA UPDATA DOWNCPU CLKTX DPU ALMDEM ALMMOD ALMDPU SERIAL
SERIAL DATA
INTERFACE TERMINAL
PHOTOCOUPLERs
RELAYs HOUSEKEEPINGOUTPUT
HOUSEKEEPINGINPUT
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Fig. 2-2 Functi onal Bloc k Diagram of IDU in 1+1 System (4/4)
MOD 1 ALM
S/P
S/P
S/P
TX CLK LOSS 11
TX SW CTRLTX CLK LOSS 2
RX CLK LOSS 1
RX SW CTRLRX CLK LOSS 2
6
52
3
4
To FIG. 2-2 (3/4)From FIG. 2-2 (2/4)
From/To FIG. 2-2 (2/4)
TX 1 ALMa
TX 2 ALM
RX 1 ALM
d
b
TX DPU 1 ALMTX PWR 1 ALM
APC 11 ALM APC 12 ALMIF INPUT 1 ALMOPR 1 ALM
MOD 2 ALMTX DPU 2 ALMTX PWR 2 ALM
APC 21 ALM APC 22 ALMIF INPUT 2 ALMOPR 2 ALM
APC 11 ALM APC 12 ALMRX LEV 1 ALMOPR 1 ALMF ASYNC 1 ALMDEM 1 ALMBER 1 ALM
APC 21 ALM APC 22 ALMRX LEV 2 ALMOPR 2 ALMF ASYNC 2 ALMDEM 2 ALM
BER 2 ALM
S/PRX 2 ALM
e
From/To FIG. 2-2 (3/4)
cMAIN BOARD 1 SERIAL
S/P
S/Pf MAIN BOARD 2 SERIAL
TX PWR 1 ALM APC 11 ALM
MUX ALM 1
RX LEV 1 ALMOUTPUT LOSS 1-4H BER 1 ALM
FE LB CTRL 1-4MOD 1 CWNE LB CTRL 1-4
AIS CTRL S 1-4
APC 12 ALMIF INPUT 1 ALMINPUT LOSS 1-4
TX PWR 2 ALM APC 21 ALM
MUX ALM 2
RX LEV 1 ALMOUTPUT LOSS 1-4H BER 1 ALM
FE LB CTRL 1-4MOD 1 CWNE LB CTRL 1-4
AIS CTRL S 1-4
APC 22 ALMIF INPUT 1 ALMINPUT LOSS 1-4
RX SWCTRL LOGIC
TX SWCTRL LOGIC
From FIG. 2-2 (2/4)
From/To FIG. 2-2 (2/4)
ALM CTRL (COMMON)
OPRSEL
No. 1I
AUTOI
No. 2
RL 1
RL 2
RL 3
RL 4
RL 5
RL 6
RL 8
RL 7
MAINT
Notes : 1. Eight relay contacts are outputed from interface terminal (ALM TERMINAL). Plural alarmscan be applied to a single relay. The figure shows the default settings. Refer to paragraph3.4 for changing the settings.
2. Refer to the table 3.2 for Interface Terminals and Jacks for the details of pin assignment forthe alarm signals.
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2.1 Transmit Line Equalization
This section describes the bipolar-to-unipolar code conversion,multiplexing and parallel-to-serial conversion.
2.1.1 Bipolar-to-Unipolar Code Conversion
The signals applied to the TRAFFIC IN terminal are (*) 2.048 Mbps datastreams in a bipolar pulse format of the high density bipolar-3 (HDB-3)code. Each bipolar-coded data stream is converted into an NRZ unipolardata stream.
Note: *2 MB 2 system: two
2 MB 4 system: four 2 MB 8 system: eight 2 MB 16 system: sixteen
2.1.2 Multiplexing
To obtain time slots for multiplexing, the 2.048 Mbps N data streams arewritten in to a buffer memory and read out with radio section clock havinga time gap. The data streams having a time gap are sent to a multiplexer(MUX) circuit, here, alarm information, AIS RCVD, loopback control/answer, alarm/control signals and stuff information bits, etc. are insertedinto the location of the time gap.
2.1.3 Parallel-to-Serial Conversion
The signal streams which are formatted in radio frame, are fed to the DPUcircuit.
2.2 Transmit Digital Processing
This section describes the multiplexing, scrambling and parity check.
2.2.1 Multiplexing
The data streams having a time gap are sent to the MUX in which frame pattern, multiframe pattern, analog service channel (ASC), digital servicechannel (DSC), WS, LAN data signals and parity check bits are insertedinto the respective locations of the time gap. The multiplexed data streamsare fed to the SCRB circuit.
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2.2.2 Scrambling
To smooth the RF spectrum and to restore the clock at the receiving end,the multiplexed data streams are scrambled with the 12th (for 4 x 2 MB) or14th (for 2 x 2 MB, 8 x 2 MB and 16 x 2 MB,) pseudo random patterngenerated by the timing generator (TIM GEN) so that the transmissionmark ratio is 1/2. Then the scrambled data stream is sent to the differentialencoder (DIFF ENCOD).
2.2.3 Parity Check
For detecting the bit error at the receiving end, the parity check bits are
calculated and multiplexed into the radio frame signal streams.
2.3 Modulation
This section describes the differential encoding, 4-phase shift keyingmodulation and orderwire signal modulation.
2.3.1 Differential Encoding
In the 4-phase shift keying modulation system, the demodulator phase maynot coincide with the modulation signal of the opposite transmitting end
which give raise to phase ambiguity. To avoid this, an absolute reference phase is needed between the transmitting and receiving ends.
As shown in Table 2-1, the two independent data streams fed from theSCRB circuit are represented as an arrangement of Gray-coded binarydigits. The two-bit Gray-coded data streams are then converted into pulsestreams in natural binary code for facilitating differential encoding.
Table 2-1 Binary Combinations
DECIMAL GRAY CODE NATURALBINARY CODE
0 0 0 0 01 0 1 0 1
2 1 1 1 0
3 1 0 1 1
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Table 2-2 shows typical operation of the differential encoding circuit.
Phases in the natural-binary-coded pulse streams are accumulated inquaternary notation at every time slot. The data streams thus encoded arereconverted into pulse streams in gray code and then sent to a driver.
Note: * Operating process given above assumes that the initial time slotis 0.
2.3.2 4-Phase Shift Keying Modulation
To permit 4-phase shift keying modulation, the encoded data streams areconverted into two separate two-level baseband signals for the P and Qchannels by the digital-to-analog converter (D-A CONV) on the MODsection according to the logical status (see Fig. 2-3). To limit theassociated transmitter output power spectrum, the voltage spectrum of thetwo-level baseband signal is shaped by each low-pass filter. The filteredsignals are applied to a 4-phase modulator (4PH MOD).
To obtain an 850 MHz IF carriers for 4PH MOD, an 850 MHz carrier isgenerated by the 850 MHz voltage controlled oscillator (VCO), and is splitinto two for the P and Q channels. The 850 MHz carrier for the Q channelis phase-shifted by /2 from the P channel.
The MOD modulates each of the 850 MHz carriers with a related two-level baseband signal, and combines the modulated 850 MHz signals on
the P and Q channels to arrange a four-phase assignment as shown in Fig.2-2.
The obtained 850 MHz IF signal is filtered by a LPF for eliminating theout-of-band components, amplified up to the required level by anautomatic gain control (AGC) amplifier and sent to the ODU. Then, it iscombined with 450 kHz amplitude-modulated engineering orderwire(EOW) signal and 10 MHz amplitude shift keying (ASK)-modulatedcontrol signal.
Table 2-2 Typical Operation of Differential Encoding Circuit
TIME SLOT 0* 1 2 3 4 5 6 7 8 9 10 11 ...
NATURAL-BINARY-CODEDDATA
Data 1 0 1 1 1 0 1 0 1 0 1 0 ...
Data 2 1 1 0 0 0 0 1 1 0 1 1 ...
Quaternary 1 3 2 2 0 2 1 3 0 3 1 ...
ENCODEDDATA
Quaternary 0 1 0 2 0 0 2 3 2 2 1 2 ...
Data 1 0 0 0 1 0 0 1 1 1 1 0 1 ...
Data 2 0 1 0 0 0 0 0 1 0 0 1 0 ...
+ + + + +
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Fig. 2-3 PSK Modulation
2.3.3 Orderwire Signal Modulation
To facilitate an EOW between the IDU and ODU, the EOW signal isamplitude-modulated with the 450 kHz carrier by the orderwire modulator(EOW MOD) on the MOD section. The modulated EOW signal is filteredto eliminate higher out-of-band noise, amplified up to the required leveland combined with the 850 MHz IF signal through a band-pass filter(BPF). This eliminates lower out-of-band noise, receiving IF signal (70MHz), and an arrester (ARSR) protecting the equipment from harmfulvoltages caused by lightning.
2.4 Demodulation
This section describes the EOW and alarm signal demodulation, mainsignal demodulation and differential decoding.
2.4.1 EOW and Alarm Signal Demodulation
The received (RX) signal from the ODU contains a 70 MHz IF signal, 468kHz amplitude-modulated EOW signal and 10 MHz ASK-modulatedalarm (ALM) signal. The RX signal is branched into two separate signals;One is sent to the DEM section through the BPF which eliminates the
transmitting IF, EOW and ALM signals, and the other goes through a BPFwhich eliminates the 70 MHz IF signal. The orderwire demodulator (EOWDEM) demodulates the 468 kHz amplitude-modulated EOW signal. Thedemodulated 10 MHz ASK alarm signal is sent to the CPU for further
processing.
P
-L
Q-L +L
+L
/2
3 /2
0
STATUS P CHANNEL Q CHANNEL
1(0) -L -L
2(/2) -L +L
3() +L +L
4(3 /2) +L -L
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2.4.2 Main Signal Demodulation
The incoming 70 MHz IF signal is amplified up to the required level by anAGC amplifier and split into two separate signals for the P and Q channelsand then fed to the mixer. In addition to the 70 MHz IF signals, twocarriers having a phase difference of /2 produced by the carrier recoverycircuit, which consists of a carrier synchronizer, a 70 MHz oscillator, and acarrier splitter ( /2), are applied to the decision circuit. In the decisioncircuit, each 70 MHz IF signal is coherent-detected with the related carrierto represent the original baseband signal corresponding to the phaseassignment (see Fig. 2-4).
Fig. 2-4 Demodulation
The clock oscillator circuit generates a 38.383 MHz clock for the analog-to-digital converter (A-D CONV) circuits. In the A-D CONV, two 38.383Mbps data streams are regenerated with 38.383 MHz clock. Then the twore-generated 38.383 data streams enter the differential decoding (DIFFDECOD) circuit.
2.4.3 Differential Decoding
The process of differential decoding is the reverse of the differentialencoding at the transmitting end. In the natural binary-coded pulsestreams, the phase of the time slot leading one bit before an incoming timeslot is subtracted in quaternary notation from that of the incoming timeslot. The decoded 38.383 Mbps data streams are sent to the framesynchronizer and descramblers on the DPU section of the MAIN BOARDfor receive digital processing.
Note: 1 is replaced by logic 0 and +1 by logic 1.
/2
3 /2
0
INPUTPHASE
DETECTED OUTPUT
P CHANNEL Q CHANNEL
0 -1 -1
/2 -1 +1
+1 +1
3/2 +1 -1
CARR 1
CARR 2
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2.5 Receive Digital Processing
This section describes the frame synchronization, descrambling anddemultiplexing.
2.5.1 Frame Synchronization
FS bits which are multiplexed at the transmitting end are detected andcomparing to establish the frame synchronizer.
2.5.2 Descrambling
To recover original data streams from received data streams, descramblingis performed by using the same frame pattern as the transmitting end.
2.5.3 Demultiplexing
The two descrambled data streams enter the demultiplexer (DEMUX).The DEMUX circuit extracts the frame pattern, multiframe pattern, ASCand DSC signal bits, etc. from overhead bits with a clock produced at theTIM GEN.
2.6 Receive Line EqualizationThis section describes the demultiplexing and unipolar-to-bipolar codeconversion.
2.6.1 Demultiplexing
From received data streams, the alarm information, AIS RCVD, loopbackcontrol/answer and stuff information bits, etc. are extracted by theDemultiplexer (DEMUX) circuit. Then, 2.048 Mbps x N unipolar data/CLK signals are fed to the next U/B CONV circuit.
2.6.2 Unipolar-to-Bipolar Code Conversion
To provide the associated DTE with the original data stream in bipolar pulse format, the unipolar-coded 2.048 Mbps data streams are convertedinto 2.048 Mbps data streams in the specified bipolar pulse format (HDB3)
by the U-B CONV circuit on the INTFC section.
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2.7 Analog Service Channel Signal Transmission (Optional)
An analog service channel (ASC) transmission is performed in the ASCINTFC section, which provides the pulse code modulation codec (PCMCODEC) and PCM decodec (PCM DECOD) circuits. The ASCtransmission is described in accordance with transmission side and receiveside, respectively.
2.7.1 ASC Transmit Side
An analog signal applied to the ASC IN terminal is passed on to PCMCODEC circuit. An analog signal is converted into a 80 kbps (approx.)
digital signal at the PCM CODEC circuit by 10 kHz (approx.) timing pulseand 80 kHz (approx.) clock signal received from the MAIN BOARD. Theconverted digital signal is fed to the MAIN BOARD.
2.7.2 ASC Receive Side
The 80 kbps (approx.) digital signal received from the MAIN BOARD isapplied to the PCM DECOD circuit. This 80 kbps (approx.) bps digitalsignal is converted into an analog signal by the 10 kHz (approx.) timing
pulse and 80 kHz (approx.) clock signal, and then the analog signal is fedto the ASC OUT terminal.
2.8 9.6 K Digital Service Channel Transmission
The 9.6 K digital service channel (DSC) transmission is explained in thefollowing section:
TRANSMISSION CHANNEL
DSC 1 and DSC 2 MAIN BOARD
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2-24
2.8.1 DSC Transmit Side
The DSC signal received from DSC IN terminal is applied to levelconverter circuit. Here, the DSC signal is converted into 9.6 K transistor-transistor logic (TTL) level in the level converter and fed to the digital
processing unit (DPU) circuit on the MAIN BOARD. In the DPU circuit,9.6 K (TTL) signal is converted into 40 kbps (approx.) with 40 kHz(approx.) clock produced at the MAIN BOARD, and fed to the oppositestation.
2.8.2 DSC Receive Side
The 40 kbps (approx.) extracted from DPU circuit on the MAIN BOARDis converted into 9.6 K (TTL) signal with 9.6 kHz clock. The 9.6 K (TTL)signal is converted into 9.6 K DSC signal in the level converter, and fed tothe DSC OUT terminal.
2.9 Alarm Signal Transmission
With optional ALM INTFC card, two channels cluster alarm transmission provides for external/internal alarm signal extension.
2.10 Wayside Signal Transmission (Optional)
The wayside (WS) signal transmission is performed in the WS INTFCsection.
2.10.1 WS Transmit Side
The 2.048 Mbps bipolar signal applied through the WS IN terminal is fedto the bipolar-unipolar converter (B-U CONV) circuit, where it isconverted into a NRZ unipolar signal. NRZ unipolar signal is code-converted by the HDB-3 decoder. The code-converted 2.048 Mbps WSdata signal is fed to the MAIN BOARD together with the clock.
2.10.2 WS Receive Side
The process of RX side is the reverse of the process of the TX side. The2.048 Mbps WS data signal and clock are applied to the HDB-3 encoder.In the HDB-3 encoder, 2.048 Mbps WS signal is code-converted and fedto unipolar-bipolar converter (U-B CONV). The 2.048 Mbps unipolardata signal is converted into the 2.048 Mbps bipolar data stream and fed tothe WS OUT terminal.
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2.11 64 K Digital Service Channel Transmission
Two types of transmission are provided for the service channel:codirectional transmission conforming to ITU-T G.703 and transmissionconforming to V.11. Each transmission scheme corresponds to the type of64K INTFC section.
2.11.1 Service Channel Transmission of G.703 Codirectional
(a) TX SideA 64 kbps bipolar signal is applied to the 64K INTFC section, thenconverted to a unipolar signal by the B-U CONV circuit. Theunipolar signal is then code-converted with a decoder. The code-converted signal is stuff-synchronized with 80 kHz (approx.)clock, then converted into a radio transmission format. Afterconversion, a 80 kbps (approx.) data signal is fed to the MAINBOARD.
(b) RX SideThe process of RX side is the reverse of the process of the TX side.A 80 kbps (approx.) data signal and the 80 kHz (approx.) clocksignal from the MAIN BOARD are entered in the synchronizercircuit for the frame synchronization. The frame synchronized datasignal is de-stuffed and converted into 64 kbps data signal. The
resulting 64 kbps data signal is code-converted into G.703 signalwith an encoder circuit, then converted again with the unipolar-
bipolar converter (U-B CONV) circuit into a 64 kbps bipolar datasignal which is transmitted to the output terminal.
2.11.2 Service Channel Transmission of V.11
(a) TX SideThe 64 kbps (approx.) unipolar data signal and the 64 kHz(approx.) clock signal are entered into 64K INTFC section. The 64kbps unipolar data signal undergoes stuff-synchronization with the
80 kHz (approx.) clock signal, then is converted into a format forthe radio transmission and fed to the MAIN BOARD as a 80 kbps(approx.) data signal.
(b) RX SideThe process of RX side is the reverse of the process of the TX side.The 80 kbps (approx.) unipolar data signal from the MAINBOARD and the 80 kHz (approx.) clock signal are entered into64K INTFC section. The data signal then is frame synchronizedwith the frame synchronizer circuit, then de-stuffed converted intoa 64 kbps unipolar data signal with a 64 kHz clock signal, and isfed to the output terminal.
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2.12 LAN Signal Transmission (Optional)
When the LAN INTFC module is used.
The data signal for LAN (10BASE-T or 100BASE-TX) transmission is performed in the LAN INTFC module. Radio section throughput isselectable for each port. When 2 Mbps throughput is selected, ITU-TG.704 framing mode setting is available.
When the SC LAN INTFC module is used.
LAN Signal Transmission which used WS and the DSC transmission way(Optional).The data signal for LAN(10BASE-T) transmission is
performed in the SC LAN INTFC module. A throughput is decided by
data transmission capacity of equipment. When data transmission capacityis 16x2MB, it is set to about 2 Mbps, and it is set to about 80 kbps whenother.
2.12.1 Transmit Side
When the LAN INTFC module is used.
The data signal applied through the LAN PORT1 and/or PORT2 terminalsis fed to the LAN signal Switch Circuit which selects 10BASE-T or 100BASE-TX. The data signal is converted to HDLC like frame for radiotransmission and multiplexed with specified frame in the main data signal.
When the SC LAN INTFC module is used.
The data signal applied through the WS/SC LAN terminal. The data signalis converted to HDLC like frame for radio transmission and multiplexedwith specified frame in the main data signal.
2.12.2 Receive Side
When the LAN INTFC module is used.
The data signal for LAN network is extracted from the main data signal.This data signal is performed HDLC like frame detection and fed to theLAN signal switch. The data signal from the LAN signal switch is outputthrough the LAN PORT1 and/or PORT2 terminals.
Note: The switching of data between PORT1 and PORT2 is notavailable.
When the SC LAN INTFC module is used.
The data signal for LAN network is extracted from the main data signal.This data signal is performed HDLC like frame detection and fed to theLAN signal switch. The data signal from the LAN signal switch is outputthrough the WS/SC LAN terminal.
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2.13 Alarm and Control Functions
Alarm and control functions of the IDU are described herein. Faultdetection circuits are provided in the IDU, sending signals to give alarmindications and remote alarm reports (see Fig. 2-1, Fig. 2-2 and Table 2-3).
The alarm signals initiated by detection circuits in the ODU are also sent tothe IDU. Therefore, the total alarm indications for the IDU and ODU are
provided by the IDU and ODU indicators on the IDU. When theequipment is operating normally, these indicators on the IDU stay unlit.When an abnormal condition occurs in the IDU (except power supplyfailure), the IDU indicator lights and a remote alarm report is made. Thesame applies for the ODU indicator.
To monitor/control the alarm and status of IDU/ODU, PM CARD modulecommunicates with pasolink network management system (PNMS) or
pasolink network management terminal (PNMT) via RS-232C (19.2kbps).
The PM CARD (Pasolink Management Card) provides the followingfunctions:
Communication with PNMS and PNMT
Communication with ALM CONT of the IDU
Communication with opposite PM CARD
Data collection of performance monitor
Forward input housekeeping alarm signals to PNMS or PNMT
Outputs of dry contact by control from PNMS or PNMT
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2-28
The PM CARD collects up to 300 items of events and performance
information from IDU and ODU, and stores performance information forup to eight days.
Notes in the Table 2-3 are as follows.
Notes:*1. These alarms are initial value condition (for setting method,refer to paragraph 3.4.2 in this Section III).
* 2. The alarm indication depends on system requirement (for setting method, refer to paragraph 3.4.2 in this Section III).
* 3. The WS alarm indications can be inhibited. The WS alarmitems are masked when the WS is not provided.
1. In an alarm condition, when the equipment is set tomaintenance condition, the TX ALM, RX ALM and BER ALM
for remote reporting are disabled.
2. When the IF cable between the IDU and ODU is electric shortcircuit condition or open condition, the IDU and ODU ALM
LEDs are synchronously flashing.
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(This page is intentionally left blank.)
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3-1
3. OPERATION
This section provides instructions for operation of the IDU. Included isinformation on the interface terminals, interface jacks, controls, indicators,test jacks, equipment start-up and equipment shut-down.
3.1 Interface Terminals and Jacks
The IDU has interface terminals and jacks to interconnect data signals,alarm, IF signals and line power with the associated equipment. Theseinterface terminals and jacks are located on front of the equipment asshown in Fig. 3-1 and Fig. 3-2. The details of terminals and jacks forsignal interface are described in Table 3-1 and Table 3-2.
Caution: In back -to-back connection, the interface conditions of the PM CARD must be matched between two IDUs. Then,check the setting of the interface if it is RS-485 or RS-232Cbefore connecting the cable.
Fig. 3-1 Front View of the IDU for Interface Connectors and Jacks in 1+0 System
IDU
Without LAN option
With LAN option
TRAFFIC IN/OUT (CH1 to CH8) ALM/AUX ALM OW/DSC/ASC LA PORTNMS/RA
TRAFFIC IN/OUT (CH9 to CH16)
NMS LANWS/SC LANPORT1 PORT2
100M 100MIFIN/OUT
CALL RESET
MAINT
IDUODU
SELV
PWR
FUSE (7.5A)
EOW PASOLINK
+
TRAFFIC IN/OUT (CH1 to CH8) ALM/AUX ALM OW/DSC/ASC LA PORTNMS/RA
TRAFFIC IN/OUT (CH9 to CH16)
NMS LANWS/SC LAN
CALL RESET
MAINT
IDUODU
SELV
PWR
FUSE (7.5A)
EOW PASOLINK
+
IFIN/OUT
TRAFFIC IN/OUT (CH1 to CH8) ALM/AUX ALM OW/DSC/ASC LA PORTNMS/RA
NMS LANSC LAN
CALL RESET
MAINT
IDUODU
SELV
PWR
FUSE (7.5A)
EOW PASOLINK
+
TRAFFIC IN/OUT (CH1 to CH4) ALM/AUX ALM OW/DSC/ASC LA PORTNMS/RA
NMS LANSC LAN
CALL RESET
MAINT
IDUODU
SELV
PWR
FUSE (7.5A)
EOW PASOLINK
+
IFIN/OUT
TRAFFIC IN
CH1 CH2 CH3 CH4
TRAFFIC OUT
CH1 CH2 CH3 CH4
IFIN/OUT
TRAFFIC IN
CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8
TRAFFIC OUT
CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8
With BNC Interface Connector (For 4 CH)
With BNC Interface Connector (For 8 CH)
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Table 3-1 Interface Terminals and Jacks in 1+0 system (1/12)
Terminal Description
IDU
TRAFFIC IN/OUT(CH 1 to CH 8)
(D-sub Connector, 37 Pins)
2.048 Mbps HDB-3 coded data input/output from/to DTE(CH 1 to CH 8), (Selectable 120-ohm, balanced/75-ohm,unbalanced)
Pins 1 (+) and 2 ( ) CH8 data input
Pins 3 (+) and 4 ( ) CH7 data input
Pins 6 (+) and 7 ( ) CH6 data inputPins 8 (+) and 9 ( ) CH5 data input
Pins 11 (+) and 12 ( ) CH4 data input
Pins 13 (+) and 14 ( ) CH3 data input
Pins 16 (+) and 17 ( ) CH2 data input
Pins 18 (+) and 19 ( ) CH1 data input
Pins 20 (+) and 21 ( ) CH8 data output
Pins 22 (+) and 23 ( ) CH7 data output
Pins 25 (+) and 26 ( ) CH6 data output
Pins 27 (+) and 28 ( ) CH5 data output
Pins 29 (+) and 30 ( ) CH4 data output
Pins 31 (+) and 32 ( ) CH3 data output
Pins 34 (+) and 35 ( ) CH2 data output
Pins 36 (+) and 37 ( ) CH1 data output
Pins 5,10,15,24 and 33 Ground
TRAFFIC IN/OUT (CH 9 to CH 16)
(D-sub Connector, 37 Pins)
2.048 Mbps HDB-3 coded data input/output from/to DTE(CH 9 to CH 16) (Selectable 120-ohm, balanced/75-ohm,unbalanced) (for 16 x 2 MB system only)
Pins 1 (+) and 2 ( ) CH16 data input
Pins 3 (+) and 4 ( ) CH15 data input
Pins 6 (+) and 7 ( ) CH14 data input
Pins 8 (+) and 9 ( ) CH13 data input
Pins 11 (+) and 12 ( ) CH12 data input
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Pins 13 (+) and 14 ( ) CH11 data input
Pins 16 (+) and 17 ( ) CH10 data input
Pins 18 (+) and 19 ( ) CH9 data input
Pins 20 (+) and 21 ( ) CH16 data output
Pins 22 (+) and 23 ( ) CH15 data output
Pins 25 (+) and 26 ( ) CH14 data output
Pins 27 (+) and 28 ( ) CH13 data output
Pins 29 (+) and 30 ( ) CH12 data output
Pins 31 (+) and 32 ( ) CH11 data output
Pins 34 (+) and 35 ( ) CH 10 data output
Pins 36 (+) and 37 ( ) CH 9 data output
Pins 5,10,15,24 and 33 Ground
TRAFFIC IN/OUT with BNC (CH 1 to CH 8)
(D-sub Connector, 37 Pins)
2.048 Mbps HDB-3 coded data input/output from/to DTE(CH 1 to CH 8) (for 2/4/8 x 2 MB system only) (Fixed 120-
ohm, balanced)Pins 1 (+) and 2 ( ) CH8 data input
Pins 3 (+) and 4 ( ) CH7 data input
Pins 6 (+) and 7 ( ) CH6 data input
Pins 8 (+) and 9 ( ) CH5 data input
Pins 11 (+) and 12 ( ) CH4 data input
Pins 13 (+) and 14 ( ) CH3 data input
Pins 16 (+) and 17 ( ) CH2 data input
Pins 18 (+) and 19 ( ) CH1 data input
Pins 20 (+) and 21 ( ) CH8 data output
Pins 22 (+) and 23 ( ) CH7 data output
Pins 25 (+) and 26 ( ) CH6 data output
Pins 27 (+) and 28 ( ) CH5 data output
Pins 29 (+) and 30 ( ) CH4 data output
Pins 31 (+) and 32 ( ) CH3 data output
Table 3-1 Interface Terminals and Jacks in 1+0 system (2/12)
Terminal Description
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ROI-S04488 OPERATION
3-5
Pins 34 (+) and 35 ( ) CH2 data output
Pins 36 (+) and 37 ( ) CH1 data output
Pins 5,10,15,24 and 33 Ground
TRAFFIC IN 75 (CH 1 to CH 8)(BNC, Female)
2.048 Mbps HDB3 coded data signal input from DTE(CH 1 to CH 8), (for 2/4/8 x 2 MB system only), (Fixed 75-ohm, unbalanced)
CH1 BNC CH1 data input
CH2 BNC CH2 data input
CH3 BNC CH3 data input
CH4 BNC CH4 data input
CH5 BNC CH5 data input
CH6 BNC CH6 data input
CH7 BNC CH7 data input
CH8 BNC CH8 data input
TRAFFIC OUT 75 (CH 1 to CH 8)(BNC, Female)
2.048 Mbps HDB3 coded data signal output to DTE(CH 1 to CH 8),(for 2/4/8 x 2 MB system only), (Fixed 75-ohm, unbalanced)
CH1 BNC CH1 data output
CH2 BNC CH2 data output
CH3 BNC CH3 data output
CH4 BNC CH4 data output
CH5 BNC CH5 data output
CH6 BNC CH6 data outputCH7 BNC CH7 data output
CH8 BNC CH8 data output
Table 3-1 Interface Terminals and Jacks in 1+0 system (3/12)
Terminal Description
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OPERATION ROI-S04488
3-6
TRAFFIC IN/OUT with BNC (CH 1 to CH 4)
(D-sub Connector, 37 Pins)
2.048 Mbps HDB-3 coded data input/output from/to DTE(CH 1 to CH 4), (for 4 x 2 MB system only), (Fixed 120-ohm,
balanced)
Pins 11 (+) and 12 ( ) CH4 data input
Pins 13 (+) and 14 ( ) CH3 data input
Pins 16 (+) and 17 ( ) CH2 data input
Pins 18 (+) and 19 ( ) CH1 data input
Pins 29 (+) and 30 ( ) CH4 data output
Pins 31 (+) and 32 ( ) CH3 data output
Pins 34 (+) and 35 ( ) CH2 data output
Pins 36 (+) and 37 ( ) CH1 data output
Pins 5,10,15,24 and 33 Ground
TRAFFIC IN 75 (CH 1 to CH 4)(BNC, Female)
2.048 Mbps HDB3 coded data signal input from DTE(CH 1 to CH 4), (for 4 x 2 MB system only), (Fixed 75-ohm,unbalanced)
CH1 BNC CH1 data input
CH2 BNC CH2 data input
CH3 BNC CH3 data input
CH4 BNC CH4 data input
TRAFFIC OUT 75 (CH 1 to CH 4)(BNC, Female)
2.048 Mbps HDB3 coded data signal output to DTE(CH 1 to CH 4), (for 4 x 2 MB system only), (Fixed 75-ohm,unbalanced),
CH1 BNC CH1 data output
CH2 BNC CH2 data output
CH3 BNC CH3 data output
CH4 BNC CH4 data output
Table 3-1 Interface Terminals and Jacks in 1+0 system (4/12)
Terminal Description
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ROI-S04488 OPERATION
3-7
10/100BASE-T IN/OUT(Modular Connector RJ-45 8pins)
(PORT1/PORT2)
LAN signal input/output (optional) (MDI-X/MDI auto-sensing)
MDI-X MDI
Pin 1 RD + TD +
Pin 2 RD TD
Pin 3 TD + RD +
Pin 6 TD RD
IF IN/OUT(N-P Connector)
TX IF signal output to ODU and RX IF signal input fromODU
Caution: Do not connect other cables to this jack, becausethe 43 V DC power is superimposed on this
jack.
Danger: Do not touch the jack core before turning off power switch.
Table 3-1 Interface Terminals and Jacks in 1+0 system (5/12)
Terminal Description
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OPERATION ROI-S04488
3-8
OW/DSC/ASC(D-sub Connector, 25 Pins)
Engineering orderwire (EOW), digital service channel (DSC),analog service channel (ASC) and ALARM signal input/output
Pins 1 (+) and 2 ( )/Pins 1 and 2* 2
ASC1 input (VF) (optional), DSC 3 input (optional) orAlarm1* 2 input (optional)
Notes: 1. * 2 Applies to the ALM INTFC module.2. Cluster Alarm 1 input (photocoupler)
Normal signal in : Open
Alarm signal in : Closed Pins 3 (+) and 4 ( )/Pins 3 and 4* 2
ASC2 input (VF) (optional), DSC 4 input (optional) orAlarm2* 2 input (optional)
Notes: 1. * 2 Applies to the ALM INTFC module.2. Cluster Alarm 2 input (photocoupler)
Normal signal in : Open Alarm signal in : Closed
Pins 5 (+) and 6 ( ) EOW input (VF)
Pins 7 (+) and 8 ( ) 64 kHz clock input* 1
Pins 9 (+) and 10 ( ) DSC1 input (RS-232C, 64K (G.703)* 1 or 64K (V.11)* 1 )
Pins 11 (+) and 12 ( ) DSC2 input (RS-232C, RS-422 or RS-485)
Pins 14 (+) and 15 ( )/Pins 14 and 15* 2
ASC1 output (VF) (optional), DSC 3 output (optional) orAlarm1* 2 output (optional)
Notes: 1. * 2 Applies to the ALM INTFC module.2. Cluster Alarm 1 output (relay contact)
Normal signal out : Open Alarm signal out : Closed
Pins 16 (+) and 17 ( )/
Pins 16 and 17*2
ASC2 output (VF) (optional), DSC 4 output (optional) or
Alarm2*2 output (optional)
Notes: 1. * 2 Applies to the ALM INTFC module.2. Cluster Alarm 2 output (relay contact)
Normal signal out : Open Alarm signal out : Closed
Pins 18 (+) and 19 ( ) EOW output (VF)
Pins 20 (+) and 21 ( ) 64 kHz clock output* 1
Pins 22 (+) and 23 ( ) DSC1 output (RS-232C, 64K (G.703)* 1 or 64K (V.11)* 1)
Pins 24 (+) and 25 ( ) DSC2 output (RS-232C, RS-422 or RS-485)
Table 3-1 Interface Terminals and Jacks in 1+0 system (6/12)
Terminal Description
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ROI-S04488 OPERATION
3-9
Pin 13 Ground Notes:1. * 1 Optional
2. Both ASC and DSC 64K cannot be used simultaneously.
ALM/AUX ALM(D-sub Connector, 37 Pins)
Alarm and transmission network surveillance auxiliary alarminput/output
Pins 1 (COM), 2 (NO) and3 (NC)
Transmitter alarm output* 3
Between Between Pins 1 and 2 Pins 1 and 3
Normal state : Open ClosedAlarm state : Closed Open
Pins 4 (COM), 5 (NO) and6 (NC)
Receiver alarm output* 3
Between BetweenPins 4 and 5 Pins 4 and 6
Normal state : Open ClosedAlarm state : Closed Open
Pins 20 (COM), 21 (NO)
and 22 (NC)BER alarm output when BER worse than 10 -6/10 -5/10 -4/10 -3
(selectable)*3
Between BetweenPins 20 and 21 Pins 20 and 22
Normal state : Open ClosedAlarm state : Closed Open
Pins 23 (COM), 24 (NO)and 25 (NC)
Maintenance alarm output* 3
Between BetweenPins 23 and 24 Pins 23 and 25
Normal state : Open ClosedAlarm state : Closed Open
Note:* 3 The BER threshold values and alarm items are setin factory (default). To change the setting of alarmitems by the PC, refer to Section 3.4.1 AlarmTable of this Manual.
(Housekeeping alarm input through optional PM CARD.)
Pin 7 Input 11
Pin 8 (G) Input 12
Pin 9 Input 21
Pin 10 (G) Input 22
Table 3-1 Interface Terminals and Jacks in 1+0 system (7/12)
Terminal Description
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OPERATION ROI-S04488
3-10
Pin 11 Input 31
Pin 12 (G) Input 32
Pin 13 Input 41
Pin 14 (G) Input 42
Pin 15 Input 51
Pin 16 (G) Input 52
Pin 17 Input 61
Pin 18 (G) Input 62(Housekeeping control output through optional PM CARD.)
Pin 26 Output 11
Pin 27 Output 12
Pin 28 Output 21
Pin 29 Output 22
Pin 30 Output 31
Pin 31 Output 32
Pin 32 Output 41
Pin 33 Output 42
Pin 19 Ground
Pins 34 and 35 Not Used Note: Input[ ] indicates the input of housekeeping alarm.
The figure means that same order of tens makes the same pair e.g. 11/12 forms a pair. IDU side interfaceuses that of photo-coupler, the photo-coupler turns
ON if pair elements contact with each other.Output[ ] indicates the output of housekeepingalarm. Figure means the same as in the Input. IDU
side output uses the relay contact interface.
Pin 36 Input terminal of buzzer signal Note: In back-to-back station, the buzzer information
transmits to the next station.
Pin 37 Output terminal of buzzer signal Note: In back-to-back station, the buzzer information
transmits to the next station.
Table 3-1 Interface Terminals and Jacks in 1+0 system (8/12)
Terminal Description
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ROI-S04488 OPERATION
3-11
NMS/RA(D-sub Connector, 15 Pins)
Network management system (NMS) data input/output orremote access (RA) data input/output
Note: When the PM CARD is not mounted on theequipment, this connector is used for Remote Access.
PM CARD RA
Pin 1 Party alarm management system RA TXD (PAMS) TXD
Pin 2 EMS TXD/TXD+ RA GND
Pin 3 EMS RXD/TXD RA RXD
Pin 4 EMS TXDR RA RTS
Pin 5 EMS TRS/RXD+ RA CTS
Pin 6 EMS CTS/RXD
Pin 7 Ground
Pin 9 PAMS RXD
Pin 10 NMS TXD/TXD+
Pin 11 NMS RXD/TXD
Pin 12 NMS TXDR
Pin 13 NMS RTS/RXD+
Pin 14 NMS CTS/RXD
LA PORT(D-sub Connector, 15 pin)
Control/monitoring signal input/output from/to personalcomputer
Pin 1 TXD
Pin 3 RXD
Pin 4 RTS
Pin 5 CTS
Pin 11 LOCAL CTS
Pin 12 LOCAL RTS
Pin 13 LOCAL RXD
Pin 15 LOCAL TXD
Pins 2, 8 and 14 Ground
Table 3-1 Interface Terminals and Jacks in 1+0 system (9/12)
Terminal Description
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OPERATION ROI-S04488
3-12
NMS LAN(RJ45 8 pins)
Network management station (PNMS) data input/output
Pin 1 LAN PNMS TX+
Pin 2 LAN PNMS TX
Pin 3 LAN PNMS RX+
Pin 6 LAN PNMS RX
WS /SC LAN(RJ45 8 pins) Way side signal input/output
For 120 ohms balanced interface
Pin 1 WS OUT (+)
Pin 2 WS OUT ( )
Pin 3 Reserved for SC LAN INTFC
Pin 4 WS IN (+)
Pin 5 WS IN ( )
Pin 6 Reserved for SC LAN INTFCPin 7 open
Pin 8 Frame ground (G)
For 75 ohms unbalanced interface
Pin 1 WS OUT
Pin 2 Reserved for WS INTFC (120 ohms balance)
Pin 3 Reserved for SC LAN INTFC
Pin 4 WS IN
Pin 5 Reserved for WS INTFC (120 ohms balance)
Pin 6 Reserved for SC LAN INTFC
Pin 7 open
Pin 8 WS IN/OUT (G)
Table 3-1 Interface Terminals and Jacks in 1+0 system (10/12)
Terminal Description
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ROI-S04488 OPERATION
3-13
Do not connect any cable to the "Reserved" pins.
Note: Available if WS INTFC is equipped. Disable when SC LAN INTFC is equipped. When WS signal is connected between two IDUs,
perform wiring as follows.
Table 3-1 Interface Terminals and Jacks in 1+0 system (11/12)
Terminal Description
IDU AWS/SC LAN
(RJ45)
12345678
12345678
IDU BWS/SC LAN(RJ45)
WS (120 ohms)
IDU AWS/SC LAN
(RJ45)
12345
678
12345
678
IDU BWS/SC LAN
(RJ45)WS (75 ohms)
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OPERATION ROI-S04488
3-14
WS /SC LAN(RJ45 8 pins)
DSC data for LAN
Pin 1 LAN DSC TX +
Pin 2 LAN DSC TX
Pin 3 LAN DSC RX +
Pin 4 Reserved for WS INTFC
Pin 5 Reserved for WS INTFCPin 6 LAN DSC RX
Pin 7 open
Pin 8 open
Note: Available when SC LAN INTFC is equipped. Disabled when ALM INTFC, ASC INTFC, DSC INTFC 64K or WS INTFC (in case of 16x2MB) isused.
Do not connect any cable to the "Reserved" pins. When SC LAN signal is connected between two
IDUs, perform wiring as follows.
SEL V (LINE IN)(Molex M5557-4R Connector, 4Pins)
20 V to 60 V/ +20 V to +60 V DC power input Note: The range of DC power input depends on system
requirement.
Pin 1 0 V* 4 (or +48 V* 5)
Pin 2 48 V* 4 (or 0 V* 5) Note: *4 20 V to 60 V DC power input.
*5 +20 V to +60 V DC power input.
FG Frame ground
Table 3-1 Interface Terminals and Jacks in 1+0 system (12/12)
Terminal Description
IDU AWS/SC LAN
(RJ45)
1234567
8
1234567
8
IDU BWS/SC LAN
(RJ45)SCLAN INTFC
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ROI-S04488 OPERATION
3-15
Table 3-2 Interface Terminals and Jacks of 1+1 System (1/14)
Terminal Description
TRAFFIC IN/OUT(CH 1 to CH 8)(D-sub Connector, 37 Pins)
2.048 Mbps HDB3 coded data input/output from/to DTE(CH 1 to CH 8), (Selectable 120-ohm, balanced/75-ohm,unbalanced)
Pins 1 (+) and 2 ( ) CH8 data input
Pins 3 (+) and 4 ( ) CH7 data input
Pins 6 (+) and 7 ( ) CH6 data input
Pins 8 (+) and 9 ( ) CH5 data inputPins 11 (+) and 12 ( ) CH4 data input
Pins 13 (+) and 14 ( ) CH3 data input
Pins 16 (+) and 17 ( ) CH2 data input
Pins 18 (+) and 19 ( ) CH1 data input
Pins 20 (+) and 21 ( ) CH8 data output
Pins 22 (+) and 23 ( ) CH7 data output
Pins 25 (+) and 26 ( ) CH6 data output
Pins 27 (+) and 28 ( ) CH5 data output
Pins 29 (+) and 30 ( ) CH4 data output
Pins 31 (+) and 32 ( ) CH3 data output
Pins 34 (+) and 35 ( ) CH2 data output
Pins 36 (+) and 37 ( ) CH1 data output
Pins 5,10,15,24 and 33 Ground
TRAFFIC IN/OUT
(CH 9 to CH 16)(D-sub Connector, 37 Pins)
2.048 Mbps HDB3 coded data input/output from/to DTE
(CH 9 to CH 16), (Selectable 120-ohm, balanced/75-ohm,unbalanced), (for 16 x 2 MB system only)
Pins 1 (+) and 2 ( ) CH16 data input
Pins 3 (+) and 4 ( ) CH15 data input
Pins 6 (+) and 7 ( ) CH14 data input
Pins 8 (+) and 9 ( ) CH13 data input
Pins 11 (+) and 12 ( ) CH12 data input
Pins 13 (+) and 14 ( ) CH11 data input
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OPERATION ROI-S04488
3-16
Pins 16 (+) and 17 ( ) CH10 data input
Pins 18 (+) and 19 ( ) CH9 data input
Pins 20 (+) and 21 ( ) CH16 data output
Pins 22 (+) and 23 ( ) CH15 data output
Pins 25 (+) and 26 ( ) CH14 data output
Pins 27 (+) and 28 ( ) CH13 data output
Pins 29 (+) and 30 ( ) CH12 data output
Pins 31 (+) and 32 ( ) CH11 data output
Pins 34 (+) and 35 ( ) CH 10 data output
Pins 36 (+) and 37 ( ) CH 9 data output
Pins 5,10,15,24 and 33 Ground
TRAFFIC IN/OUT with BNC (CH 1 to CH 8)
(D-sub Connector, 37 Pins)
2.048 Mbps HDB-3 coded data input/output from/to DTE(CH 1 to CH 8), (for 2/4/8 x 2 MB system only), (Fixed 120-ohm, balanced)
Pins 1 (+) and 2 ( ) CH8 data inputPins 3 (+) and 4 ( ) CH7 data input
Pins 6 (+) and 7 ( ) CH6 data input
Pins 8 (+) and 9 ( ) CH5 data input
Pins 11 (+) and 12 ( ) CH4 data input
Pins 13 (+) and 14 ( ) CH3 data input
Pins 16 (+) and 17 ( ) CH2 data input
Pins 18 (+) and 19 ( ) CH1 data input
Pins 20 (+) and 21 ( ) CH8 data output
Pins 22 (+) and 23 ( ) CH7 data output
Pins 25 (+) and 26 ( ) CH6 data output
Pins 27 (+) and 28 ( ) CH5 data output
Pins 29 (+) and 30 ( ) CH4 data output
Pins 31 (+) and 32 ( ) CH3 data output
Pins 34 (+) and 35 ( ) CH2 data output
Table 3-2 Interface Terminals and Jacks of 1+1 System (2/14)
Terminal Description
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ROI-S04488 OPERATION
3-17
Pins 36 (+) and 37 ( ) CH1 data output
Pins 5,10,15,24 and 33 Ground
TRAFFIC IN 75 (CH 1 to CH 8)(BNC, Female)
2.048 Mbps HDB3 coded data signal input from DTE(CH 1 to CH 8), (for 2/4/8 x 2 MB system only), (Fixed 75-ohm, unbalanced)
CH1 BNC CH1 data input
CH2 BNC CH2 data input
CH3 BNC CH3 data input
CH4 BNC CH4 data input
CH5 BNC CH5 data input
CH6 BNC CH6 data input
CH7 BNC CH7 data input
CH8 BNC CH8 data input
TRAFFIC OUT 75 (CH 1 to CH 8)(BNC, Female)
2.048 Mbps HDB3 coded data signal output to DTE(CH 1 to CH 8),(for 2/4/8 x 2 MB system only), (Fixed 75-ohm, unbalanced)
CH1 BNC CH1 data output
CH2 BNC CH2 data output
CH3 BNC CH3 data output
CH4 BNC CH4 data output
CH5 BNC CH5 data output
CH6 BNC CH6 data output
CH7 BNC CH7 data outputCH8 BNC CH8 data output
Table 3-2 Interface Terminals and Jacks of 1+1 System (3/14)
Terminal Description
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OPERATION ROI-S04488
3-18
TRAFFIC IN/OUT with BNC (CH 1 to CH 4)
(D-sub Connector, 37 Pins)
2.048 Mbps HDB-3 coded data input/output from/to DTE(CH 1 to CH 4), (for 4 x 2 MB system only), (Fixed 120-ohm,
balanced)
Pins 11 (+) and 12 ( ) CH4 data input
Pins 13 (+) and 14 ( ) CH3 data input
Pins 16 (+) and 17 ( ) CH2 data input
Pins 18 (+) and 19 ( ) CH1 data input
Pins 29 (+) and 30 ( ) CH4 data output
Pins 31 (+) and 32 ( ) CH3 data output
Pins 34 (+) and 35 ( ) CH2 data output
Pins 36 (+) and 37 ( ) CH1 data output
Pins 5,10,15,24 and 33 Ground
TRAFFIC IN 75 (CH 1 to CH 4)(BNC, Female)
2.048 Mbps HDB3 coded data signal input from DTE(CH 1 to CH 4), (for 4 x 2 MB system only), (Fixed 75-ohm,unbalanced)
CH1 BNC CH1 data input
CH2 BNC CH2 data input
CH3 BNC CH3 data input
CH4 BNC CH4 data input
TRAFFIC OUT 75 (CH 1 to CH 4)(BNC, Female)
2.048 Mbps HDB3 coded data signal output to DTE(CH 1 to CH 4), (for 4 x 2 MB system only), (Fixed 75-ohm,unbalanced),
CH1 BNC CH1 data output
CH2 BNC CH2 data output
CH3 BNC CH3 data output
CH4 BNC CH4 data output
10/100BASE-T IN/OUT(Modular Connector RJ-45 8pins)
(PORT1/PORT2)
LAN signal input/output (optional) (MDI-X/MDI auto-sensing)
MDI-X MDI
Pin 1 RD + TD +
Pin 2 RD TD
Table 3-2 Interface Terminals and Jacks of 1+1 System (4/14)
Terminal Description
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ROI-S04488 OPERATION
3-19
Pin 3 TD + RD +
Pin 6 TD RD
IF IN/OUT(N-P Connector)
TX IF signal output to ODU and RX IF signal input from ODU
Caution: Do not connect other cables to this jack, becausethe 43 V DC power is superimposed on this jack.
Danger: Do not touch the jack core before turning off
power switch.
Table 3-2 Interface Terminals and Jacks of 1+1 System (5/14)
Terminal Description
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OPERATION ROI-S04488
3-20
OW/DSC/ASC(D-sub Connector, 25 Pins)
Engineering orderwire (EOW), digital service channel (DSC),analog service channel (ASC) and ALARM signal input/output
Pins 1 (+) and 2 ( )/Pins 1 and 2* 2
ASC1 input (VF) (optional), DSC 3 input (optional) orAlarm1* 2 input (optional)
Notes: 1. * 2 Applies to the ALM INTFC module.2. Cluster Alarm 1 input (photocoupler)
Normal signal in : Open Alarm signal in : Closed
Pins 3 (+) and 4 ( )/Pins 3 and 4* 2
ASC2 input (VF) (optional), DSC 4 input (optional) orAlarm2* 2 input (optional)
Notes: 1. * 2 Applies to the ALM INTFC module.2. Cluster Alarm 2 input (photocoupler)
Normal signal in : Open Alarm signal in : Closed
Pins 5 (+) and 6 ( ) EOW input (VF)
Pins 7 (+) and 8 ( ) 64 kHz clock input* 1
Pins 9 (+) and 10 ( ) DSC1 input (RS-232C, 64K (G.703)* 1 or 64K (V.11)* 1)
Pins 11 (+) and 12 ( ) DSC2 input (RS-232C, RS-422 or RS-485)
Pins 14 (+) and 15 ( )/Pins 14 and 15* 2
ASC1 output (VF) (optional), DSC 3 output (optional) orAlarm1* 2 output (optional)
Notes: 1. * 2 Applies to the ALM INTFC module.2. Cluster Alarm 1 output (relay contact)
Normal signal out : Open Alarm signal out : Closed
Pins 16 (+) and 17 ( )/Pins 16 and 17* 2
ASC2 output (VF) (optional), DSC 4 output (optional) orAlarm2* 2 output (optional)
Notes: 1. * 2 Applies to the ALM INTFC module.2. Cluster Alarm 2 output (relay contact)
Normal signal out : Open Alarm signal out : Closed
Pins 18 (+) and 19 ( ) EOW output (VF)
Pins 20 (+) and 21 ( ) 64 kHz clock output* 1
Pins 22 (+) and 23 ( ) DSC1 output (RS-232C, 64K (G.703)* 1 or 64K (V.11)* 1)
Pins 24 (+) and 25 ( ) DSC2 output (RS-232C, RS-422 or RS-485)
Table 3-2 Interface Terminals and Jacks of 1+1 System (6/14)
Terminal Description
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ROI-S04488 OPERATION
3-21
Pin 13 Ground Notes:1. * 1 Optional 2. Both ASC and DSC 64K cannot be used
simultaneously.
ALM(D-sub Connector, 37 Pins)
Alarm and answer signal input/output
Pins 1 (COM), 2 (NO)and 3 (NC)
No. 1 transmitter alarm output* 3 Between Between
Pins 1 and 2 Pins 1 and 3 Normal state : Open ClosedAlarm state : Closed Open
Pins 4 (COM), 5 (NO)and 6 (NC)
No. 2 transmitter alarm output* 3 Between Between
Pins 4 and 5 Pins 4 and 6 Normal state : Open ClosedAlarm state : Closed Open
Pins 7 (COM), 8 (NO)and 9 (NC)
No. 1 receiver alarm output* 3 Between Between
Pins 7 and 8 Pins 7 and 9 Normal state : Open ClosedAlarm state : Closed Open
Pins 10 (COM), 11 (NO)and 12 (NC)
No. 2 receiver alarm output* 3 Between Between
Pins 10 and 11 Pins 10 and 12 Normal state : Open ClosedAlarm state : Closed Open
Pins 14 Buzzer signal output Note: The terminal is used as an input terminal of buzzer
signal for the back-to-back station.
Pins 15 Buzzer signal input Note: The terminal is used as an input terminal of buzzer
signal for the back-to-back station.
Pins 20 (COM), 21 (NO)and 22 (NC)
BER alarm output when BER worse than 10 -6/10 -5/10 -4/10 -3
(selectable)* 3 Between Between
Pins 20 and 21 Pins 20 and 22 Normal state : Open ClosedAlarm state : Closed Open
Table 3-2 Interface Terminals and Jacks of 1+1 System (7/14)
Terminal Description
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OPERATION ROI-S04488
3-22
Pins 23 (COM), 24 (NO)and 25 (NC)
Maintenance alarm output* 3 Between Between
Pins 23 and 24 Pins 23 and 25 Normal state : Open ClosedAlarm state : Closed Open
Pins 26 (COM), 27(No. 2) and 28 (No. 1)
Switching answer signal output for transmitter Between Between
Pins 26 and 27 Pins 26 and 28
No. 1 CH selection : Open Closed No. 2 CH selection : Closed Open
Pins 29 (COM), 30(No. 2) and 31 (No. 1)
Switching answer signal output for receiver Between Between
Pins 29 and 30 Pins 29 and 31 No. 1 CH selection : Open Closed No. 2 CH selection : Closed Open Note:* 3 The BER threshold values and alarm items are set in
factory (default). To change the setting of alarm itemsby the PC, refer to Section 3.4.1 "Alarm Table" of this
Manual.
AUX ALM(D-sub Connector, 25 Pins)
Transmission network surveillance auxiliary Note: When an optional PM CARD module is mounted,
following input/output terminals (Pins 1 to 21) areused as housekeeping alarm/control interface.
Pin 1 Input 11
Pin 2 (G) Input 12
Pin 3 Input 21
Pin 4 (G) Input 22
Pin 5 Input 31
Pin 6 (G) Input 32
Pin 7 Input 41
Pin 8 (G) Input 42
Pin 9 Input 51
Pin 10 (G) Input 52
Pin 11 Input 61
Pin 12 (G) Input 62
Table 3-2 Interface Terminals and Jacks of 1+1 System (8/14)
Terminal Description
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ROI-S04488 OPERATION
3-23
Pin 13 Ground
Pin 14 Output 11
Pin 15 Output 12
Pin 16 Output 21
Pin 17 Output 22
Pin 18 Output 31
Pin 19 Output 32
Pin 20 Output 41
Pin 21 Output 42
Note: Input[ ] indicates the input of housekeeping alarm. The figure means that same order of tens makes the same paire.g. 11/12 forms a pair. IDU side interface uses that of
photo-coupler, the photo-coupler turns ON if pairelements contact with each other. Output[ ] indicates the output of housekeeping alarm.
Figure means the same as in the Input. IDU side output
uses the relay interface.Pins 22 and 23 Remote switching control signal input for release
Pins 22 and 24 Remote switching control signal input for No. 1 channel No. 1 channel selection : closed
Pins 22 and 25 Remote switching control signal input for No. 2 channel No. 2 channel selection : closed
Table 3-2 Interface Terminals and Jacks of 1+1 System (9/14)
Terminal Description
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OPERATION ROI-S04488
3-24
NMS/RA(D-sub Connector, 15 Pins)
Network management system (NMS) data input/output orremote access (RA) data input/output
Note: When the PM CARD is not mounted on the equipment,this connector is used for Remote Access.
PM CARD RA
Pin 1 Party alarm management system RA TXD (PAMS) TXD
Pin 2 EMS TXD/TXD+ RA GND
Pin 3 EMS RXD/TXD RA RXD
Pin 4 EMS TXDR RA RTS
Pin 5 EMS TRS/RXD+ RA CTS
Pin 6 EMS CTS/RXD
Pin 7 Ground
Pin 9 PAMS RXD
Pin 10 NMS TXD/TXD+
Pin 11 NMS RXD/TXD
Pin 12 NMS TXDR
Pin 13 NMS RTS/RXD+
Pin 14 NMS CTS/RXD
LA PORT (No. 1)(D-sub Connector, 15 pin)
Control/monitoring signal input/output from/to the personalcomputer for No. 1 channel
Pin 1 TXD
Pin 3 RXD
Pin 4 RTS
Pin 5 CTS
Pin 11 LOCAL CTS
Pin 12 LOCAL RTS
Pin 13 LOCAL RXD
Pin 15 LOCAL TXD
Pins 2, 8 and 14 Ground
Table 3-2 Interface Terminals and Jacks of 1+1 System (10/14)
Terminal Description
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3-25
LA PORT (No. 2)(D-sub Connector, 15 pin)
Control/monitoring signal input/output from/to the personalcomputer for No. 2 channel
Pin 1 TXD
Pin 3 RXD
Pin 4 RTS
Pin 5 CTS
Pin 11 LOCAL CTSPin 12 LOCAL RTS
Pin 13 LOCAL RXD
Pin 15 LOCAL TXD
Pins 2, 8 and 14 Ground
LA PORT (COMMON)(D-sub Connector, 15 pin)
Control/monitoring signal input/output from/to personalcomputer for both No. 1 and No. 2 channels
Pin 1 TXD
Pin 3 RXDPin 4 RTS
Pin 5 CTS
Pin 11 LOCAL CTS
Pin 12 LOCAL RTS
Pin 13 LOCAL RXD
Pin 15 LOCAL TXD
Pins 2, 8 and 14 Ground
NMS LAN(RJ45 8 pins)
Pasolink network management station (PNMS) data input/output
Pin 1 LAN PNMS TX+
Pin 2 LAN PNMS TX
Pin 3 LAN PNMS RX+
Pin 6 LAN PNMS RX
Table 3-2 Interface Terminals and Jacks of 1+1 System (11/14)
Terminal Description
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OPERATION ROI-S04488
3-26
WS /SC LAN(RJ45 8 pins)
Way side signal input/output
For 120 ohms balanced interface
Pin 1 WS OUT (+)
Pin 2 WS OUT ( )
Pin 3 Reserved for SC LAN INTFC
Pin 4 WS IN (+)Pin 5 WS IN ( )
Pin 6 Reserved for SC LAN INTFC
Pin 7 open
Pin 8 Frame ground (G)
For 75 ohms unbalanced interface
Pin 1 WS OUT
Pin 2 Reserved for WS INTFC (120 ohms balance)Pin 3 Reserved for SC LAN INTFC
Pin 4 WS IN
Pin 5 Reserved for WS INTFC (120 ohms balance)
Pin 6 Reserved for SC LAN INTFC
Pin 7 open
Pin 8 WS IN/OUT (G)
Table 3-2 Interface Terminals and Jacks of 1+1 System (12/14)
Terminal Description
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3-27
Do not connect any cable to the "Reserved" pins.
Note: Available if WS INTFC is equipped. Disable when SC LAN INTFC is equipped. When WS signal is connected between two IDUs,
perform wiring as follows.
Table 3-2 Interface Terminals and Jacks of 1+1 System (13/14)
Terminal Description
IDU AWS/SC LAN
(RJ45)
12345678
12345678
IDU BWS/SC LAN
(RJ45)WS (120 ohms)
IDU AWS/SC LAN
(RJ45)
123456
78
123456
78
IDU BWS/SC LAN
(RJ45)WS (75 ohms)
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3-29
3.2 Controls, Indicators and Test Jacks
The controls and indicators and test jacks on the IDU (see Fig. 3-3) aredescribed as follows.
IDU indicator Lights when:
Input data stream of CH ( ) from DTE is lost,
AIS (all 1) signal of CH ( ) is received from DTE (selectable),
TX/RX clock synchronization is lost at the DPU section,
If a 2 MB is fed to a CH which is selected as "Not Used"(selectable),
If a 2 MB is fed to the WS CH after setting to "Not Used"(selectable),
AIS signal of CH ( ) is sent (depending on system requirement)(selectable),
Bipolar output pulse of CH ( ) is lost at the INTFC section,
Carrier synchronization is lost at the DEM section,
High bit error rate (High BER) is worse than preset value (1 x10 -3)at the DPU section,
BER is worse than preset value at the DPU section (1 x10 -3,1x10 -4, 1x10 -5 or 1 x10 -6, selectable),
Frame synchronization is lost at the DPU section,
ATPC MAX PWR alarm condition,
VCO synchronization is lost at the MOD section,
Output data stream or master clock signal is lost at the DPU(TX)section,
ODU indicator Lights when:
Transmit RF power decreases 3 dB from normal at the ODU,
Receiver input level decreases by a preset value from squelch levelat the ODU,
APC loop of local oscillator unlocks at the ODU or,
IF signal from the IDU is lost at the ODU,
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OPERATION ROI-S04488
3-30
MAINT indicator
Lights when the following conditions are controlled by the PC:
Maintenance condition,
Loopback condition,
BER AIS condition,
MOD CW condition,
MUTE (TX output power) condition,
PWR switch:
Turns input DC power on or off.
PWR indicator:
Lights when equipment is in normal operation.
RESET switch:
RESET switch initiates the CPU operation.
CALL switch:
Transmits calling signal on engineering orderwire (EOW). Then, buzzer in opposite station rings.
EOW jack:
Gives access to EOW signal immediately when headset is connected.
100M indicator:
Lights when 100 Mbps is selected in data speed of LAN interface. Goes out when 10 Mbps is selected in data speed of LAN interface.
LINK/ACT indicator (Green):Lights when the IDU and associated equipment are linked. It blinks during data transmission. (LAN INTFC, SC LAN INTFC)
COLX/DUPLEX indicator (Amber):
Lights when :
The input/output LAN signal is in Full Duplex mode (LANINTFC),
When the LAN signal in Half Duplex mode, a collision conditionoccurs.(LAN INTFC, SC LAN INTFC)
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ROI-S04488 OPERATION
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TX ALM 1 indicator (Only for 1+1 system):
Lights when:
Transmitter RF output power decreases 3 dB from normal at the No. 1 channel ODU,
APC loop of the local oscillator unlocks or IF signal from the IDUis lost at the No. 1 channel ODU,
Output data stream or master clock signal is lost at the No. 1channel DPU (TX),
VCO synchronization is lost at the No. 1 channel MOD,
If a 2 MB is fed to a CH which is selected as "Not Used"(selectable) at the No. 1 channel IDU,
If a 2 MB is fed to the WS CH after setting to "Not Used"(selectable) at the No. 1 channel IDU,
Communication between CPU of No. 1 channel ODU and CPU onthe IDU is lost.
TX ALM 2 indicator (Only for 1+1 system)
Lights when:
Transmitter RF output power decreases 3 dB from normal at the No. 2 channel ODU,
APC loop of the local oscillator unlocks or IF signal from the IDUis lost at the No. 2 channel ODU,
Output data stream or master clock signal is lost at the No. 2channel DPU (TX),
VCO synchronization is lost at the No. 2 channel MOD,
If a 2 MB is fed to a CH which is selected as "Not Used"(selectable) at the No. 2 channel IDU,
If a 2 MB is fed to the WS CH after setting to "Not Used"
(selectable) at the No. 2 channel IDU, Communication between CPU of No. 2 channel ODU and CPU on
the IDU is lost.
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OPERATION ROI-S04488
3-32
RX ALM 1 indicator (Only for 1+1 system)
Lights when:
Receiver input level decreases lower than a preset value fromsquelch level at the No. 1 channel ODU,
APC loop of the local oscillator unlocks at the No. 1 channel ODU,
IF signal is lost at the No. 1 channel DEM,
High BER is worse than preset value (1 10 3) at the DPU,
BER is worse than preset value at the No. 1 channel DPU (1 103, 1 10 4, 1 10 5 or 1 10 6 selectable),
Frame synchronization is lost at the No. 1 channel DPU,
Communication between CPU of No. 1 channel ODU and CPU ofthe IDU is lost.
RX ALM 2 indicator (Only for 1+1 system)
Lights when:
Receiver input level decreases lower than a preset value fromsquelch level at the No. 2 channel ODU,
APC loop of the local oscillator unlocks at the No. 2 channel ODU,
IF signal is lost at the No. 2 channel DEM,
High BER is worse than preset value (1 10 3) at the No. 2channel DPU,
BER is worse than preset value at the No. 2 channel DPU (1 103, 1 10 4, 1 10 5 or 1 10 6 selectable),
Frame synchronization is lost at the No. 2 channel DPU,
Communication between CPU of No. 2 channel ODU and CPU ofthe IDU is lost.
TX OPR 1 indicator (Only for 1+1 system):
Lights when the modulator and transmitter of No. 1 channel areselected.
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TX OPR 2 indicator (Only for 1+1 system):
Lights when the modulator and transmitter of No. 2 channel areselected.
RX OPR 1 indicator (Only for 1+1 system):
Lights when the demodulator and receiver of No. 1 channel are selected.
RX OPR 2 indicator (Only for 1+1 system):
Lights when the demodulator and receiver of No. 2 channel are selected.
OPR SEL No. 1-AUTO-No. 2 switch (Only for 1+1 system)
Enables channel switching depending on the setting position inMaintenance conditions as follows:
No. 1 : Manually select No. 1 channelAUTO : Automatic switchover control
No. 2 : Manually select No. 2 channel
Caution: Before the start of maintenance, including operation of theOPR SEL SW on the front panel of the equipment, selectthe equipment to maintenance mode using the LCT.
After all operation for maintenance have been completed, perform MAINT OFF setting.
Fig. 3-3 Controls, Indicators and Test Jacks of the IDU
RESET IDUODUPWR
PASOLINK
MAINT
SELV
+
LA PORT
LA PORT
DSC/ASC LA PORTNMS/RA
CALL
OPR
FUSE (7.5A)
FUSE (7.5A)
EOW
MS LAN RX RXTXTX
OPR ALMSELNo.1
No.2
1
2
PASOLINKRESET
RESET IDUODUPWR
PASOLINK
MAINT
SELV
+
LA PORTNMS/RA
NMS LAN
CALL RESET
MAINT
IDUODU
SELV
PWR
FUSE (7.5A)
EOW PASOLINK
+
No. 1 CH MD UNIT
SW UNIT
IDU for 1+0
No. 2 CH MD UNIT
IDU for 1+1
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OPERATION ROI-S04488
3-34
3.2.1 75 ohms/120 ohms Impedance Switch
For the IDU listed in the following table, 75 ohms/unbalanced - 120 ohms/balanced impedance switching of 2 MB interface is applicable on thefront board as shown in Fig. 3-4.
Note: These switches are already set by factory setting according tocustomer requirement.
IDU
System1+0 1+1
H0091A/J/L/M H0161A/J/L/M 4 x 2MB
H0091N H0161N 2/4/8 x 2MB
H0091F/H/K/P H0161F/H/K/P 2/4/8/16 x 2MB
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