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10 NASA Tech Briefs, April 2004
Polymorphic Electronic CircuitsCircuits are designed to perform different functions under different conditions.NASA’s Jet Propulsion Laboratory, Pasadena, California
Polymorphic electronics is a nascenttechnological discipline that involves,among other things, designing the samecircuit to perform different analog and/ordigital functions under different condi-tions. For example, a circuit can be de-signed to function as an OR gate or anAND gate, depending on the temperature(see figure). Polymorphic electronics canalso be considered a subset of polytronics,which is a broader technological disciplinein which optical and possibly other infor-mation-processing systems could also bedesigned to perform multiple functions.
Polytronics is an outgrowth of evolvablehardware (EHW). The basic conceptsand some specific implementations ofEHW were described in a number ofprevious NASA Tech Briefs articles. To re-capitulate: The essence of EHW is todesign, construct, and test a sequence ofpopulations of circuits that function asincrementally better solutions of a givendesign problem through the selective,repetitive connection and/or discon-nection of capacitors, transistors, ampli-fiers, inverters, and/or other circuitbuilding blocks. The evolution is guidedby a search-and-optimization algorithm(in particular, a genetic algorithm) thatoperates in the space of possible circuits
to find a circuit that exhibits an accept-ably close approximation of the desiredfunctionality. The evolved circuits canbe tested by computational simulation(in which case the evolution is said to beextrinsic), tested in real hardware (inwhich case the evolution is said to be in-trinsic), or tested in random sequencesof computational simulation and realhardware (in which case the evolution issaid to be mixtrinsic).
The NASA Tech Briefs article most rel-evant to the emergence of polytronics isthe preceding article, “EHW Approachto Temperature Compensation of Elec-tronics.” Polytronics originated fromrecognition that the EHW approachmakes it possible to go beyond merecompensation for deterioration of cir-cuit functionality with temperature:The EHW approach is a means of de-signing a circuit to perform an accept-able approximation of almost any de-sired function at one or moretemperatures. In addition to or insteadof temperature, the functionality of acircuit could be made to depend onsuch variables as supply or bias poten-tials, states of digital control signals, sig-nal frequencies, and/or the intensity ofillumination.
Going beyond the temperature-de-pendent AND/OR gate, the followingare a few additional examples of multi-functionality that could be implementedin polytronics:• A digital circuit could pass data in ei-
ther of two opposite directions andperform the same function or differ-ent functions in the two directions.
• The modes of operation of an entirecomputer or other complex circuitcould be changed almost instanta-neously by changing the temperature,supply voltage, or other parameter(s).
• A circuit could be made to performone (or more) hidden function(s) inaddition to a readily observable mainfunction. For example, a hidden func-tion could be an authentication signalthat would appear only under speci-fied conditions (for example, supplyvoltage above a specified level andtemperature below a specified level).
• An increase in temperature beyond aspecified level could trigger a desiredreactive behavior. For example a“smart fuse” circuit could cause guid-ance circuitry to function differently athigher temperature.The current research in polytronics in-
volves two modes of evolution that, in EHW,
The Same Circuit Performs as One of Two Logic Gates, depending on the temperature. At 27 °C, it is an AND gate; at 125 °C, it is an OR gate.
4
2
00 10 20 30 40
Inpu
t 1, V
4
2
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Inpu
t 2, V
4
2
00 10 20 30 40
Out
put 1
, V
4
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Input 1
Input 2
10 20 30 40
Out
put 2
, V
Time, ms
27 °CAND
125 °COR
Output
6.0/1.84.8/1.8
4.8/4.2
4.2/1.2
1.8/5.0
5.4/1.23.3 V10 MΩ
Note: Paired numbers separated by fraction barsdenote transistor widths and lengths in µm, respectively.
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NASA Tech Briefs, April 2004 11
would have been denoted as extrinsic andmixtrinsic, respectively. Each mode is char-acterized by a different combination of ad-vantages and disadvantages.• In one mode, evolution occurs en-
tirely by computational simulation.For example, circuits can be computa-tionally modeled as consisting only ofnegative-channel metal oxide semi-conductor (NMOS) and positive-chan-nel metal oxide semiconductor(PMOS) transistors that can be con-nected in arbitrary topologies. The ad-vantage of this mode is that it enablesfree exploration of the search space,with few or no topological restrictionslike those that occur in practice; thelack of restrictions can favor the emer-gence of new designs. The disadvan-tage of this approach is that there isno implementation of evolved designsin hardware.
• In the other mode, the circuit topolo-gies are restricted to those of field-programmable transistor arrays(FPTAs). Evolution involves both (1)simulations on computational modelsof FPTAs and (2) experiments on realFPTAs that are constructed and testedin efforts to implement the models.The advantages of this mode are thatcircuits can be implemented in prac-tice after evolution, and FPTA chipscan be reconfigured to map differentpolymorphic gates onto them, asneeded. The disadvantages of thismode are that (1) the topologies arerestricted and (2) in some cases, cir-cuits evolved taking account of thenonideal characteristics (e.g., non-zero “ON” resistances and finite“OFF” resistances of transistorswitches) of realistic components canbe more complicated than those
evolved through models of ideal com-ponents.This work was done by Adrian Stoica of
Caltech for NASA’s Jet Propulsion Labo-ratory. Further information is contained ina TSP (see page 1).
In accordance with Public Law 96-517,the contractor has elected to retain title to thisinvention. Inquiries concerning rights for itscommercial use should be addressed to
Intellectual Assets OfficeJPLMail Stop 202-2334800 Oak Grove DrivePasadena, CA 91109(818) 354-2240E-mail: [email protected] to NPO-21213, volume and number
of this NASA Tech Briefs issue, and thepage number.
Micro-tubular fuel cells that wouldoperate at power levels on the order ofhundreds of watts or less are under de-velopment as alternatives to batteries innumerous products — portable powertools, cellular telephones, laptop com-puters, portable television receivers,and small robotic vehicles, to name afew examples. Micro-tubular fuel cellsexploit advances in the art of proton-ex-change-membrane fuel cells. The mainadvantage of the micro-tubular fuel cellsover the plate-and-frame fuel cellswould be higher power densities:Whereas the mass and volume powerdensities of low-pressure hydrogen-and-oxygen-fuel plate-and-frame fuel cellsdesigned to operate in the targetedpower range are typically less than 0.1W/g and 0.1 kW/L, micro-tubular fuelcells are expected to reach power densi-ties much greater than 1 W/g and 1kW/L. Because of their higher powerdensities, micro-tubular fuel cells wouldbe better for powering portable equip-ment, and would be better suited to ap-plications in which there are require-ments for modularity to simplifymaintenance or to facilitate scaling tohigher power levels.
The development of PEMFCs hasconventionally focused on producinglarge stacks of cells that operate at typi-
Micro-Tubular Fuel CellsPower densities would be much greater than those of conventional fuel cells.Lyndon B. Johnson Space Center, Houston, Texas
µT-MEA Inserted in Manifold
O2 H2
ClosedEnd
Cathode
µT-MEA
Anode
Membrane
Anode CurrentCollector
Cathode CurrentCollector andCrimping Ring
Cross-Flow Configuration of a µT Fuel Cell
H2Air Flow
A Micro-Tubular Fuel Cell contains multiple tubular membrane/electrode assemblies that operate inan oxygen/hydrogen cross flow. The hydrogen manifold and the edge-tab electrical current collectorstake up much less space than do the bipolar plates of conventional plate-and-frame fuel cells.