PRASAD A. PAWASKARSPN. NO. 0903055

DETE 2 SEMESTER

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Boolean AlgebraBoolean Algebra is a mathematical Model for

digital logic circuits.Boolean Algebra is a system <B, V, P>

B={0,1} is the set of values V is the set of variables P={+, •, ΄} is the set of operators (basic functions)

defined by the truth tables as follows

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x y x+y

0 0 0

0 1 1

1 0 1

1 1 1

x y x•y

0 0 0

0 1 0

1 0 0

1 1 1

x x΄

0 1

1 0

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AND GateImplements AND function

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OR gateImplements OR function

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NOT gateImplements NOT function

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Basic Laws of Boolean Algebra Identities

x + 0 = x x • 1 = x

Compliments x + x΄ = 1 x • x΄ = 0

DeMorgan Law (x y)΄ = x΄ + y΄ (x + y)΄ = x΄ y΄

Idempotent Law x + x = x x x = x

Boundness Laws x + 1 = 1 x • 0 = 0

Distributive Law Associative Law

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x y x’y+xy’

0 0 0

0 1 1

1 0 1

1 1 0

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More commonly-used functionsx XOR y = x’y + xy’

NAND gate

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NOR gate

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XNOR gate

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Simplification of Boolean FunctionsGeneral Boolean functions of n variables

can be represented byBoolean expressionsTruth tables showing the function values for all

input combinationsBoolean functions can be implemented

directly from their expressions, butComplicated expressions may results in circuits

Using more gates than necessary or Having longer accumulative gate delay than necesarry

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Minterms of n variablesThe literals of x is either x or x’Given n variables, a minterm is a product (result

of and operations) of n literals, one from each variable.

A mintern is 1 only for one input combination and 0 for the rest input combinations.xy’z (i.e. x•y’•z) is 1 only when x=1, y=0 and

z=1. It is 0 for all other 7 input combinations of the three variables x, y, and z.

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Implementation of Boolean function with minimum gate delayObtain the truth table of the functionWrite the minterms corresponding to the input

combinations for which the function value is 1.Form a sum of these minterms using OR

operationConstruct the circuit according to the form

obtained (maximum 3 gate delays)example

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x y z f

0 0 0 1

0 0 1 0

0 1 0 1

0 1 1 0

1 0 0 0

1 0 1 1

1 1 0 0

1 1 1 1

We have f = x’y’z’ + x’yz’ + x y’z + x y z

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But the sum of minterns can be further simplified to reduce the number of product terms and the number of inputs of the gates example

f = x’y’z’ + x’yz’ + xy’z + xyz = x’z’(y’+y) + xz(y’+y) = x’z’ + xzBut, how do we reach the simplest form

systematically?

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Karnaugh Map SimplicationKarnaugh maps

three variables and four variables

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one cell for each minterm can be used to represent a function by filling 1’s to the

cells corresponding to its mintermsAdjacent minterns can be grouped (combined) to form

simpler product terms. f = x’y’z’ + x’y’z + x’yz’ + xyz’

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Groupings are allowed to be overlapped because of idempotent laws, x+x=x.

Note the “wrap-around” adjacency due to the gray coding used.

Two adjacent two-cell grouping can be further grouped for form simpler term.

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Karnaugh map simplification Find the minterns of the function from the truth table. Draw the Karnaugh map for the function. Start with the largest groupings possible (8, 4, 2)

find all possible groups and mark them with corresponding (product) terms (each group should contain at least one cell not covered in previous groupings).

All groups obtained are called Prime Implicants. Find all the Essential Prime Implicants, each of which is a prime

implicant that contains at least one cell not covered by any other prime implicant.

Find other non-essential prime implicants to cover the remaining cells of the function.

The simplest form (minimum gate delay and least number of inputs) is obtained by adding (OR) the essential prime implicants and non-essential prime implicants

from above.

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