q7-base r1 (qseven baseboard) - top-fa · q7-base r1 1 overview this initial manual version...

Q7-BASE R1

(Qseven Baseboard)Technical ReferenceP/N 50-1Z180-1000

Rev 1.00

Advance Technologies. Automate the World.

Preface

Disclaimer

Information in this document is provided in connection with ADLINK products. No license,express or implied, by estoppel or otherwise, to any intellectual property rights is granted bythis document. Except as provided in ADLINK´s Terms and Conditions of Sale for such prod-ucts, ADLINK assumes no liability whatsoever, and ADLINK disclaims any express or impliedwarranty, relating to sale and/or use of ADLINK products including liability or warranties relat-ing to fitness for a particular purpose, merchantability, or infringement of any patent, copy-right or other intellectual property right. If you intend to use ADLINK products in or as medicaldevices, you are solely responsible for all required regulatory compliance, including, withoutlimitation, Title 21 of the CFR (US), Directive 2007/47/EC (EU), and ISO 13485 & 14971, ifany. ADLINK may make changes to specifications and product descriptions at any time, with-out notice.

Trademarks

MS-DOS, Windows, Windows 95, Windows 98, Windows NT and Windows XP are trade-marks of Microsoft Corporation. PS/2 is a trademark of International Business Machines, Inc.Intel and Solid State Drive are trademarks of Intel Corporation. PC/104 is a registered trade-mark of the PC/104 Consortium. All other trademarks appearing in this document are theproperty of their respective owners. CoreModule is a registered trademark, and ADLINK,HPERC, Little Board, LittleBoard, MightyBoard, MightySystem, MilSystem, MiniModule,ReadyBoard, ReadyBox, ReadyPanel, RuffSystem, and ReadySystem are trademarks ofADLINK Technology, Inc. All other marks are the property of their respective companies.

Revision History

© Copyright 2015 ADLINK Technology, Incorporated

This document contains proprietary information protected by copyright. All rights arereserved. No part of this manual may be reproduced by any mechanical, electronic, or othermeans in any form without prior written permission of the manufacturer.

Audience

This manual provides reference only for computer design engineers, including but not limitedto hardware and software designers and applications engineers. ADLINK Technology, Inc.assumes you are qualified to design and implement prototype computer equipment.

Revision Date Description of Change(s)

1.00 Apr/15 Initial Release

ii Preface

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Q7-BASE R1

Environmental Responsibility

ADLINK is committed to fulfill its social responsibility to global environmental preservationthrough compliance with the European Union's Restriction of Hazardous Substances (RoHS)directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmentalprotection is a top priority for ADLINK. We have enforced measures to ensure that our prod-ucts, manufacturing processes, components, and raw materials have as little impact on theenvironment as possible. When products are at their end of life, our customers are encour-aged to dispose of them in accordance with the product disposal and/or recovery programsprescribed by their nation or company.

Important Safety Instructions

For user safety, please read and follow all Instructions, WARNINGs, CAUTIONs, andNOTEs marked in this manual and on the associated equipment before handling/operatingthe equipment.

Read these safety instructions carefully.

Keep this manual for future reference.

Read the specifications section of this manual for detailed information on the operating environment of this equipment.

Turn off power and unplug any power cords/cables when installing/mounting or un-install-ing/removing equipment.

To avoid electrical shock and/or damage to equipment:

Keep equipment away from water or liquid sources;

Keep equipment away from high heat or high humidity;

Keep equipment properly ventilated (do not block or cover ventilation openings);

Make sure to use recommended voltage and power source settings;

Always install and operate equipment near an easily accessible electrical socket-out-let;

Secure the power cord (do not place any object on/over the power cord);

Only install/attach and operate equipment on stable surfaces and/or recommended mountings; and,

If the equipment will not be used for long periods of time, turn off the power source and unplug the equipment.

Preface iii

iv Preface

Q7-BASE R1

Table of Contents

1 Overview ........................................................................................................................... 1

1.1 Block Diagram........................................................................................................................ 1

1.2 Major Components (ICs)........................................................................................................ 2

1.3 Headers, Connectors, Switches, and LEDs........................................................................... 4

1.4 Specifications......................................................................................................................... 8

1.4.1 Physical Specifications ......................................................................................................8

1.4.2 Mechanical Specifications .................................................................................................9

2 Interface Signals............................................................................................................. 10

2.1 Digital Audio......................................................................................................................... 10

2.2 CAN ..................................................................................................................................... 10

2.3 CAN Termination ................................................................................................................. 11

2.4 CPLD Programming............................................................................................................. 11

2.5 FAN Control ......................................................................................................................... 11

2.6 ATX Power........................................................................................................................... 12

2.7 Battery Connection .............................................................................................................. 12

2.8 Select Keyboard SIO Address ............................................................................................. 12

2.9 Backlight and LVDS Supply Voltage Select......................................................................... 13

2.10 PS_ON Selection ................................................................................................................. 13

2.11 Backlight Voltage Select ...................................................................................................... 13

2.12 LVDS Backlight .................................................................................................................... 14

2.13 LVDS Interface..................................................................................................................... 14

2.14 SIO Enable........................................................................................................................... 15

2.15 UART Interface .................................................................................................................... 15

2.16 LPT Interface ....................................................................................................................... 16

2.17 System Interface.................................................................................................................. 16

2.18 CAN 5-Volt Enable............................................................................................................... 17

2.19 TPM Interface ...................................................................................................................... 17

2.20 USB Signals......................................................................................................................... 17

2.20.1 USB1.............................................................................................................................17

2.20.2 CN47 .............................................................................................................................17

2.20.3 USB2.............................................................................................................................18

2.21 Serial Port Configuration Switches ...................................................................................... 18

2.21.1 SW1...............................................................................................................................18

2.21.2 SW2...............................................................................................................................18

2.21.3 SW3...............................................................................................................................19

Appendix A Technical Support ......................................................................................... 21

v

Q7-BASE R1

1 OverviewThis initial manual version presents a general overview of the Q7-BASE R1 baseboard includingthe signal definitions of the non-standard user interfaces on the board. After reviewing this doc-ument you should understand the following features of the Q7-BASE R1.

Functional Block Diagram

Major Component (IC) Locations and Descriptions

Connector Locations and Descriptions

Specifications

Non-Standard User Interface Signal Definitions

1.1 Block Diagram

Figure 1-1 presents a functional representation of the baseboard.

Figure 1-1: Functional Block Diagram

Overview 1

1.2 Major Components (ICs)

Table 1-1 lists the major integrated circuits on the Q7-BASE R1, including a brief description ofeach IC. Figure 1-2 shows the locations of the major ICs.

Table 1-1: Major Integrated Circuit Descriptions and Functions

Chip Type Mfg. Model Description Function

I2C EEPROM Socket (U69)

N/A N/A 2-wire, 8Kb serial EEPROM DIL8 Socket

Provides storage for baseboard parameters

through the I2C CLK and DAT pins, 66 and 68, on the Q7 module

SPI EEPROM Socket (U70)

N/A N/A LOTES, ACA-SPI-004-K01, Socket

Stores configuration data

Super IO (U73) Winbond W83627DHG-P Legacy IO Controller Provides LPC IO signals for serial parallel, and PS/2 interfaces

HD Audio CODEC (U74)

Realtek ALC886-GR Encoder and decoder of audio data for transmission, storage, encryption, playback, and editing

Provides two channels of ADC conversion and ten channels of DAC display

CAN Transceiver (U86)

Microchip MCP2562 Transceiver for Controller Area Network

Supports up to 1 Mbps of differential transmit and receive capabilities for the CAN controller in the CPU

2 Overview

Q7-BASE R1

Figure 1-2: Component Locations (Top Side)

Q7-

BA

SE_B

aseb

oard

_Top

_Com

p_a

Key:U69 - I2C EEPROMU70 - SPI EEPROMU73 - Super IOU74 - Audio CODECU86 - CAN Transceiver

U74

U73

U69

U70

21

U86

Overview 3

1.3 Headers, Connectors, Switches, and LEDs

Table 1-2 describes the headers, connectors, switches, and LEDs for the Q7-BASE R1 base-board shown in Figure 1-3.

Table 1-2: Header, Connector, Switch, and LED Descriptions

Header / Connector#

Signal / Device Description

AJ1 Audio Jack 32-pin standard audio jack for three audio interfaces: Line In (Blue), Line Out (Green), and MIC In (Pink)[FOXXCONN, JA33331-HA1P-4F]

BT1 Battery Socket 3-pin, 220V socket for CR2032 battery[LOTES, AAA-BAT-038-K01]

CN39 COM1/COM2 Dual 9-pin, 0.109" (2.77mm) standard DB9 connectors for COM1 and COM2 serial ports[FOXXCONN, DM10151-H531-4F]

CN42, CN44, CN45

PCI Express 36-pin, 0.039" (1mm) standard edge connector for x1 PCI Express interface[FOXXCONN, 2EG01817-D2D-DF]

CN46 Digital Audio 4-pin, 0.079" (2mm) header for incoming and outgoing SPDIF digital audio signals[SAMTEC, TMM-102-01-T-D-SM]

CN47 Ethernet/USB Standard, stacked RJ45 and USB connector for Gb Ethernet with LEDs and 2x USB 3.0/2.0[UDE, 05-A00937263-1]

CN50 CAN 10-pin, 0.100" (2.54mm) shrouded header for transmitting and receiving Controller Area Network signals[JIHVEI, 23N6960-10S10B-01G-G]

CN51 CAN Termination 2-pin, 0.079" (2mm) jumper header for terminating the CAN interface with 120 ohms[JIH, 21N12050-02S10B-01G-4]

CN52 CPLD Programming 10-pin, 0.100" (2.54mm) header for CPLD programming signals[SAMTEC, TSM-105-01-S-DV]

CN53 Fan Control 4-pin, 0.100" (2.54mm) header for system fan +12V power, power management, and tachometer[JVE, 24W1163-04S10-01T-02]

CN55 ATX Power 24-pin, 0.165" (4.2mm) ATX shrouded header for ATX power signals[ALEX, 9359-24]

CN57 Battery Termination 2-pin, 0.079" (2mm) jumper header for connecting or disconnecting the battery in the BT1 socket[JIH, 21N12050-02S10B-01G-4]

CN61 Keyboard Controller Enable

2-pin, 0.079" (2mm) jumper header for selecting the keyboard controller SIO address[JIH, 21N12050-02S10B-01G-4]

CN62 LVDS Backlight Control

6-pin, 0.079" (2mm) jumper header for backlight power management to select 3V, 5V, or 12V[NELTRON, 2208SM-06G-CR]

CN63 ATX PS_ON 6-pin, 0.079" (2mm) jumper header for setting Power Signal_ON for the ATX connector[NELTRON, 2208SM-06G-CR]

CN64 LVDS Backlight Voltage Select

3-pin, 0.079" (2mm) jumper header for selecting +5V or +12V ATX Power On voltage to the LCD backlight[JIH, 21N12050-03S10B-01G-4]

CN65 LVDS Backlight Interface

8-pin, 0.100" (2.54mm) shrouded header for LVDS backlight [JIHVEI, 23N6960-08S10B-01G-G]

4 Overview

Q7-BASE R1

CN66 LVDS Interface 34-pin, 0.079" (2mm) header for LVDS video[JIHVEI, 23N6850-34S10B-01G-G]

CN69 SIO Enable 3-pin, 0.079" (2mm) jumper header for enabling or disabling the SIO (1-2 = Enable; 2-3 = Disable)[JIH, 21N12050-03S10B-01G-4]

CN70 UART Interface 10-pin, 0.100" (2.54mm) shrouded header for high-speed, four-wire serial signals[JIHVEI, 23N6960-10S10B-01G-G]

CN71 LPT Interface 26-pin, 0.100" (2.54mm) shrouded header for parallel signals[JIHVEI, 23N6960-26S10B-01G-G]

CN72 SD/MMC Socket 15-pin, 0.136" (3.45mm) standard, right-angle, push-push socket for SD cards[Amphenol, 1010056564]

CN73 System Interface 20-pin, 0.100" (2.54mm) shrouded header for system management signals[JIHVEI, 23N6960-20S10B-01G-G]

CN74 PCIe Mini 52-pin, 0.032" (0.80mm) standard socket for PCIe Mini cards[ATTEND, 119A-80A00-R02]

CN75, CN76 PCIe Mini Latch Dual latches for PCIe Mini card socket[ATTEND, 119A-LATCH-80]

CN77 CAN Enable 5V 2-pin, 0.079" (2mm) jumper header for enabling 5V on pin 9 of the CAN interface[JIH, 21N12050-02S10B-01G-4]

CN78 TPM Interface 20-pin, 0.100" (2.54mm) shrouded header for TPM signals[JIH, 21N22564-20S10B-01G-6]

CN79 FAN Power Select 3-pin, 0.079" (2mm) jumper header for selecting +5V or +12V ATX power for the system fan[JIH, 21N12050-03S10B-01G-4]

HDMI1 HDMI Interface 19-pin, 0.019" (0.50mm) standard socket for HDMI video signals[TechBest, HDMI-KRPS00-A30N2-L]

LED1 PCIe Mini WWAN Yellow Activity LED for Wireless Wide Area Network[LIGITEK, LG-170HY-CT]

LED2 PCIe Mini WLAN Yellow Activity LED for Wireless Local Area Network[LIGITEK, LG-170HY-CT]

LED3 PCIe Mini WPAN Yellow Activity LED for Wireless Personal Area Network[LIGITEK, LG-170HY-CT]

LED4 SDIO Yellow Power LED for SD card socket[LIGITEK, LG-170HY-CT]

LED5 SATA Yellow Power LED for SATA interface[LIGITEK, LG-170HY-CT]

LED6 POST 80 High Seven-segment display LED for 80H POST codes[Kingbright, KCSA02-101]

LED7 POST 80 Low Seven-segment display LED for 80L POST codes[Kingbright, KCSA02-101]

LED8 POST 81 High Seven-segment display LED for 81H POST codes[Kingbright, KCSA02-101]

LED9 POST 81 Low Seven-segment display LED for 81H POST codes[Kingbright, KCSA02-101]

LED11 S3 Suspend Yellow Activity LED for S3 sleep state[LIGITEK, LG-170HY-CT]

Table 1-2: Header, Connector, Switch, and LED Descriptions (Continued)

Overview 5

LED12 S5 Suspend Yellow Activity LED for S5 sleep state[LIGITEK, LG-170HY-CT]

LED13 Thermal Trip Red Activity LED for thermal management[Ligitek, LG-170HR-CT]

LED14 Watchdog Red Activity LED for Watchdog Timer[Ligitek, LG-170HR-CT]

PS1 Keyboard and Mouse 6-pin, dual standard, mini-DIN connector for PS/2 keyboard and mouse I/O[FOXCONN, MH11061-P36-4F]

SATA0 SATA 7-pin, 0.050" (1.27mm) standard connector for SATA0 interface[WIN WIN, WATM-07ABN4A3B8UW]

SATA1 SATA 7-pin, 0.050" (1.27mm) standard connector for SATA1 interface[WIN WIN, WATM-07ABN4A3B8UW]

SW1 RS485 Speed Select 4-pin, 0.050" (1.27mm)dip switch for selecting COM1 and COM2 data transmission speeds[DIPTRONICS, DHNF-04-T-Q-T]

SW2 RS485 Termination 4-pin, 0.050" (1.27mm)dip switch for selecting COM1 and COM2 4-wire termination [DIPTRONICS, DHNF-04-T-Q-T]

SW3 RS485/232 Select 2-pin, 0.050" (1.27mm)dip switch for selecting COM1 and COM2 RS communication modes[DIPTRONICS, DHNF-02-T-V-T]

SW4 Reset Button 4-pin, 0.170" (4.3mm) push-button switch for asserting warm reset to the module [DIPTRONIC, DTSM-61N-V-T]

SW5 I2C EEPROM 4-pin, 0.050" (1.27mm)dip switch for configuring and write protecting I2C EEPROM address[DIPTRONICS, DHNF-04-T-Q-T]

SW6 Sleep Button 4-pin, 0.170" (4.3mm) push-button switch for asserting sleep state to the module[DIPTRONIC, DTSM-61N-V-T]

SW7 Power Button 4-pin, 0.170" (4.3mm) push-button switch for turning on power to the Q7 module[DIPTRONIC, DTSM-61N-V-T]

SW8 LID Button 4-pin, 0.170" (4.3mm) push-button switch for asserting LID to the Q7 connector[DIPTRONIC, DTSM-61N-V-T]

SW9 SPI EEPROM 4-pin, 0.050" (1.27mm)dip switch for configuring SPI EEPROM[DIPTRONICS, DHNF-04-T-Q-T]

SW10 WAKE Button 4-pin, 0.170" (4.3mm) push-button switch for asserting wake signal to the Q7 module[DIPTRONIC, DTSM-61N-V-T]

USB1 USB 16-pin, 0.138" (3.50mm) quadruple-stacked, standard connector for USB signals[FOXCONN,UB1112C-QHDF-4F]

Table 1-2: Header, Connector, Switch, and LED Descriptions (Continued)

6 Overview

Q7-BASE R1

Figure 1-3: Connector Locations (Top Side)

Q7-

BA

SE_B

aseb

oard

_Top

_Con

n_a

Key:

AJ1 - Audio JackBT1 - Battery SocketCN39 - COM1/COM2 (standard connector)CN42 - PCI Express (slot 1)CN44 - PCI Express (slot 2)CN45 - PCI Express (slot 3)CN46 - Digital AudioCN47 - Gb Ehternet/USB (2 ports)CN50 - CAN InterfaceCN51 - CAN TerminationCN52 - CPLD ProgrammingCN53 - FAN controlCN55 - ATX PowerCN57 - Battery Temination

CN50CN77

CN51CN61

SW3

SW2

SW1

CN69

CN71 CN73

BT1

CN55

CN62

CN64

SW5

SW9

CN63CN57

CN78

CN65

CN66

GF1

CN70SATA1

CN52

CN79

CN46CN53

SATA0

SW8

SW4

SW7

SW10

SW6CN74

CN75

CN76

CN45

CN44

CN42

CN72

AJ1

HDMI1

CN47

USB1

CN39

PS1

LED7

LED6

LED9

LED8

LED4 LED5 LED12 LED11 LED13 LED14

LED1

LED221

LED3

USB2

CN61 - Enable Keyboard ControllerCN62 - Backlight ControlCN63 - ATX PS_ON SelectionCN64 - ATX Backlight Voltage SelectCN65 - LVDS BacklightCN66 - LVDS InterfaceCN69 - SIO EnableCN70 - UART InterfaceCN71 - LPT InterfaceCN72 - SD/MMC SocketCN73 - System InterfaceCN74 - PCIe MiniCN75 - PCIe Mini LatchCN76 - PCIe Mini Latch

CN77 - CAN EnableCN78 - TPM InterfaceCN79 - FAN InterfaceHDMI1 - HDMI SocketLED1 - PCIe Mini WWANLED2 - PCIe Mini WLANLED3 - PCIe Mini WPANLED4 - SDIOLED5 - SATA ActivityLED6 - POST 80 HighLED7 - POST 80 LowLED8 - POST 81 HighLED9 - POST 81 LowLED11 - S3 SuspendLED12 - S5 SuspendLED13 - Thermal Trip LED14 - Watchdog

PS1 - Keyboard and MouseSATA0 - SATA (Standard)SATA1- SATA (Standard)SW1 - RS485 Speed SelectSW2 - RS485 TerminationSW3 - RS485/232 SelectSW4 - Reset ButtonSW5 - I2C EEPROM SW6 - Sleep ButtonSW7 - Power ButtonSW8 - LID ButtonSW9 - SPI EEPROMSW10 - WAKE ButtonUSB1 - USB (Standard)

NOTE: Black pins represent pin 1

Overview 7

1.4 Specifications

1.4.1 Physical Specifications

Table 1-3 lists the physical dimensions of the baseboard.

Table 1-3: Weight and Footprint Dimensions

Item Dimension Overall height is measured from the upper board surface to the top of the highest permanent component on the upper board surface. This measurement does not include the cooling solution, which can vary. The cooling solution will probably increase this dimension.

Weight 0.32 kg (0.69 lb)

Height (overall) 15.00 mm (0.59 inches)

Board thickness 2.00 mm (0.08 inches)

Width 170 mm (6.69 inches)

Length 237.00 mm (9.33 inches)

8 Overview

Q7-BASE R1

1.4.2 Mechanical Specifications

Figure 1-4: Mechanical Dimensions (Top Side)

NOTE: Measurements shown are in millimeters.

-all dimension in m

m

237

170

10,16

33,91

73,25

230,73

124,23

165,10

185,88

87,81

1717

54

64

2 x M2,5

2 x M2,5

69,7258,805 4

9,42

64,80

6,48

13,61

24,18

6 xØ7,5

(TOP and Bottom)

7 xØ

3,2(TOP and Bottom)

R3,1

2 xØ

6Top and Bottom)

2 xØ

2,7

(Top and Bottom)

2 x Ø 5,2

177,03

37,70

22,3

5

Overview 9

2 Interface SignalsThis section provides the pin signals for all the non-standard user interfaces on theQ7-BASE R1. Signal definitions for standard interfaces such as Audio Jack, SATA, USB, PCIe,HDMI, and DB9 Serial connectors can be found in their respective specification data sheets.

NOTE: The tables in this section define pin sequence using the method in the followingexample: A 10-pin header with two rows of pins, using odd/even numbering, where pin 2 isdirectly across from pin 1, is noted as 10 pins, 2 rows, odd/even pin sequence (1, 2). Con-secutive numbering is noted, for example, as 24 pins, 2 rows, consecutive pin sequence(1, 13), where pin 13 is directly across from pin 1.

2.1 Digital Audio

Table 2-1 lists the pin signals of the Digital Audio interface, which provides 4 pins, 2 rows, withodd/even pin sequence (1, 2) and 0.079" (2mm) pitch.

NOTE: The shaded table cells denote Ground.

2.2 CAN

Table 2-2 lists the pin signals of the Controller Area Network interface, which provides 10 pins, 2rows, with odd/even sequence (1, 2) and 0.100" (2.54mm) pitch.

NOTE: The shaded table cells denote Power or Ground.

Table 2-1: Digital Audio (CN46)

Pin # Signal

1 CON_SPDIFI2 GND3 CON_SPDIFO4 GND

Table 2-2: CAN Interface (CN50)

Pin # Signal

1 Not Connected2 GND3 CON_CAN_L4 CON_CAN_H5 GND6 Not Connected7 Not Connected8 Not Connected9 +V5PO_CAN_CON(use CN77 to enable or disable)10 GND

10 Interface Signals

Q7-BASE R1

2.3 CAN Termination

Table 2-3 lists the pin signals of the CAN Termination jumper header, which provides 2 pins with0.079" (2mm) pitch.

NOTE: Default = open pins, no jumper installed.

2.4 CPLD Programming

Table 2-4 lists the pin signals of the CPLD Programming header, which provides 10 pins, 2 rows,with odd/even sequence and 0.100" (2.54mm) pitch.

NOTE: The shaded table cells denote Power or Ground.

2.5 FAN Control

Table 2-5 lists the pin signals of the FAN Control header, which provides 4 pins, single-row, with0.100" (2.54mm) pitch.

NOTE: The shaded table cells denote Ground.

Table 2-3: CAN Termination Signals (CN51)

Pin # Signal

1 CAN_TERM (120 ohms resistor to CON_CAN_L)2 CON_CAN_H

Table 2-4: CPLD Programming Signals (CN52)

Pin # Signal

1 POST_TCK2 GND3 POST_TCO4 +V3P3_ATX5 POST_TMS6 Not Connected7 Not Connected8 Not Connected9 POST_TDI10 GND

Table 2-5: FAN Control Signals (CN53)

Pin # Signal

1 GND2 GND (use CN79 to select 5V or 12V)3 FAN_IN4 FAN_OUT

Interface Signals 11

2.6 ATX Power

Table 2-6 lists the pin signals of the ATX Power input header, which provides 24 pins, 2 rows,with consecutive sequence (1, 13) and 0.165" (4.2mm) pitch.

NOTE: The shaded table cells denote Ground or Power. The # symbol indicates the signal isActive Low.

2.7 Battery Connection

Table 2-7 lists the pin signals of the Battery Connection jumper header, which provides 2 pinswith 0.079" (2mm) pitch.

NOTE: The shaded table cells denote Power. Default = jumper installed.

2.8 Select Keyboard SIO Address

Table 2-8 lists the pin signals of the Select Keyboard SIO Address jumper header, which pro-vides 2 pins with 0.079" (2mm) pitch.

NOTE: The shaded table cells denote Power. Default = jumper installed.

Table 2-6: ATX Power Input Signals (CN55)

Pin # Signal Pin # Signal

1 +V3P3_ATX 13 +V3P3_ATX2 +V3P3_ATX 14 Not Connected

3 GND 15 GND4 +V5P0_ATX 16 ATX_PS_ON#5 GND 17 GND6 +V5P0_ATX 18 GND7 GND 19 GND8 ATX_PWRGD_5V 20 Not Connected

9 +V5P0_SBY 21 +V5P0_ATX10 +V12P0_ATX 22 +V5P0_ATX11 +V12P0_ATX 23 +V5P0_ATX12 +V3P3_ATX 24 GND

Table 2-7: Battery Termination Signals (CN57)

Pin # Signal

1 +VBAT2 +VBAT_HOLDER (+ pin at battery holder)

Table 2-8: Select Keyboard SIO Address (CN61)

Pin # Signal

1 +V3P3_ATX2 SIO_ADDR (open = 2Eh; closed = 4Eh)


Q7-BASE R1

2.9 Backlight and LVDS Supply Voltage Select

Table 2-9 lists the pin signals of the Backlight Control and LVDS Voltage Select jumper header,which provides 6 pins, 2 rows, with odd/even pin sequence (1, 2) and 0.079" (2mm) pitch.

NOTE: The shaded table cells denote Ground or Power. Default = jumpers installed on 1-3and 3-4.

2.10 PS_ON Selection

Table 2-10 lists the pin signals of the PS_ON Selection jumper header, which provides 6 pins, 2rows, with odd/even pin sequence (1, 2) and 0.079" (2mm) pitch.

NOTE: The shaded table cells denote Ground or Power. Default = jumper installed on 5-6.

2.11 Backlight Voltage Select

Table 2-11 lists the pin signals of the Backlight Voltage Select jumper header, which provides 3pins, single-row, with 0.079" (2mm) pitch.

NOTE: The shaded table cells denote Ground or Power. Default = jumper installed on 1-2.

Table 2-9: Backlight and LVDS Supply Voltage Select (CN62)

Pin # Signal

1 +V3P3_ATX2 +12P0_FUSED3 GND (LCD voltage at CN66, pins 3 and 4; select 1-3 for 3.3V or 3-5 for

5V)4 GND (Backlight voltage at CN65, pin 8; select 2-4 for 12V or 4-6 for 5V)5 +V5P0_ATX6 +V5P0_ATX

Table 2-10: PS_ON Selection (CN63)

Pin # Signal

1 +V5P0_SBY2 GND3 SUS_S3#4 GND5 SUS_S5#6 GND

Table 2-11: Backlight Voltage Select Signals (CN64 [for pin 2 at CN65])

Pin # Signal

1 +V12P0_ATX2 Pin 2 at CN653 +V5P0_ATX


2.12 LVDS Backlight

Table 2-12 lists the pin signals of the LVDS Backlight interface, which provides 8 pins, 2 rows, withodd/even pin sequence (1, 2) and 0.100" (2.54mm) pitch.

NOTE: The shaded table cells denote Ground or Power.

2.13 LVDS Interface

Table 2-13 lists the pin signals of the LVDS Interface header, which provides 34 pins, 2 rows, withodd/even sequence (1, 2) and 0.079" (2mm) pitch.

NOTE: The shaded table cells denote Ground or Power.

Table 2-12: LVDS Backlight (CN65)

Pin # Signal

1 GND2 +VCC_BKLT_A (fixed voltage 5V or 12V selected at CN64)3 LVDS_BKLT_CTRL4 GND5 LVDS_BKLT_EN_NI6 GND7 Not Connected8 +VCC_BKLT (switched backlight voltage, controlled by chipset and

selected at CN62)

Table 2-13: LVDS Interface Signals (CN66)


1 LVDS_CON_DC_DATA 2 LVDS_CON_DDC_CLK3 +VCC_LVDS (switched

LVDS voltage controlled by chipset and selected at CN62)

4 +VCC_LVDS

5 GND 6 LVDS_CON_A0_N7 LVDS_CON_A0_P 8 LVDS_PWR_EN_NI9 LVDS_CON_A1_N 10 LVDS_CON_A1_P11 LVDS_BKLT_EN_NI 12 LVDS_CON_A2_P13 LVDS_CON_A2_N 14 Not Connected15 LVDS_CON_ACLK_N 16 LVDS_CON_ACLK_P17 +VCC_LVDS 18 LVDS_CON_A3_P19 LVDS_CON_A3_N 20 GND21 LVDS_CON_B0_N 22 LVDS_CON_B0_P23 GND 24 LVDS_CON_B1_N25 LVDS_CON_B1_P 26 GND27 LVDS_CON_B2_N 28 LVDS_CON_B2_P29 GND 30 LVDS_CON_BKLT_P31 LVDS_CON_BKLT_N 32 Not Connected33 LVDS_CON_B3_P 34 LVDS_CON_B3_N


Q7-BASE R1

2.14 SIO Enable

Table 2-14 lists the pin signals of the SIO Enable jumper header, which provides 3 pins, sin-gle-row, with 0.079" (2mm) pitch. Select 1-2 to enable SIO, 2-3 to disable SIO.

NOTE: The shaded table cells denote Ground. Default = jumper installed on 1-2.

2.15 UART Interface

Table 2-15 lists the pin signals of the UART Interface header, which provides 10 pins, 2 rows, withodd/even sequence and 0.100" (2.54mm) pitch.

NOTE: The shaded table cells denote Power or Ground. This port supports only RS232.

Table 2-14: SIO Enable Signals (CN69)

Pin # Signal

1 LPC_CLK2 SIO_CLK3 GND (SIO_OFF)

Table 2-15: UART Interface Signals (CN70)

Pin # Signal

1 Not Connected2 Not Connected3 CON_UART_RX4 CON_UART_RTS5 CON_UART_TX6 CON_UART_CTS7 Not Connected8 Not Connected9 GND10 +VCC_UART (+5 volts)


2.16 LPT Interface

Table 2-16 lists the pin signals of the LPT Interface header, which provides 26 pins, 2 rows, withodd/even sequence (1, 2) and 0.100" (2.54mm) pitch.


2.17 System Interface

Table 2-17 lists the pin signals of the System Interface header, which provides 20 pins, 2 rows,with odd/even sequence (1, 2) and 0.100" (2.54mm) pitch.

NOTE: The shaded table cells denote Ground. The # symbol indicates the signal is ActiveLow.

Table 2-16: LPT Interface Signals (CN71)


1 LPT_STB#_R 2 LPT_AFD#_R3 LPT_PD0_R 4 LPT_ERR#5 LPT_PD1_R 6 LPT_INIT#_R7 LPT_PD2_R 8 LPT_SLIN#_R9 LPT_PD3_R 10 GND11 LPT_PD4_R 12 GND13 LPT_PD5_R 14 GND15 LPT_PD6_R 16 GND17 LPT_PD7_R 18 GND19 LPT_ACK# 20 GND21 LPT_BUSY 22 GND23 LPT_PE 24 GND25 LPT_SLCT 26 +VCC_LPT (+5 volts)

Table 2-17: System Interface Signals (CN73)


1 +V3P3_SYSCON 2 +V5P0_SYSCON3 SMB_CLK 4 SPI_CLK5 SMB_DATA 6 SPI_MISO7 SMB_Q7_ALERT# 8 SPI_MOSI9 SUS_STAT# 10 SPI_CS0#11 GP1WIRE 12 SPI_CS1#13 WD_TRIG# 14 THRM#15 WD_OUT 16 THRMTRIP#17 BIOS_DIS# 18 BATLOW#19 GND 20 GND


Q7-BASE R1

2.18 CAN 5-Volt Enable

Table 2-18 lists the pin signals of the CAN Enable jumper header, which provides 2 pins with0.079" (2mm) pitch. The jumper header enables an additional 5 volts and ground for the CANheader at CN50, pin 9.

NOTE: The shaded table cells denote Ground or Power. Default = open pins, no jumperinstalled.

2.19 TPM Interface

Table 2-19 lists the pin signals of the TPM Interface socket, which provides 20 pins, 2 rows, withodd/even sequence (1, 2) and 0.100" (2.54mm) pitch.


2.20 USB Signals

The USB signals are routed to connectors USB1 (quadruple USB2) and CN47 (Ethernet/USB3/USB2) in the following ways.

2.20.1 USB1

From the bottom to top of connector USB 2.0, ports 4 and 5 from Q7 module. The two topUSB ports are not connected per default. Optional the USB 2.0 ports 6 and 7 signals (sharedwith SSRX and SSTX0) from Q7 module can be routed to this connector if they are not usedby the module as USB 3.0 signals SSRX0 and SSTX0. This is soldering option, only.

2.20.2 CN47

From bottom to top of connector USB 2.0, ports 0 and 2 from the Q7 module, USB 3.0 ports,SSRX0 and SSTX0 from the Q7 connector. The top USB 3.0 connector has USB 2.0 signalsonly. Optional, the USB 3.0 signals SSRX1 and SSTX1 from Q7 module (shared with USBports 4 and 5) can be routed to this USB 3.0 connector if they are not used as USB 2.0 sig-nals by the Q7 module. This is soldering only.

Table 2-18: CAN 5-Volt Enable Signals (CN77)

Pin # Signal

1 +V5P0_ATX2 Pin 9 at CN50

Table 2-19: TPM Interface Signals (CN78)


1 LPC_CLK 2 GND3 LPC_FRAME# 4 Removed5 CB_RESET# 6 Not Connected7 LPC_AD3 8 LPC_AD29 +V3P3_LPC_TPM 10 LPC_AD111 GP1WIRE 12 GND13 Not Connected 14 Not Connected15 +V3P3_SBY_LPC_TPM 16 LPC_SERIRQ17 GND 18 Not Connected19 LPC_PD# 20 Not Connected


2.20.3 USB2

This connector is used as Mini USB device connector. The signals are routed to USB port 1on the Q7 connector.

2.21 Serial Port Configuration Switches

For the two serial ports, COM1 and COM2 there are three switches for configuration.

2.21.1 SW1

Set driver data rate for COM1 and COM2 in RS485 mode.

NOTE: Defaults = 1-8 (OFF); 2-7 (ON); 3-6 (OFF); 4-5 (ON)

2.21.2 SW2

Enable termination in RS485 mode with 120Ohm.

NOTE: Defaults = 1-8 (OFF); 2-7 (OFF); 3-6 (OFF); 4-5 (OFF)

Driver Data Rate COM1 COM2

RS485 - 0.46 Mbps 1-8: set to OFF2-7: set to OFF

3-6: set to OFF4-5: set to OFF

RS485 - 0.115 Mbps 1-8: set to OFF2-7: set to ON

3-6: set to OFF4-5: set to ON

RS485 - 20 Mbps 1-8: set to ON2-7: set to ON

3-6: set to ON4-5: set to ON

COM1 COM2




Q7-BASE R1

2.21.3 SW3

Select RS232 or RS485 functionality.

NOTE: Defaults = 1-4 (OFF); 2-3 (OFF)

COM1 COM2

1-4: OFF for RS232, ON for RS485 2-3: OFF for RS232, ON for RS485


Q7-BASE R1

Appendix A Technical Support ADLINK Technology, Inc. provides a number of methods for contacting Technical Support listedin Table A-1 below. Requests for support through Ask an Expert are given the highest priorities,and usually will be addressed within one working day.

ADLINK Ask an Expert – This is a comprehensive support center designed to meet all your technical needs. This service is free and available 24 hours a day through the ADLINK web site at http://www.adlinktech.com/AAE/. This includes a searchable data-base of Frequently Asked Questions, which will help you with the common information requested by most customers. This is a good source of information to look at first for your technical solutions. However, you must register online if you wish to use the Ask a Ques-tion feature.

ADLINK strongly suggests that you register with the web site. By creating a profile on theADLINK web site, you will have a portal page called “My ADLINK”, unique to you withaccess to exclusive services and account information.

Personal Assistance – You may also request personal assistance by creating an Ask an Expert account and then going to the Ask a Question feature. Requests can be submit-ted 24 hours a day, 7 days a week. You will receive immediate confirmation that your request has been entered. Once you have submitted your request, you must log in to go to the My Question area where you can check status, update your request, and access other features.

Download Service – This service is also free and available 24 hours a day at http://www.adlinktech.com. For certain downloads such as technical documents and soft-ware, you must register online before you can log in to this service.

Table A-1: Technical Support Contact Information

Method Contact Information

Ask an Expert http://www.adlinktech.com/AAE/

Web Site http://www.adlinktech.com

Standard Mail

Contact us should you require any service or assistance. ADLINK Technology, Inc. Address: 9F, No.166 Jian Yi Road, Zhonghe District New Taipei City 235, Taiwan 166 9 Tel: +886-2-8226-5877 Fax: +886-2-8226-5717 Email: [email protected] Ampro ADLINK Technology, Inc. Address: 5215 Hellyer Avenue, #110, San Jose, CA 95138, USA Tel: +1-408-360-0200 Toll Free: +1-800-966-5200 (USA only) Fax: +1-408-360-0222 Email: [email protected] ADLINK Technology (China) Co., Ltd. Address: 300 (201203) 300 Fang Chun Rd., Zhangjiang Hi-Tech Park,

Pudong New Area, Shanghai, 201203 China Tel: +86-21-5132-8988 Fax: +86-21-5132-3588 Email: [email protected]

21

Table A-1: Technical Support Contact Information (Continued)

ADLINK Technology Beijing Address: 1 E 801 (100085)

Rm. 801, Power Creative E, No. 1 Shang Di East Rd. Beijing, 100085 China Tel: +86-10-5885-8666 Fax: +86-10-5885-8626 Email: [email protected]

ADLINK Technology Shenzhen Address:

A1 2 C (518057) 2F, C Block, Bldg. A1, Cyber-Tech Zone, Gao Xin Ave. Sec. 7 High-Tech Industrial Park S., Shenzhen, 518054 China

Tel: +86-755-2643-4858 Fax: +86-755-2664-6353 Email: [email protected]

LiPPERT ADLINK Technology GmbH Address: Hans-Thoma-Strasse 11, D-68163 Mannheim, Germany Tel: +49-621-43214-0 Fax: +49-621 43214-30 Email: [email protected]

ADLINK Technology, Inc. (French Liaison Office) Address: 6 allée de Londres, Immeuble Ceylan 91940 Les Ulis, France Tel: +33 (0) 1 60 12 35 66 Fax: +33 (0) 1 60 12 35 66 Email: [email protected]

ADLINK Technology Japan Corporation Address: 101-0045 3-7-4

374 4F KANDA374 Bldg. 4F, 3-7-4 Kanda Kajicho, Chiyoda-ku, Tokyo 101-0045, Japan


ADLINK Technology, Inc. (Korean Liaison Office) Address: 137-881 326, 802 ( , )

802, Mointer B/D, 326 Seocho-daero, Seocho-Gu, Seoul 137-881, Korea


ADLINK Technology Singapore Pte. Ltd. Address: 84 Genting Lane #07-02A, Cityneon Design Centre

Singapore 349584 Tel: +65-6844-2261 Fax: +65-6844-2263 Email: [email protected]

ADLINK Technology Singapore Pte. Ltd. (Indian Liaison Office) Address: #50-56, First Floor, Spearhead Towers

Margosa Main Road (between 16th/17th Cross) Malleswaram, Bangalore - 560 055, India Tel: +91-80-65605817, +91-80-42246107 Fax: +91-80-23464606 Email: [email protected]

22

Q7-BASE R1

Table A-1: Technical Support Contact Information (Continued)

ADLINK Technology, Inc. (Israeli Liaison Office) Address: 27 Maskit St., Corex Building PO Box 12777 Herzliya 4673300, Israel Tel: +972-54-632-5251 Fax: +972-77-208-0230 Email: [email protected]

ADLINK Technology, Inc. (UK Liaison Office) Tel: +44 774 010 59 65 Email: [email protected]

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