rochester institute of technology - microe © rep/lff 8/17/2015 metal gate pmos process emcr201 pmos...

Rochester Institute of Technology - MicroE © REP/LFF 04/19/23

Metal Gate PMOS Process

EMCR201 PMOS page-1

10 Micrometer Design Rules 4 Design Layers 4 Photolithography Layers Metal (Aluminum) Gate


This is the process flow you will use to fabricate your own transistors in the sophomore level EMCR350 course



EMCR201 PMOS page-2

Process Flows

Resistors

Get wafer, scribe and clean

Grow masking oxide

Pattern for diffusion

Etch masking oxide

Strip resist

Clean and spin on dopant

Diffuse

Strip off dopant source and masking oxide

Grow new thick oxide

Pattern for contact cuts

Etch thick oxide

Strip resist

Deposit Aluminum

Pattern for aluminum etch

Etch Aluminum

Strip resist

Sinter

PMOS Transistors

Get wafer, scribe and clean

Grow masking oxide

Pattern for diffusion

Etch masking oxide

Strip resist

Clean and spin on dopant

Diffuse

Strip off dopant source and masking oxide

Grow new thick oxide

Pattern for thin (gate) oxide

Grow gate oxide

Pattern for contact cuts

Etch thick oxide

Strip resist

Deposit Aluminum

Pattern for aluminum etch

Etch Aluminum

Strip resist

Sinter

1 1

2

3

4

2

3



EMCR201 PMOS page-3

Design Rules

The smallest a contact can be is one unit (lambda, ) by one unit. In this case lambda will be 10 microns

Diffusion and metal have to extend at least one unit around a contact

The gate oxide has to extend over a diffusion by at least on unit



EMCR201 PMOS page-4

STARTING WAFER N-TYPE, 5 OHM-CM

Silicon



EMCR201 PMOS page-5

ID01 - Scribe Identification Code on the Wafer

DE01 - Four Point Probe to Check Resistivity

L030924D1

V

I



EMCR201 PMOS page-6

OXIDE THICKNESS COLOR CHART

Thickness Color Thickness Color500 Tan 4900 Blue700 Brown 5000 Blue Green

1000 Dark Violet - Red Violet 5200 Green1200 Royal Blue 5400 Yellow Green1500 Light Blue - Metallic Blue 5600 GreenYellow1700 Metallic - very light Yellow Green 5700 Yellow -"Yellowish"(at times appears to be Lt gray or matellic)

2000 LIght Gold or Yellow - Slightly Metallic 5800 Light Orange or Yellow - Pink2200 Gold with slight Yellow Orange 6000 Carnation Pink2500 Orange - Melon 6300 Violet Red2700 Red Violet 6800 "Bluish"(appears violet red, Blue Green, looks grayish)3000 Blue - Violet Blue 7200 Blue Green - Green3100 Blue 7700 "Yellowish"3200 Blue - Blue Green 8000 Orange3400 Light Green 8200 Salmon3500 Green - Yellow Green 8500 Dull, LIght Red Violet3600 Yellow Green 8600 Violet3700 Yellow 8700 Blue Violet3900 Light Orange 8900 Blue4100 Carnation Pink 9200 Blue Green4200 Violet Red 9500 Dull Yellow Green4400 Red Violet 9700 Yellow - "Yellowish"4600 Violet 9900 Orange4700 Blue Violet 10000 Carnation Pink



EMCR201 PMOS page-7

Dry Oxidation

800C

(100) Si (111) Si

900C

1000C

1200C

1100C

800C

900C

1000C

1100C1200C

0.1 1.0 10.0 0.1 1.0 10.0

Ox

ide

Th

ick

ne

ss

(m

)

Ox

ide

Th

ick

ne

ss

(m

)

0.1 0.1

1.01.0

0.01 0.01

Oxidation time in hoursOxidation time in hours



EMCR201 PMOS page-8

Steam Oxidation

(111) Si

850C900C

1000C1100C

1200C

0.1 1.0 10.0

Ox

ide

Th

ick

ne

ss

(m

)0.1

10

0.01

1

Ox

ide

Th

ick

ne

ss

(m

)

0.1

10

0.01

1

0.1 1.0 10.0Oxidation time in hoursOxidation time in hours

(100) Si

950C

1050C

1150C

850C

900C

1100C

1200C

950C

1050C

1150C

1000

C



EMCR201 PMOS page-9

MINIMUM OXIDE THICKNESS FOR DIFFUSION MASKING

Xox , µm

1,000

10-1

10-2

10-3

t, Time, (min)10 100

10

1

900

1200

1100

1000Boron

Phos.

900

1200 C1100

1000



EMCR201 PMOS page-10

RCA Clean then Grow 5000 Å Oxide

5000 Å SiO2

Push at 900 C in N2

Ramp to 1100 C in dry O2

Start Soak at 1090 C Time = 48 min. in wet O2

Ramp down to 1000 C in N2

Pull at 1000 C in N2

Bare silicon

After silicon dioxide growth(should look blue-green)It can be hard to tell under the microscope




BUFFERED HF

STEP ETCH APPARATUS

Lower 1/4 inch every 30 seconds

OxidePlastic, right!




ETCH STEPS IN OXIDE ON C1ETCH STEPS IN OXIDE ON C1

BARE SILICON

700 Å

1400 Å

2100 Å

2800 Å

3500 Å

4200 Å

Side View Top View

Actual colors are not this saturated




COAT WITH PHOTORESISTCOAT WITH PHOTORESIST

5000 Å SiO2

1 µm Positive Photoresist




Expose with Mask Layer One – Diffusion Openings

Silicon

SiO2

opaqueclear

1x Mask

exposed areas develop away

positive photoresist

ShadowUltra-Violet Radiation




ETCH OXIDEETCH OXIDE

Not drawn to the same scale horizontally as vertically, the actualCross-sectional view should be 20-50 times wider.




STRIP RESIST and RCA CLEANSTRIP RESIST and RCA CLEAN




After Patterning of Diffusion Masking Oxide

Bare Silicon Silicon Dioxide

Diffusion openings(Bare Silicon)




SPIN-ON P-TYPE DOPANTSPIN-ON P-TYPE DOPANT




PRE-DEPOSIT, OXIDE ETCH and RCA CLEANPRE-DEPOSIT, OXIDE ETCH and RCA CLEAN

Xj1 s1




ETCH STEPS IN OXIDE ON C5ETCH STEPS IN OXIDE ON C5FIND SLOW AND FAST ETCH RATESFIND SLOW AND FAST ETCH RATES

8000 Å

BARE SILICON

FAST

SiO2 Mask

Si

Before Diffusion

SLOW

After diffusion and step etch




PAINT RESIST STRIP ETCH C1 BAREPAINT RESIST STRIP ETCH C1 BARE

FIND MINIMUM OXIDE THICKNESS TO MASK FIND MINIMUM OXIDE THICKNESS TO MASK BORON DIFFUSIONBORON DIFFUSION

8000 Å

BARE SILICON WITH SPIN-ON DOPANT

XXXX

.V/I=V/I=V/I=V/I=V/I=...




GROOVE and STAIN C2, FIND XGROOVE and STAIN C2, FIND Xj1j1 AFTER PRE-DEPOSIT AFTER PRE-DEPOSIT

Xj = (N * M) / D

D

MN

Groove

After Stain




DE01 - FOUR POINT PROBE C1, C2, C3, C4DE01 - FOUR POINT PROBE C1, C2, C3, C4

FIND SHEET RESISTANCE OF DIFFUSION FIND SHEET RESISTANCE OF DIFFUSION AFTER PREDEPOSITAFTER PREDEPOSIT

V

I

ohms/squareln 2s

V

I




FIELD OXIDE GROWTH (5000 Å)

Push at 900 C in N2


Start Soak at 1090 C Time = 48 min. in wet O2


Pull at 1000 C in N2

Slightly Thicker Oxide Over Diffusion




After Field (Thick) Oxide Growth

Oxide over lightly doped silicon

Oxide over heavily doped

silicon




Photolithography, Mask Level 2 (define thin OXIDE regions)

opaqueclear

Shadow Ultra-Violet Radiation




Active (thin oxide) Area Etch and resist strip




After Patterning/Etching Masking SiO2 (before Thin Gate SiO2 Growth)

Note that text has been added to the design to label devices, pads etc.




OXIDE ETCH C3 and C4 BAREOXIDE ETCH C3 and C4 BARE

These wafers are used to find the intermediate junction depths and sheet resistances as we go through the process. Note that Xj2 is deeper than Xj1.

Xj2 s2




GROOVE and STAIN and 4PT PROBE C3GROOVE and STAIN and 4PT PROBE C3

ohms/square

Xj = (N * M) / D

D

MN

Groove

After Stain

VI

ln 2s

V

I




ASH RESIST, CLEAN, GROW GATE OXIDE - 700 Å

700 Å SiO2

Push at 900 C in N2


Start Soak at 1090 C Time = 50 min. in dry O2


Pull at 1000 C in N2SiO2




After Thin Gate Oxide Growth (dark brown areas)




Shadow

Shadow

Shadow Shadow

PHOTOLITHOGRAPHY MASK LEVEL 3 - CONTACT CUTPHOTOLITHOGRAPHY MASK LEVEL 3 - CONTACT CUT

opaqueclear

SiO2

SiO2




OXIDE ETCH C4 BAREOXIDE ETCH C4 BARE

Xj3 s3

Xj3 is deeper than Xj2!




GROOVE and STAIN and 4PT PROBE C4GROOVE and STAIN and 4PT PROBE C4

ohms/square

Xj = (N * M) / D

D

MN

Groove

After Stain

VI

ln 2s

V

I




CONTACT CUT ETCHCONTACT CUT ETCH

SiO2

SiO2




Photomicrograph after contact cut etch and resist strip

Contact

Thin Oxide~700 Å Thick Oxide




ASH RESIST, RCA CLEAN and ASH RESIST, RCA CLEAN and SPUTTER ALUMINUMSPUTTER ALUMINUM

Xal s aluminum

SiO2

SiO2




After Aluminum Deposition

Note how reflective the aluminum is

Aluminum everywhere,Everything short circuited




PHOTOLITHOGRAPHY LEVEL 4 - METALPHOTOLITHOGRAPHY LEVEL 4 - METAL

opaque clearv

Shadow

SiO2

SiO2




ETCH ALUMINUM (40°C Phosphoric Acid)ETCH ALUMINUM (40°C Phosphoric Acid)

Silicon

SiO2

SiO2

Aluminum

P-type P-type

photoresist




ASH RESISTASH RESIST




After Aluminum Etch and Resist Strip

Electrical Probe Pads are now visible, pad numbers were done in the diffusion layer




SINTER – Improves Contacts and Threshold VoltageSINTER – Improves Contacts and Threshold Voltage

Native Oxide

Before Sinter After Sinter

Reduce Surface States

Reduce Contact Resistance

OxygenHydrogen, neutral region

Silicon Crystal

+ charge region SiO2

Interfacesiliconatom that hasNothing to bondto (missing electron)




Electrical TESTElectrical TEST

PMOS TRANSISTOR

CROSS-OVER

GATESOURCEDRAIN

S

G

DD

X

SiO2

Silicon

Aluminum

SiO2

rochester institute of technology - microe © rep/lff 8/17/2015 metal gate pmos process emcr201 pmos...

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