september 24 to 26, 2012 - minatec campus, grenoble ...iscdg2012.insight-outside.fr/ieee...

2012 International Semiconductor ConferenceDresden - Grenoble (ISCDG)

alternating venue in Dresden (Germany) and Grenoble (France) every other year

Technology, Design, Packaging, Simulation and TestInternational Conference, Short Course and Table Top Exhibition

September 24 to 26, 2012 - MINATEC Campus, Grenoble, France

PROGRAM

Venue: Maison MINATEC

3 parvis Louis Néel 38054 GRENOBLE CEDEX 9, FRANCE

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„Meet Leading Players and Experts at the ISCDG 2012 in Grenoble, France, the Centre of High Tech in the Capital of the Alps“

2012 International Semiconductor ConferenceDresden - Grenoble (ISCDG)

alternating venue in Dresden (Germany) and Grenoble (France) every other year

Technology, Design, Packaging, Simulation and TestInternational Conference, Short Course and Table Top Exhibition

September 24 to 26, 2012 - MINATEC Campus, Grenoble, France

2012 International Semiconductor Conference Dresden - Grenoble (ISCDG)

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Welcome Note from Chair of ISCDG 2012

Dear Friends and Colleagues,

It is a big pleasure for me to welcome you to the IEEE 2012 International Semiconductor Conference Dresden-Grenoble (2012 ISCDG). This year, the conference will be held for the first time in its international format in Grenoble. Grenoble and Dresden are the two major European Semiconductor Research, Development and Production sites. In the preceding editions of 2009 and 2011, the conference was named “Semiconductor Conference Dresden”. The objective of the ISCDG is to enhance the visibility of both cities international excellence.The scope of the conference is to foster research and development papers in the areas of Materials, devices and sys-tems science, engineering and architectures and their characterization. Papers on circuit and system design, packaging, simulation and modeling, measuring and testing, semiconductor materials, technologies and fabrication have been put together by the program committee. I warmly thank the different committees and teams in Grenoble and Dresden for their efforts in making this event a reality.

During the 2012 ISCDG conference held in Grenoble, there have been 5 plenary talks, 10 invited papers, 28 oral con-tributed papers and 20 poster contributed papers. These presentations originated from various countries such as 27 from France, 19 from Germany, 2 from USA, 2 from Japan, 2 from Taiwan, 2 from Korea, 2 from Spain, 1 from China, 1 from Egypt, 1 from Czech Republic, 1 from Ireland, 1 from Portugal and 1 from Romania. We hope you will enjoy, as well, the exhibition, the industrial forum , the panel session and the short course given in the conference facilities of our MINATEC Campus. As one of the exceptional highlights of the conference, we will be very proud to welcome in the MINATEC Auditorium, 7 distinguished panelists on Monday evening following the Industrial Forum. We are looking forward to share with you the conference diner in the wonderful site of the Bastille (476 m above sea level) and wish you a pleasant stay in our nice city of Grenoble.

Looking forward to meeting you in Grenoble during the 2012 ISCDG.

Simon Deleonibus, General Chair 2012 ISCDG

General ChairmanSimon Deleonibus, CEA LETI

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Patronage Steering Comittee Technical Program Committee

Hermann Eul, President Intel Mobile Communications

General ChairSimon Deleonibus, CEA LETI

Hendrik Ahlendorf, ZMDI DresdenPascal Ancey, STMicroelectronicsHans-Joachim Barth, Infi neonMarc Belleville, CEA LETIFrançois Bertin, CEA LETIEric Beyne, IMECJumana Boussey, CNRSJean Emmanuel Broquin, INPAndreas Bruening, ZMDIIsabelle Chartier, CEA-LITENCor Claeys, IMECBarbara de Salvo, CEA LETIRenaud Demadrille, INACBernard Dieny, INACJean-Marc Fedeli, CEA LETIPhilippe Ferrari, UJFNorbert Fruehauf, Universitaet StuttgartBenoit Giff ard, CEA LETIKeith Jenkins, IBMHervé Jaouen, STMicroelectronicsOlivier Joubert, CNRSAnne Kaminski, INP Klaus-Dieter Lang, Fraunhofer IZM BerlinSiegfried Mantl, Forschungszentrum JuelichBernd Meinerzhagen, Technische Universitaet BraunschweigBernd Michel, Fraunhofer ENAS ChemnitzSlobodan Mijalkovic, SilvacoHenri Mariette, UJFStéphane Monfray, ST MicroelectronicsDominique Morche, CEA LETIMireille Mouis, INPBich Yen Nguyen, SOITECThierry Poiroux, CEA LETIGilles Poupon, CEA LETIQuentin Rafhay, INPPhilippe Robert, CEA LETIJeff rey Wetzel, SVTC Technologies, LLCThomas Skotnicki, ST MicroelectronicsSolon Spiegel, Rio SystemsRoland Thewes, Technische Universitaet BerlinNorbert von Thyssen, Infi neonClaude Vauchier, CEA LETIEmmanuel Vincent, ST MicroelectronicsPaul Yu, UCSDEhrenfried Zschech, Fraunhofer IZFP Dresden

General Co-ChairFrank Ellinger, Technische Universitaet Dresden

Technical Program ChairGérard Ghibaudo, INP

Technical Program Co-ChairJoachim Burghartz, IMS CHIPS

André-Jacques Auberton-HervéCEO, SOITEC

Head of Advisory BoardRobert Weigel, Friedrich-Alexander Universitaet Erlangen-Nuremberg

Publications ChairFrancis Balestra, INP

Pubications Co-ChairDietmar Kissinger, Friedrich-Alexander Universitaet Erlangen-Nuremberg

Jean-Marc ChéryChief Manufacturing and Technology Officer Executive Vice President STMicroelectronics

Gerhard Fettweis, Technische Universität DresdenThomas Gessner, Chemnitz University of TechnologyPatrick Cogez, ST MicroelectronicsAhmad Bsiesy, UJF

Advisory Board

Alain Astier, STMicroelectronicsMichel Brillouet, CEA-LETICorrado Carta, Technische Universitaet DresdenRoberto Gaertner, XFabJean-Charles Guibert, MINATECPeter Kuecher, CNT-FhGCarlos Mazuré, SOITECWolfgang Mehr, IHPThomas Mikolajick, NamlabAlain Schuhl, UJFThilo von Selchow, ZMDIHelmut Warnecke, Infi neon TechnologiesFrançois Weiss, INPAndreas Wild, ENIAC JU

Exhibition Co-ChairsDidier Louis, CEA-LETIGeorg Schmidt, GEROTRON Communication


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Industrial support

Institutional support

Support

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Location

Maison MINATEC parvis Louis Néel

F - GRENOBLE CEDEX


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Main areas covered by the conference: Materials, devices and systems science, engineering and architectures and their characterization

Integrated Circuit and System Design:Mixed-signal, analogue and digital circuits and systems for high speed and/or low power consumption, adap-tive power management, RF up to sub-THz, low costs, and advanced performance and density, circuits in More than Moore and Beyond Moore technologies. Manufacturing challenges (cost and cycle time reduction, test, wafer –prime - production.etc..)

More Moore and Beyond Moore Devices Technologies and Architectures

Ultimate CMOS (Silicon and Strained IV-IV alloys on insulator, multi-gate and channels transistors, III-V chan-nels), nanowires; Thin films dielectrics: High-K and Low-K; nano-materials; Beyond Moore: TunFETs, carbon electronics,…

Memory technologies

Sand alone and Embedded Memory Technologies, New memory technologies: RRAMs, CBRAMs, MRAMs, 1T DRAM, …

More than Moore technologies

MEMS, NEMS, power devices (GaN, GaP), RF and analog passive components (MIM, filters, supercapacitors, inductances,…); Spintronics based devices; Bio sensors, BioMEMS, BioNEMS, POC devices, Implanted devices, gas sensors, chemical sensors, Imagers, energy harvesting, thermoelectricity, ...

Interconnection and Packaging Technologies

3-D and novel interconnects, Wire bonding, flip chip, solder replacement flip chip, under bump metallurgy, high density substrates, New packaging technologies for single chip, multi-chip, wafer level, power and sta-cked-die packages, Wafer bumping and thinning, …

Optical Devices and Photonics

Optical component assemblies, electro-optical modules, waveguides, silicon based photonic devices, organic devices, optical materials

Organic and flexible electronics

polymer and organic, ink-jet printed electronics, organic PV and PV in organic, OLEDs, …

Characterization, Quality and ReliabilityElectrical characterization, testing strategies and protocols, physical characterization for process development and process control. Component, board and system level reliability assessment, failure analysis, interfacial adhesion, accelerated testing and models, component and system qualification.

Modeling and Simulation

EDA, TCAD, electrical, thermal, thermo-mechanical, reliability, optical, modeling and simulation for devices, component and system level applications.

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Conference Registration: Monday, September 24, 2012, 8.00 am - 4.00 pm Tuesday, September 25, 2012, 8.00 am - 4.00 pm

Conference Opening: Monday, September 24, 2012, 8.30 am

Technical Sessions: Monday, September 24, 2012, 9.10 am - 7.00 pm Tuesday, September 25, 2012, 8.30 am - 4.45 pm

Short Courses: Wednesday, September 26, 2012, 8.30 am - 4.50 pm

Poster Session: Monday, September 24 and Tuesday, September 25, 2012 during Co� ee Breaks and Lunch

Table-top Exhibition Opening hours: Monday, September 24, 2012, 8.00 am - 5.00 pm Tuesday, September 25, 2012, 8.00 am - 4.00 pm

Social Event: Monday, September 24, 2011, 8.00 pm - 10.30 pm Gala Dinner at “The Bastille”

The ISCDG 2012 conference Gala Dinner will happen on Monday night and will take place in the well known and famous Bastille.

In the heart of Grenoble, welcome to La Bastille, a small forti-fied mountain located at the crossroad of three valleys, served by the first urban cable-car in the world. In a few minutes, day and night, the famous “bubbles” of Grenoble take you in the air from the center of the town up to the Bastille fortress. From the hilltop, you will discover the flattest town in France in its mountain setting! When the sun sets and the lights go down in the city, the view is outstanding.

In order to get to the restaurant, all conference participants will be offered the cable car. The cable car can be easily accessed from MINATEC conference center using public transportation.For people who would like to go to the Bastille by walking, this is also possible in approximately a 1h00 walk. We need to say that this is a real mountain walking, you better have good shoes and some water ! But this is really worth the trip and you will remember it.

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Track 1 Monday, Sept. 24, 2012

Opening Session (Auditorium)

8.30 - 8.45 S. Deleonibus, CEA-LETI; Grenoble, France General introduction

8.45 - 8.55 Welcome address, Ville de Grenoble

8.55 - 9.10 A. Astier1, H.-M. Esser2;

1 STMicroelectronics, Crolles, France; 2 Silicon Saxony President, Dresden, Germany

The Cooperation between the Microelectronics Clusters of Dresden and Grenoble: a Unique Opportunity for the European High-Tech Regions

Plenary Session 1 (Auditorium)

9.10 - 9.50 A.-J. Auberton-Hervé, C. Mazuré; SOITEC, Bernin, France

The Role of SOITEC in a Future Diversified Low Power Electronics and Energy Production Demanding Market (plenary talk)

9.50 - 10.30 G. Fettweis;Technische Universitaet Dresden, Dresden, Germany

Future Perspectives for Mobile Circuits and Applications (plenary talk)

10.30 - 11.00 Coffee Break at Poster and Exhibition

11.00 - 11.40 U-In Chung, Samsung Advanced Institute of Technology, Yongin-City, Gyeonggi-Do, Korea Prospects and Challenges for Future Nanoelectronics (plenary talk)

Session A.1: Circuits (Auditorium) Chair: M. Jung (Friedrich-Alexander University of Erlangen-Nuremberg)

11.40 - 12.20 F. Ellinger; Technische Universitaet Dresden, Dresden, Germany

Cool Silicon ICT Energy Efficiency Enhancements (invited)

12.20 - 12.40 A. Wickmann, F. Ohnhaeuser; Texas Instruments Dt. GmbH, Erlangen, Germany

A Floating CDAC Architecture for High-Resolution and Low-Power SAR A/D Converter

12.40 - 13.00 F. Ohnhaeuser1, J. Bialek2; 1 Texas Instruments Dt. GmbH, Erlangen, Germany; 2 Friedrich-Alexander University of Erlangen-Nuremberg, Erlangen, Germany

A 1.5mW 1MSPS 16bit SAR ADC with High Performance

13.00 - 14.10 Lunch at Poster and Exhibition

Session C1: More than Moore (Auditorium) Chair: G. Poupon (CEA-LETI)

14.10 - 14.50 L. Montes; IMEP-LAHC, INP Grenoble, France

PiezoNEMS: Semiconductor Nanowires and Heterostructures for Sensing and Energy Harvesting (invited)

14.50 - 15.10 G. Ardila, R. Hinchet, M. Mouis, L. Montés;IMEP-LAHC, INP Grenoble, France

Scaling Prospects in Mechanical Energy Harvesting using Piezoelectric Nanostructures

15.10 - 15.30 U. Kaletta, D. Wolansky, M. Fraschke, Ch. Wenger;IHP Frankfurt-Oder, Germany

Development of CMOS Integrated A1N based SAW-Filter and the Role of Si Substrate Resistivity

15.30 - 15.50 C. Ó Mathuna, N. Wang, S. Kulkarni, S. Roy; Tyndall National Institute, Ireland

PwrSoC (Integration of Inductors and Capacitors with Active Semiconduc-tors) for More than Moore Technologies

15.50 - 16.10 A. Nowodzinski, H. Boutry, R. Franiatte, V. Mandrillon, R. Anciant, S. Verrun, G. Simon;CEA-LETI, Grenoble, France

Reliability Tests on Micro-insert Die Bonding Technology

16.10 - 16.30 Coffee break at Poster and Exhibition

Industrial Froum (Auditorium)

16.30 - 16.50 G. Dubois; Member of the EU SMART 2010/0062 Study Group, Grenoble, France

450mm, the European Dilemma?

16.50 - 17.10 L. Jamet, J. Y. Gomez; ISORG, MINATEC Campus, Grenoble, France

Printed Image Sensors for Consumer and Industrial Markets: a Unique Combination of Technology, Performances, Innovative Product Design and New Consumer Usages

17.10 - 17.30 G. Haas; Microoled, MINATEC Campus, Grenoble, France

OLED Microdiplays for Consumer and Professional Applications

Panel Session (Auditorium)

17.30 - 19.00 Moderators: S. Deleonibus (CEA-LETI) and V. Péquignat (AEPI, Grenoble) „The Future of European Semiconductor Research and Business and the Ways that European Actors Wish to Strengthen Cooperation“

20.00 - 22.30 Gala diner (Bastille)

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Monday, Sept. 24, 2012 Track 2

8.30 - 8.45

8.45 - 8.55

8.55 - 9.10

Chairs: S. Deleonibus (CEA-LETI), F. Ellinger (Technische Universitaet Dresden )

9.10 - 9.50

9.50 - 10.30

10.30 - 11.00

11.00 - 11.40

Session B.1: CMOS and Beyond CMOS (Room 221) Chair: M. Mouis (INPG-IMEP)

C. Berger; Georgia Institute of Technology, Atlanta, Georgia, USA

High Mobility Graphene for Nanoelectronics (invited) 11.40 - 12.20

G. M. Landauer1, J. L. González2; 1 Universitat Politècnica de Catalunya, Barcelona, Spain; 2 CEA-LETI, Grenoble, France

A Compact Noise Model for Carbon Nanotube FETs 12.20 - 12.40

E. Dupont-Ferrier, B. Roche, B. Voisin, M. Pierre, X. Jehl, M. Sanquer, S. De Franceschi; SPSMS, CEA/INAC, Grenoble, France

Transport Measurement across Single and Coupled Dopants Implanted in a CMOS Channel

12.40 - 13.00

13.00 - 14.10

Session E.1: Characterization (Room 221) Chair: Q. Rafhay (INPG-IMEP)

S. S. Chung; National Chao Tung University, Taiwan

The Variability Issues in Small Scale Strained CMOS Devices: Random Dopant and Trap Induced Fluctuations (invited)

14.10 - 14.50

N. Subramanian, G. Ghibaudo, M. Mouis; IMEP-LAHC, INP Grenoble, France

Magnetoresistance Mobility Extraction in the Saturation Regime of Short Channel MOS Devices

14.50 - 15.10

C. Fernandez1, A. Diab2, N. Rodriguez1, A. Ohata3, F. Allibert4, I. Ionica2, F. Gamiz1, S. Cristoloveanu2; 1 University of Granada, Spain; 2 IMEP-Minatec, Grenoble, France; 3 Dept. Electronics, Osaka City University, Japan; 4 SOITEC, Chemin de Franque, Bernin, Crolles, France

Impact of Effective Capacitance Area on the Characterization of SOI Wafers by Split-C(V) in Pseudo-MOSFET Configuration

15.10 - 15.30

T. Anumeha, A. Basavalingappa, G. Sheu; Dept of Computer Science and Information Engineering, Asia University, Taiwan

Study of Energy Capability and Failure of LDMOSFET at Different Ambient Temperatures

15.30 - 15.50

J. Tan1, A. J. P. Theuwissen1,2; 1 Electronic Instrumentation Lab, Delft University of Technology Delft, Delft; 2 The Netherlands and Harvest Imaging, Bree, Belgium

Investigation of X-Ray Damage Effects on 4T CMOS Image Sensors 15.50 - 16.10

16.10 - 16.30

Chair : Didier Louis (CEA-LETI)

16.30 - 16.50

16.50 - 17.10

17.10 - 17.30

Chairs/Moderators: S. Deleonibus (CEA-LETI) and V. Pequignat (AEPI)

Panelists: J.-M. Chéry (ST Microelectronics), R. Ploss (Infineon), R. Wijburg (Globalfoundries), A.-J. Auberton-Hervé (SOITEC), L. Malier (CEA-LETI), L. van den Hove (IMEC), A. Wild (ENIAC)

17.30 - 19.00

20.00 - 22.30

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Track 1 Tuesday, September 25, 2012


8.30 - 9.10 H. Iwai; Tokyo Institute of Technology, Yokohama, Japan

Future of Nanoelectronics and Devices (plenary talk)

Session B.2: CMOS and memories (Auditorium) Chair: F. Balestra (INPG-IMEP)

9.10 - 9.50 P. Batude; CEA-LETI, Grenoble, France

Review of Key Enabling Technologies for 3D Sequential Integration (invited)

9.50 - 10.10 T. Baldauf1, R. Stenzel1, W. Klix1, A. Wei2, R. Illgen2, S. Flachowsky2, T. Herrmann2, J. Hoentschel2, M. Horstmann2; 1 University of Applied Sciences Dresden, Dresden, Germany; 2 GLOBALFOUNDARIES, Dresden, Germany

Strained Isolation Oxide as Novel Overall Stress Element for Tri-Gate Transistors of 22nm CMOS and Beyond

10.10 - 10.30 V. Della Marca1,2,3, L. Masoero3, G. Molas3, J. Amouroux1,2,3, E. Petit-Faivre1,2, J. Postel-Pellerin2, F. Lalande2, E. Jalaguier3, S. Deleonibus3, B. De Salvo3, P. Boivin1, J-L. Ogier1; 1 STMicroelectronics, Rousset, France; 2 Im2np-CNRS, Marseille, France; 3 CEA-LETI, Grenoble, France

Optimization of Programming Consumption of Silicon Nanocrystal Memories for Low Power Applications

10.30 - 11.00 Coffee Break at Poster and Exhibition

Session A.2: Circuits (Auditorium) Chair: D. Morche (CEA-LETI)

11.00 - 11.40 R. Brederlow; Texas Instruments Dt. GmbH, Freising, Germany

Integrated CMOS Circuits for Next Generation Medical Products (invited)

11.40 - 12.00 A. Heittmann, T.G. Noll; RWTH Aachen University, Aachen, Germany

Monte Carlo Simulation of Multilevel Switching in Hybrid CMOS/Memristive Nanoelectronic Circuits

12.00 - 12.20 S. Yamamoto, Y. Shuto, S. Sugahara; Tokyo Institute of Technology, Yokohama, Japan

Nonvolatile Flip-Flop using Pseudo-Spin-Transistor Architecture and its Power-Gating Application

12.20 - 12.40 K. Khalil, M. Abbas, M. Abdelgawad; Assiut University, Assiut, Egypt

Novel Technique for Reducing the Comparator Delay Dispersion in 45nm CMOS Technology for Level-Crossing ADCs

12.40 - 13.00 M. Maser, G. Fischer, R. Weigel, T. Ussmueller; Friedrich-Alexander University of Erlangen-Nuremberg, Erlangen, Germany

An Integrated SiGe Bipolar VCO with Linearized Tuning Behavior and Ultra-Wide Tuning Range for UWB FMCW Local Positioning Systems

13.00 - 14.10 Lunch at Poster and Exhibition


14.10 - 14.50 A. Bergemont; Maxim, Santa Clara, CA, USA

Analog Microelectronics: the End or Beginning of a New Story? (plenary talk)

Session A.3: Circuits (Auditorium) Chair: P. Ferrari (UJF)

14.50 - 15.10 M. Jung, G. Fischer, R. Weigel, T. Ussmueller; Friedrich-Alexander University of Erlangen-Nuremberg, Erlangen, Germany

A CMOS Divider Family for High Frequency Wireless Localization Systems

15.10 - 15.30 O. Goncalves, G. Prenat, B. Dieny; SPINTEC Laboraty, CEA/INAC, Grenoble, France

Radiation Hardened LUT for MRAM-based FPGAs

15.30 - 15.50 A. Heinig, M. Dittrich, S. Reitz, J. Stolle; Fraunhofer Institute for Integrated Circuits Division DesignAutomation, Dresden, Germany

A Flow for Parasitics Extraction in 3D-Systems

15.50 - 16.10 D. Henry1, A. Berthelot1, R. Cuchet1, C. Chantre1, M. Campbell2, T. Tick2,3; 1 CEA-LETI, Grenoble, France; 2 CERN, Geneva, Switzerland; 3 Czech Technical University, Prague, Czech

3D Integration Design & Technology for Hybrid Pixel Detectors used for Particle Physics and Imaging Experiments

16.45 Closing Session

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Tuesday, September 25, 2012 Track 2

Chair: G. Ghibaudo (IMEP-INPG

8.30 - 9.10

Session D.1: PV and Photo (Room 221) Chair: I. Chartier (CEA-LITEN)

V. Ivanova; CEA-LETI, Grenoble, France

Fabrication Techniques of Semiconducting Materials for Low Cost Photovoltaic Devices (invited)

9.10 - 9.50

J.-M. Verilhac; CEA-LETI, Grenoble, France

Recent Developments in Solution-processed Organic Photodetectors (invited)

9.50 - 10.30

10.30 - 11.00

Session E.2: Characterization (Room 221) Chair: E. Vincent (ST Microelectronics)

J. Keller; AMIC GmbH, Berlin, Germany

Experimental and Numerical Methods for Evaluation of Interface Cracks in Electronic Systems (invited)

11.00 - 11.40

L. Boglione; Naval Research Laboratory, Washington, DC, USA

A Noise Parameters Extraction Procedure Suitable for On-Wafer Device Characterization

11.40 - 12.00

C.-L. Hsu, G. Ardila, P. Benech; IMEP-LAHC, INP Grenoble, France

High Frequency Characterization and Modeling of Single Metallic Nanowire

12.00 - 12.20

D. Walczyk1, T. Bertaud1, M. Sowinska1, M. Lukosius1, M. A. Schubert1, A. Fox1, D. Wolansky1, A. Scheit1, M. Fraschke1, G. Schoof1, Ch. Wolf1, R. Kraemer1,2, B. Tillack1,3, R. Korolevych4, V. Stikanov4, Ch. Wenger1, T. Schroeder1,2, Ch. Walczyk1; 1 IHP, Frankfurt, Germany; 2 Brandenburg University of Technology, Cottbus, Germany; 3 Technische Universitaet Berlin, Berlin, Germany; 4 IASA, Kiev, Ukraine;

Resistive Switching Behavior in TiN/HfO2/Ti/TiN Devices 12.20 - 12.40

A.-L. Franc1, P. Ferrari2, G. Rehder2; 1 IMEP-LAHC, INP Grenoble, France; 2 University of Sao Paulo, SP, Brazil

A Millimeter-Wave Integrated Sensor for the Dielectric ConstantCharacterization of Pico-Liter Volumes of Liquids

12.40 - 13.00

13.00 - 14.10

Chair: M. Belleville (CEA-LETI)

14.10 - 14.50

Session C2: Interco and BEOL (Room 221) Chair: P. Cogez (ST Microelectronics)

F. Boeuf1, L. Fulmbert2; 1 STMicroelectronics, Crolles, France; 2 CEA-LETI, Grenoble, France

Silicon Photonics and Optical Interconnect (invited) 14.50 - 15.30

J. H. Lee1, J. W. Lee1, N. I. Lee1, X. Shen2, H. Matsuhashi2, W. Nehrer2; 1 SAMSUNG Co. Ltd, Young In, Korea; 2 PDF Solution, San Jose, CA, USA

Proactive BEOL Yield Improvement Methodology for a Successfull Mobile Product

15.50 - 16.10

O. Le Barillec1, M. Davenet1, A. Favre1, B. Bellet2, M. Koitzsch3, M. Schellenberger3, H.-U. Zühlke4; 1 Adixen, Annecy, France; 2 INOPRO, Grenoble, France; 3 Fraunhofer Institute for Integrated Systems and Device Technology IISB, Erlangen, Germany; 4 JENOPTIK Automatisierungstechnik GmbH, Jena, Germany

Advanced Vacuum Wafer Drying for Thermal Laser Separation Dicing 16.10 - 16.30

16.45

2012 Semiconductor Conference Grenoble

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P01 F. Grimminger, G. Fischer, R. Weigel, D. Kissinger;Friedrich-Alexander University of Erlangen-Nuremberg, Erlangen, Germany

Optimum Transistor Sizing for Low-Power Subthreshold Standard Cell Designs

P02 S. Qin1, B. Y. Liu1, H. Li2, C. Mangelsdorf2;1 Analog Devices Inc., Shanghai, P.R. China; 2 Analog Devices Inc., Tokyo, Japan

A 280nA, 87ppm/°C, High PSRR Full CMOS Votage References and ist Application

P03 L. M. Vosskaemper1, D. Dammers1, M.-H. Kuo2, F. Espalieu2, C. Domingues2, L. Engels2, N. Dufayard2;1 Research & Development Dolphin Integration GmbH, Duisburg, Germany; 2 Field Application Engineering Dolphin Integration SA, Meylan, France

Application Hardware Modeling: A Selective Approach for System Level Perfor-mance Assessment

P04 N. Almeida, J. Pires, D. Sora;Critical Manufacturing, Maia, Portugal

IMPROVE Simulation Tool: Integrating Heterogeneous Simulation Modules for Semiconductor Manufactoring Processes

P05 J. Amouroux1,2,3, E. Faivre1,2, Ph. Boivin1, Ch. Muller2, D. Deleruyelle2, L. Fares1, Ph. Maillot1, M. Putero2, E. Jalaguier3;1 STMicroelectronics, Rousset, France; 2 Im2np, UMR CNRS 7334, Aix-Marseille-Universitè, Marseille, France; 3 CEA-LETI, Minatec Campus, Grenoble, France

Extraction of Physical Parameters on Silicon Nanocrystals Devoted to Non-Volatile Memories

P06 E. Erben, K. Hempel, D. H. Triyoso, H. Zhang, J. Metzger, R. Binder, C. Prindle, R. Carter, A. Wei;GLOBALFOUNDRIES Dresden, Germany

Impact of Process Parameters of TiN Cap Formation on Threshold Voltage and Gate Leakage in HKMG last Integration

P07 T. Lim1,2, J. Jimenez1, P. Benech2, J.-M. Fournier2, B. Heitz1, P. Galy1;1 STMicroelectronics, Crolles, France; 2 IMEP-LAHC, Minatec Camous, Grenoble, France

Model and Measurements of a Transmission Line with Integrated Symmetrical 1-kV HBM Broadband ESD Protection in Advanced CMOS Technologies

P08 A. Mejdoubi, G. Prenat, B. Dieny;SPINTEC Laboratory, CEA/CNRS/UJF, Grenoble, France

SPICE Modelling of Precessional Spin-Transfer Switching in MRAM Cells with a Perpendicular Polarizer

P09 N. Al Cheikh, C. Coutier, J. Brun, C. Poulain, H. Blanc, P. Rey;CEA-LETI, Grenoble, France

Characterization of a Highly Sensitive Silicon based Three-Axial Piezoresistive Force Sensor

P10 A. Creosteanu1, L. Creosteanu2;1 Technical Military Academy, Bucharest, Romania; 2 Politehnica University, Bucharest, Romania

Investigation of the Electromagnetic Interference Eff ect on the Speed Sensor of an Aircraft Starter Generator

P11 A.-L. Franc1, F. Podevin1, L. Cagnon1, P. Ferrari1, A. Serrano2, G. Rehder2;1 IMEP-LAHC, Grenoble, France; 2 University of Sao Paulo, SP, Brazil

Metallic Nanowires Filled Membrane for Slow Wave Microstrip Transmission Lines

P12 R. Lefevre1,2, A. Salette1,2, L. Montès1, P. Morfouli1, C. Déhan2;1 IMEP-LAHC, Grenoble, France; 2 EVEON SAS Montbonnot, Saint-Martin, France

Fully Integrated Thermally Actuated SOI Diaphragm: Design, Fabrication & Characterization

P13 R. Pantou1, D. L. Shah2, B. Michel1, S. Rzepka1;1 Micro Materials of Fraunhofer ENAS, Chemnitz, Germany; 2 Chemnitz Werkstoff mechanik GmbH, Chemnitz, Germany

Humidity Eff ects on the Fatigue of Fiber Reinforced Polymers in Mircro/Nano Functional Systems

P14 D. Wolansky, J. Bauer, U. Haak, W. Höppner, J. Katzer, P. Kulse, A. Mai, H. Rücker, A. Scheit, K. Schulz;IHP, Frankfurt-Oder, Germany

Detection and Reduction of via Faults

P15 B. Glueck1, L. Truong2, J. Charbonnier2, A. Berthelot2, G. Basset2, J. Bilde2, S. Barnola2;1 STMicroelectronics, Crolles, France; 2 CEA-LETI, Grenoble, France

Plasma Etching of ALX 2010 Polymer for WLP Application

P16 M. Degbia1, B. Schmaltz1, F. T. Van1, A. Tomkeviciene2, J. V. Grazulevicius2;1 University F. Rabelais Laboratoire PCM2E, Tours, France; 2 Kaunas University, Lithuania

Comparative Study of 2.7 versus 3,6 Disubstituted Carbazole as Hole Transporting Materials in Solid State DSSC

P17 J. Beaucour1, E. Mitchell2, P. Bordet3, A. Chabli4, W. Stirling4;1 Institut Facility, Grenoble, France; 2 European Synchrotron Radiation Facility, Grenoble, France; 3 Institut Neel, CNRS, Grenoble, France; 4 CEA-LETI, Grenoble, France

Large-Scale Facilities for R&D on Micro- and Nano-Technologies: Neutrons and Synchrotron X-Rays for Advanced Electronics Characterisation

P18 A. Soussou1,2,3, D. Rideau1, C. Leroux2, C. Tavernier1, G. Ghibaudo3;1 STMicroelectronics, Crolles, France; 2 CEA-LETI, Grenoble, France; 3 IMEP-LAHC, INP Grenoble, France

Modeling Study of the SiGe/Si Heterostructure in FDSOI pMOSFETs

P19 C. G. Theodorou1,2, E. G. Ioannidis1,2, S. Haendler3, N. Planes3, F. Arnaud3, F. Andri-eu4, T. Poiroux4, O. Faynot4, J. Jomaah2, C. A. Dimitriadis1, G. Ghibaudo2;1 Aristotle University of Thessloniki,, Thessloniki, Greece; 2 IMEP-LAHC, INP Grenoble, France; 3 STMicroelectronics, Crolles, France4 LETI-CEA, Grenoble, France

Front-Back Gate Coupling Eff ect on 1/f Noise in Ultra-Thin Si Film FDSOP MOSFETs

P20 W. Weinreich, K. Seidel, J. Sundqvist, M. Czernohorsky, P. Kücher;Fraunhofer Center Nanoelectronic Technologies Dresden, Dresden, Germany

Eff ect of Diff erent PDAs and a PMA on the Electrical Performance of TiN/ZAZ/TiN MIM Capacitors

Poster Session (during Coffee Breaks and Lunch)

15


Poster Session (during Coffee Breaks and Lunch)

"Innovative Paths for Future Applications in Information Heterogeneous Technologies"

S.Deleonibus , G Ghibaudo Welcome and introduction 8.30 - 8.40

Morning Session: Chair S.Deleonibus

H. Iwai1, B. de Salvo2;1Tokyo Institute of Technology, Yokohama, Japan;2 (CEA-LETI)

Scaling and Beyond for Logic and Memories. Which perspectives?

8.40 - 10.10

Coffee/Drinks Break at Poster and Exhibition 10.10 - 10.25

L.Vivien; Institut d’Electronique Fondamentale, Université Paris-Sud, Orsay , France

Photonics and Interconnect 10.25 - 11.55

Lunch Break 11.55 - 13.30

Afternoon Session: Chair G.Ghibaudo

D. Martin; UJF, Grenoble, France

Nanobiotechnology for Energy 13.30 - 15.00

Coffee/Drinks Break at Poster and Exhibition 15.00 - 15.15

B. Dieny; Spintec, Grenoble, France,

Spintronics 15.15 - 16.45

Closing remarks 16.45 - 16.50

One day Short Course Wednesday, September 26, 2012:

Program book published by in cooperation with

september 24 to 26, 2012 - minatec campus, grenoble ...iscdg2012.insight-outside.fr/ieee...

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