“People who are really serious about software should make their own hardware.”

Alan Kay

SiFive- OnCHIP - 2017

@SiFiveInc @onchipUIS

Boosting RISC-V ISA with Open Source Peripherals:

An SoC for Low Power SensorsIntegrated Systems Research Group ONCHIP

Universidad Industrial de SantanderBucaramanga, Colombia

SiFive Inc.San Mateo, California

2

Challenges: Ready-to-plug IP and $$$ Licenses

3

Peripherals associated with Always-On (AON) domain

4

Always On Domain

5

OtherregulatorsLDO

RAM(ret)

Rest of

SoC

Battery

1.9V to 3.63V

A. Thick-oxide Cell Lib.

LFXTALRCO32k

AON

0.6V1.8V

OtherregulatorsLDO

Rest of

SoC

RAM(ret)

Battery

1.9V to 3.63V

LFXTALRCO32k

AON

0.6V1.8V

B. Near Threshold Cell Lib.

AON Voltage Domains

AON - Power Management Unit (PMU)

7

PMU

SiFive- OnCHIP - 2017

AnalogPeripherals

8

JTAG

SiFive E31 RV32IMAC

ROM

JTAG

GPIO PWMQSPI I2C XTAL(HF)

TileLink

JTAGDebug

TRNG

$i

UART ADC/DACAON

$d

ADC DAC LDO PORRCO VREF

AON

LF-XTAL BOD

SiFive- OnCHIP - 20179

1.8V and 3.3V Low-Noise Bandgap

Parameter min typ max Conditions

VREF [V] 1.237 1.267 1.288 T= -40C to 125C, VDD = 1.7V to 1.9V, RL>5M

TC [ppm/ºC] 3.756 13 46.96 T= -40C to 125C, VDD = 1.7V to 1.9V, RL>5M

IVDD [uA] 37.64 57.7 80.71 T= -40C to 125C, VDD = 1.7V to 1.9V, RL>5M

VNOISE [uVrms] 124.3 129.3 138.1 T= -40C to 125C, VDD = 1.7V to 1.9V, RL>5M

PSRR @ 1Hz [dB] 46.81 57.33 63.95 T= -40C to 125C, VDD = 1.7V

to 1.9V, RL>5M

130u

m

200um

NMOS CAP

BJTs

OPAMP

PMOS Mirror

Start-UP

RES BANK

Trimm. Switches

PMO

S C

AP

SiFive- OnCHIP - 201710

LDO

Param Min Typ Max Conditions

Vout [V] 1.76 1.8 1.84 T= [-40C,125C], VDD= [2.0V, 3.63V], Ib =+/-10%, Iload = 10uA to 50mA, 100 MC

Iout [mA] 0,01 --- 50

VDD in [V] 2.0 -- 3.63 T= [-40C,125C], Ib =+/-10%, load = 10uA to 50mA

Area [mm2] 0.007 0.007 0.007 Cext=10nF-100nF

LDR [mV/mA]

0.35 0.46 0.46 VDD = [2.0V,3.3V], T= [-40C,125C] Iload = DC sweep from 0 to 50mA

LNR[mV/V]

4 4.3 4.9 VDD = from 2.0V to 3.3V, T= [-40C,125C] Iload = 50mA

Ts [ns] 10.4 10.6 11.5 Iload ramp from 10uA to 25mA, with Tr = 1ns

SiFive- OnCHIP - 201711

Biasing Control

Parameter Mean[uA]

Max[uA] sigma[nA]

Current 1u 0.995 1.021 13.67

Current 10u 9.951 10.12 81.52

Current 20u 20.37 19.44 339.6

OPAMP

1uASources

10uASources

Comp.CAP

DCAPS 20uACascode Transistors

200um

60um

*Conditions: T= [-40C-125C], VDD= [2.7V-3.6V]And Corners.

SiFive- OnCHIP - 201712

XTAL-LF Parameter min max typ Conditions

fout [kHz]

32.73 32.76 32.75 T= -40C to 125C, VDD= 2.97V to 3.3V, CL = 3.7pF

32.78 32.81 32.8 T= -40C to 125C, VDD= 2.97V to 3.3V, CL = 6pF

32.79 32.82 32.8 T= -40C to 125C, VDD= 2.97V to 3.3V, CL = 12.5pF

32.74 32.77 32.76 T= -40C to 125C, VDD= 2V,CL = 3.7pF

VDDA [V] 2 3.6 3.3

CL [pF] 3.7 12 3.7

IVDD [uA] 0.925 2.44 1.54 T= -40C to 125C, VDD= 2V to 3.3V, CL=3.7pF to 12.5pF

Drive Level [nW] 0.009 26.7 - T= -40C to 125C, VDD= 2V to

3.3V, CL=3.7pF to 12.5pF

tstart [ms] > 300

60um

30um

SiFive- OnCHIP - 201713

33kHz-to-1MHz RCO (5uA@3.3V, 1uA@1.8V- VDD)

SiFive- OnCHIP - 201714

33kHz-to-1MHz RCO (5uA@3.3V, 1uA@1.8V- VDD)

Parameter min max typ Conditions

fout [kHz]

32.52 32.94 32.76T= -40C to 125C,

VDD= 2.97V to 3.6V

1021 1033 1024

VDDA [V] 1.8 3.6 3.3

IVDD [uA]@33kHz 3.9 5 4.3 T= -40C to 125C,

VDD= 2.97V to 3.6V

IVDD [uA]@1MHz 8.6 11 9 T= -40C to 125C,

VDD= 2.97V to 3.6V

TC [ppm/°C]@33kHz/1MHz 44/82 97/191 77/105 T= -40C to 125C,

VDD= 2.97V to 3.6V

VC [%/V]@33kHz/1MHz 0.41/0.68 0.95/0.98 0.9/0.68 T= -40C to 125C,

VDD= 2.97V to 3.6V

SiFive- OnCHIP - 201715

Parameter min typ max Conditions

Nr. of BOD Levels - 5 - T= -40C to 125C,

VDD = 3.3V

tfall [ms] 1.0 - 50.0 T= -40C to 125C, VDD = 3.3V

IVDD [uA] 1.02 1.14 5.24 T= -40C to 125C, VDD = 3.3V

130um

60um Vref

Vdi

v

Caps

Mux M

ux

Cou

nter

Dec

oder

Comparator

Brownout Detector

SiFive- OnCHIP - 201716

Parameter min typ max Conditions

VPOR1 [V] 1.0 1.77 2.4 T= -40C to 125C, VDD = 3.3V

VPOR2 [V] 1.75 2.22 2.6 T= -40C to 125C, VDD = 3.3V

trise [ms] 0.001 - 50 T= -40C to 125C, VDD = 3.3V

IVDD [uA] 4.7 7.0 11.3 T= -40C to 125C, VDD = 3.3V

110um

70um

VO

LT

AG

ER

EFE

RE

NC

E

SchmittTrigger

VOLTAGE

DETECTOR

CO

UN

TE

R

DC

OD

ER

Power-On Reset

SiFive- OnCHIP - 201717

CDAC

VREF BUFFER

Multi-resolution DAC

CAPs

OUTPUT

BUFFER

FSM

+ C

AL

. LO

GIC

500um

450u

m

Parameter Min Typ MaxRes [bits] - [4-12] -

Itotal [uA]@ Fs = 10MHz

Core@1.8V

Analog/Digital1.7 / 46

Analog/Digital2.7 / 55

Analog/Digital3.6 / 66.7

Ref Buffer@1.8V 324 331 335

Out Buff.@3.3V 2050 2230 2540

Itotal [uA]@ Fs = 100kHz

Core@1.8V

Analog/Digital0.04 / 1.6

Analog/Digital0.3 / 1.9

Analog/Digital0.4 / 2.4

Ref Buffer@1.8V 324 331 335

Out Buff.@3.3V 1042 1113 1188

DNL [LSB] - - 0.7

INL [LSB] - - 0.8Measurement Conditions:Temp from -40C to 120CVDD2A from 1.7 to 1.9

VDD3A from 2.97 to 3.63

SiFive- OnCHIP - 201718

Multi-resolution ADC

CDACCAPs

INPUT

BUFFER FSM

+ C

AL

. LO

GIC

VREF BUFFER

BootstrapCOM

P

500um

450u

m Parameter Min Typ MaxRes [bits] - [4-10] -Input BW - - 10MHz

Itotal [uA]@ Fs = 10MHz

& Clk = 120MHz

Core@1.8V

Analog/Digital146 / 72.1

Analog/Digital158 / 85.3

Analog/Digital 170 / 101.1

Ref Buffer@1.8V 324 331 335

Out Buff.@3.3V 2050 2230 2540

Itotal [uA]@ Fs = 10kHz

&Clk = 120kHz

Core@1.8V

Analog/Digital15 / 3.0

Analog/Digital17.3 / 3.75

Analog/Digital19.7 / 4.3

Ref Buffer@1.8V 324 331 335

Out Buff.@3.3V 1042 1113 1188

INL [LSB] - - 0.8

DR [V] 2.39 2.4 2.41

Measurement Conditions:Temp from -40C to 120CVDD2A from 1.7 to 1.9

VDD3A from 2.97 to 3.63

SiFive- OnCHIP - 201719

Fully Synthesized True Random Number Generator1

Rule Output data Post-ProcessedP-VALUE RATE P-VALUE RATE

Frequency 0.000000 94 0.000818 100BlockFreq 0.000001 95 0.983453 99

CumulativeSums 0.000000 93 0.867692 100CumulativeSums 0.000000 93 0.350485 100

Runs 0.202268 98 0.145326 99LongRun 0.162606 99 0.798139 99

Rank 0.145326 99 0.129620 97FFT 0.275709 99 0.275709 100

NonOverlappingTem 0.514124 146 0.699313 148OverlappingTemplate 0.455937 100 0.137282 98

Serial 0.000000 87 0.383827 98Serial 0.000145 98 0.595549 99

LinearComplexity 0.213309 96 0.020548 97Approx. Entropy 0.000000 91 0.000000 90

Yang, ISSCC 2014.

SiFive- OnCHIP - 2017

SoC ApplicationUsing Chisel

TSMC 180nm Logic - No additional masksQFN-48RV32IMAC3.3V IO / 1.8V CORE 20

21

Chisel (scala) CPF Verilog HDL

(RTL) CPF SynthesisVerilog HDL

(netlist)Verilog HDL

(netlist)Place and

Route

Logical equivalence checking, Mixed-Signal Sims...

CPF CPFCompile

Voltage, Temp.Monitors

Power Specific Data

User applications

Power Modes(Power States) Power

Management Strategy Transition events

(HW, Handshakes)

Analog Instances (scala)

Analog Instances (Power, Timing, LEF)

Analog Instances (Power, Timing)

Flow Methodology

SiFive- OnCHIP - 201722

Deliverables

Open-source throughFreechips Project

● Verilog-A model● FSM Verilog RTL ● User documentation● Scala● LEF (Abstract)

Open-source with Foundry NDA through Designshare Program

● Verilog-A model● FSM Verilog RTL ● User documentation● Scala● LEF (Abstract)● LVS netlist● Layout GDS● Testbench● Liberty Timing and Power files

Q1-Q3 2017Analog

Peripherals

Q1-Q3 2018SUP PHY

Q3 2018Tape Out V.3

SUP PHY+NVRAM

Q4 2017Qual. Tape Out

Q3 2016MCU v.1

Q1 2019Full range of IPAt Freechips Project

Timeline

Q2 2018MCU v.2 test

SiFive- OnCHIP - 201724

Summary

● Multi-resolution 4-10b SAR ADC● Multi-resolution 4-12b DAC ● 50mA 3.3V Vin LDO● 1.8V and 3.3V Bandgap Reference● 1.8V and 3.3V 33kHz-to-1MHz RC oscillator● Multi-Throughput Fully Synthesized TRNG ● Multi-Level Power-On Reset● Fivel Range-Level BrownOut Detector● XTAL 33kHz XTAL Driver

Thanks!

@SiFiveInc@onchipUIS

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