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Career Skills Profile

Jonathan Moult

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CAREER OBJECTIVE

To pursue a challenging and rewarding career as an Engineering Manager with a highly respected firm that utilizes my strong planning, managerial, technical and problem solving skills.  I am a very dependable, honest dedicated and professional manager who works well with people at all levels of the organization.

PROFESSIONAL PROFILE

• Solid track record of new product release to plan. • 9 Years of Management experience in research, design and manufacture.• Good academic background. • 20 years of experience in the Electronic Component Development and Release. • Proven in managing multiple high profile technically intensive Projects. • Strong organizational development in new product release.• Strongly self motivated in leadership, team and individual project assignments.

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Management SkillsManage and direct a large variety of groups, personnel and skill sets:

• Design Engineering:• Composed of, Design manager, designers, layout engineers. This group takes the initial marketing/customer input to define the product design.

• Failure Analysis:• FA Engineer ensures any failed devices both in house and externally at the customer were analysed to find failure modes.

• R&D Product Engineering:• To take the initial new product definition, to release to the customer. Product has to be correct to the spec, reliable and manufacturable.

• R&D Process engineering:• Process engineers define and build new processes to enable the new products.

• Chemical Department:• To monitor/test chemical cleanliness/purity, and to provide advice to process and product engineers. Also completed chemical waste reclaim.

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Electronic Component Design Example

From Layout/Cross Section to Completed Device

Trial Layout

Low Angle SEM of Part Processed Device

SEM Cross Section of Completed Device

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Electronic Component Design Manufacture and Test

Selected, designed, specified, processed and released many new products for various industries:

• Worked on both Gallium Arsenide (GaAs), and Silicon platforms.

• Completed component Design and Layout courses including PCB.

• Chip on wafer, completed device, characterisation and test.

• Micromanipulator Probe Station CV, IV and oscilloscope testing for device analysis

• Conversant with production probe test techniques on wafer and in package.

• Specified and tested in process control monitors for new products.

• Conducted process and device failure analysis ~200/yr with Diodes Fabtech.

• Coordinated external design, processes, and packages with outside customers.

• All new products are reliability tested to current QA standards before release.

• Defined and written New Product Release Procedures.

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PCB and Leadframe Layout Design Example

Leadframe Layout of an NSA Series SMD

PCB and Leadframe Layout Design Example

Leadframe Layout of an NSA Series SMD

PCB and Leadframe Layout Design Example

PCB Layout example for a Main Digital Test Board

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Packaging Experience

Developed New products on many new packages, career highlights:

• Have specified/used: DFN, QFN, MSOP. P-DI, SMA/B/C, SOT, SOD T0-220 etc..

• Chip Rear to leadframe bond: Epoxy and solder bonding.

• Chip Top to top metal bond: Ball, wedge, and clip bond techniques.

• First to market QFN/DFN leadless package series: Low profile (0.4mm), ball bond on leadframe, 2 lead to 24 lead package.

• Ball Bumping, bonding:

Specified and designed on a fully automated, flip chip packaging line, with mapless in house visual inspection and probe.

Backface coating of parts to improve laser marking and vision capability.

• Moved many products to Green mold compound/leadfree package options.

• Formed and specified roadmaps for new products on new electronic packaging.

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Solder Bump Package Example

Package Design Examples

Small 1.0mm x 0.6mm DFN Package Design Examples

Small 1.0mm x 0.6mm DFN

Solder Bump Package Example

Package Design Examples

Small 1.0mm x 0.6mm DFN Package Design Examples

Small 1.0mm x 0.6mm DFN

Solder Bump Package Example

Package Design Examples

Small 1.0mm x 0.6mm DFN

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Reliability Testing

Reliability Testing Experience. Have specified, tested and released products with the following reliability test procedures:

• Specifications for Reliability for Quality Release to JEDEC standards. Worked with QA to define product release criterion and plan for single product and whole product families.

• High Temp Reverse Bias (HTRB) – 168, 500 and 1000hrs drift analysis.

• Highly Accelerated Stress Test (HAST) – 0, 100hrs drift analysis.

• AutoClave (AC) – Package integrity testing.

• Thermal Cycle (TC) – Package integrity testing.

• High Temp Storage (HTS) – Storage integrity testing.

• High Temp Operating Life (HTOL) – Stress under normal bias at increased temp.

• Specification of process and product changes for reliability after failure.

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Failure Analysis (FA)

Ran/specified the following FA techniques within the FA lab for failed devices and deprocessed devices after failure:

• Probe electrical: To specify how device has failed electrically.

• Photo Microscope: For general visual analysis.

• Scanning Electron Microscopy (SEM): High Magnification Surface analysis

• Energy Dispersive X-Ray (EDX): Elemental compositional analysis.

• Auger Emission Spectroscopy (AES): Surface element analysis.

• X Section and Stain: Device/process specific analysis.

• Photoemission: Junction/current analysis.

• Ultrasound and X-Ray analysis: Package analysis, delamination and constructional.

• Spreading Resistance Profilometry (SRP): Material Doping analysis.

• Analysis requested outside: Secondary Ion Mass Spectrometry (SIMS), Transmission Electron Microscope (TEM), and Atomic Force Microscope (AFM)

• Have formed relationships with Evans (TX), Solecon (NV), Riga Labs (CA).

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Time (mins.)

N(E)

Min: 45756Max: 569084

00 10 20 30 40 50 60 70 80

Si2

O1

Si2

O1

Poly Oxide 33 min x ~50A/min = 165 nm

Poly (51min - 33 min) x ~50A/min = 90 nm

SEM Cross Section of failed device

Failure Analysis Example

Auger Analysis of Trial Device

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In Conclusion

I have over 20 years of experience with engineering research, specification, design, manufacture, development and testing of new Electronic Prototype Components at Diodes, Semtech, GEC Hirst Research Centre, GEC-Marconi Research Caswell, Newport Components and Pulse.

I have numerous examples of all of my work which is available upon request.

My work requires good technical management implementation skills, good investigation skills, including budgeting and planning, in order to ensure a timely completion of all projects under my supervision within set costs.

Thank you.