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BVM03.High Performance and Power Efficient 32-bit Carry Select Adder using Hybrid PTL/CMOS Logic Style
BVM03.High Performance and Power Efficient 32-bit Carry Select Adder using Hybrid PTL/CMOS Logic Style
49 views
BVM01.VLSI implementation of Fast Addition using Quaternary Signed Digit Number System
BVM01.VLSI implementation of Fast Addition using Quaternary Signed Digit Number System
36 views
Application and Evaluation of High Power Zigbee Based Wireless Sensor Network in Water Irrigation Control Monitoring System
Application and Evaluation of High Power Zigbee Based Wireless Sensor Network in Water Irrigation Control Monitoring System
10 views
Vhdl Simulation of Peak Detector, 64-Bit BCD Counter and Reset Automatic Block for PD Detection System Using FPGA
Vhdl Simulation of Peak Detector, 64-Bit BCD Counter and Reset Automatic Block for PD Detection System Using FPGA
14 views
Vhdl Simulation of Peak Detector, 64-Bit BCD Counter and Reset Automatic Block for PD Detection System Using FPGA
Vhdl Simulation of Peak Detector, 64-Bit BCD Counter and Reset Automatic Block for PD Detection System Using FPGA
7 views
CORDIC and SVD Implementation in Digital Hardware
CORDIC and SVD Implementation in Digital Hardware
14 views
FPGA Based Implementation of Communication Modulation
FPGA Based Implementation of Communication Modulation
11 views
Development of FPGA based PCI bus arbiter multi processor environment
Development of FPGA based PCI bus arbiter multi processor environment
7 views
8051 Micro controller Synthesizable model and implementation on FPGA
8051 Micro controller Synthesizable model and implementation on FPGA
8 views
Implementation of IEEE 802.11 a WLAN Baseband Processor
Implementation of IEEE 802.11 a WLAN Baseband Processor
17 views
An implementation of a 2D FIR filter using the signed-digit number system-
An implementation of a 2D FIR filter using the signed-digit number system-
8 views
Hardware Implementation of High Throughput RC4 Algorithm
Hardware Implementation of High Throughput RC4 Algorithm
4 views
Water marking mobile phone color images with reed solomon error correcting code-
Water marking mobile phone color images with reed solomon error correcting code-
12 views
Viterbi-based Efficient Test Data Compression- (IEEE TRANSCATION)
Viterbi-based Efficient Test Data Compression- (IEEE TRANSCATION)
17 views
Design and implementation of low power digital FIR filter based on low power multipliers and adders on Xilinx FPGA
Design and implementation of low power digital FIR filter based on low power multipliers and adders on Xilinx FPGA
12 views
Implementation of a Self-Motivated Arbitration Scheme for the Multilayer AHB Bus matrix (IEEE TRANSCATION)
Implementation of a Self-Motivated Arbitration Scheme for the Multilayer AHB Bus matrix (IEEE TRANSCATION)
8 views
A High-Speed Low-Complexity Modified Radix-2^5 FFT Processor for Gigabit WPAN Applications
A High-Speed Low-Complexity Modified Radix-2^5 FFT Processor for Gigabit WPAN Applications
12 views
Construction of optimim Composite Field Architecture for Compact High-Throughput AES S-Boxes (IEEE TRANSCATION)
Construction of optimim Composite Field Architecture for Compact High-Throughput AES S-Boxes (IEEE TRANSCATION)
4 views
Design and characterization of parallel prefix adder using FPGA-
Design and characterization of parallel prefix adder using FPGA-
11 views
Toeplitz Matrix Approach for Binary Field Multiplication Using Quadrinomials (IEEE TRANSCATION)
Toeplitz Matrix Approach for Binary Field Multiplication Using Quadrinomials (IEEE TRANSCATION)
5 views