uvm benefits

8/19/2019 Uvm Benefits

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Universal VerifcationMethodology (UVM)BeneftsMustaa KhairallahBoost Valley

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Outline

Verifcation Needs

UVM Benefts

Ea!"le# $%

& Conclusion

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Verifcation Needs

B o o s t

V a l l e y

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Code

Reuse

TestCases &

Scenarios

Modifcation

Functional

Coverage

Calculation

Generating &ManagingReports

Debugging

Communication


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Verifcation Needs evelo"!ent

B o o s t

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g

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Code

Reuse

TestCases &

Scenarios

Modifcation

Functional

Coverage

Calculation


Debugging

Communication


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Verifcation Needs Co!"ilation

B o o s t

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g

+

Code

Reuse

TestCases &

Scenarios

Modifcation

Functional

Coverage

Calculation


Debugging

Communication


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Verifcation Needs ,unti!e

B o o s t

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g

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Code

Reuse

TestCases &

Scenarios

Modifcation

Functional

Coverage

Calculation


Debugging

Communication


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Verifcation Needs e.ugging

B o o s t

V a l l e y

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g

Code

Reuse

TestCases &

Scenarios

Modifcation

Functional

Coverage

Calculation


Debugging

Communication

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Verifcation Methodologies

o the sa!e things the sa!e 0ay#

Ease o co!!unication

2est32est.ench se"aration#

Co!"ile once4 run !any ti!es

Utilities#

5unctional coverage 6 re"orting!echanis!s 7 etc

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UVM Benefts

B o o s t

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UVM :do"tion

B o o s t

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2est32est.ench se"aration

• 2est assive:gent

:nalysis:gent

,egisterModel

Environ!ent

Confgurations

U2

• UVC User# $ntegratesUVCs intoenviron!ent to testdi?erent designs

Env

(Test-bench

• evelo"er# UVCesign

• Co!"lication "hase

UVCs

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2est32est.ench se"aration

2est Environ!ent

Bus:gent

:ctive:gent

>assive:gent

:nalysis:gent

,egisterModel

Environ!ent

Confgurations

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Confgura.ility

Controlled .y the test 0riter

Confgurations can .e# &tructural confgurations

,unti!e confgurations

>rovides to"ological @ei.ility# Co!"onents can .e overridden4

re!oved or confgured

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BlocA %

2M %;

UVM is co!"ati.le 0ith the 2M %; standard

Uses "ort3e"ort co!!unication

Dides co!!unication details ("in level activities)

Eases custo!iation using confgurations Foverrides

BlocA 1 BlocA % B o o s t

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Constrained,ando!iation

B o o s t

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Coverage Collector

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ChecAer (,eerenceModel)

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ChecAer (:ssertions)

B o o s t

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Builtin re"orting!echanis!s

B o o s t

V a l l e y

C o n s u l t i n g

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Builtin re"orting!echanis!s

B o o s t

V a l l e y

C o n s u l t i n g

%1


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>ractical Ea!"le#$%&

B o o s t

V a l l e y

C o n s u l t i n g

%%


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$ntroduction

$%& stands or $nter$C &ound4

U2 is a slave $%& transceiver

$t is around 2000 gates

$%& Bus >ur"ose# Co!!unicate >CM audio data .et0een integrated

circuits

Characteristics &e"arates clocA and serial data signals

o0er Gitter

Can recover clocA ro! data strea!

B o o s t

V a l l e y

C o n s u l t i n g

%'


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UVM 2estBench:rchitecture

B o o s t

V a l l e y

C o n s u l t i n g

%*


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,unti!e Co!"arison

% %; %;; %;;; %;;;; %;;;;; %;;;;;;

;

%

*

-

8

1;

1%

1*

1-

VD 2estBench

UVM 2estBench

No. of test cases

! "#Times

Reduction$$

B o o s t

V a l l e y

C o n s u l t i n g

%-

Time inminutes

%D' %M


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&u!!ary

Conventional Test-bench

%M Test-)ench

• Mainly si!ulation.ased

• i!ited assertion.ased ca"a.ilities

• &i!ulation .ased• :dvanced assertion

.ased in &yste!Verilog F UVM

Mostly directed testingConstrained rando!testing F directed

testing

B o o s t

V a l l e y

C o n s u l t i n g

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&u!!ary


%M Test-)ench

Cant auto!aticallyguarantee ull unctional

coverage

&u""orts unctionalcoverage

B o o s t

V a l l e y

C o n s u l t i n g

%8


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&u!!ary


%M Test-)ench

&trongly cou"led 0ithU2

oosely cou"led 0ithU2

,e=uires longerdevelo"!ent ti!e

,eusa.ility reducesdevelo"!ent ti!e B

o o s t

V a l l e y

C o n s u l t i n g

%9


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2hanA HouIuestionsJ

B o o s t

V a l l e y

C o n s u l t i n g

';

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