1 © 2009 universität karlsruhe (th), system architecture group priority inversion

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Page 1: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

1© 2009 Universität Karlsruhe (TH), System Architecture Group

Priority InversionPriority Inversion

Page 2: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 2

Roadmap for Today

Priority Inversion Resource protocols

Synchronization Mechanisms Signaling Semaphores Monitors

Synchronization Problems Producer / Consumer and Reader / Writer

Page 3: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 3

Example

5 processes process number equals

priority Priority of P5 > priority of P1 Release and execution times

as shown No deadlines (only an

example for later comparison)

Priority-driven preemptively scheduled

0 2 4 106 8 12 14 201816

P1

P2

P3

P4

P5

Page 4: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 4

Example

0 2 4 106 8 12 14 201816

P1

P2

P3

P4

P5

Page 5: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 5

Example

0 2 4 106 8 12 14 201816

P1

P2

P3

P4

P5

Page 6: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 6

Example

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P1

P2

P3

P4

P5

Page 7: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 7

Example

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P1

P2

P3

P4

P5

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© 2009 Universität Karlsruhe (TH), System Architecture Group 8

Example

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P1

P2

P3

P4

P5

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© 2009 Universität Karlsruhe (TH), System Architecture Group 9

Example

0 2 4 106 8 12 14 201816

P1

P2

P3

P4

P5

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© 2009 Universität Karlsruhe (TH), System Architecture Group 10

Example

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P1

P2

P3

P4

P5

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© 2009 Universität Karlsruhe (TH), System Architecture Group 11

Example

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P1

P2

P3

P4

P5

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© 2009 Universität Karlsruhe (TH), System Architecture Group 12

Example

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P1

P2

P3

P4

P5

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© 2009 Universität Karlsruhe (TH), System Architecture Group 13

Example

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P1

P2

P3

P4

P5

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© 2009 Universität Karlsruhe (TH), System Architecture Group 14

Example

0 2 4 106 8 12 14 201816

P1

P2

P3

P4

P5

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© 2009 Universität Karlsruhe (TH), System Architecture Group 15

Example

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P1

P2

P3

P4

P5

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© 2009 Universität Karlsruhe (TH), System Architecture Group 16

Example

0 2 4 106 8 12 14 201816

P1

P2

P3

P4

P5

Page 17: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 17

Example

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P1

P2

P3

P4

P5

Page 18: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 18

Example

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P1

P2

P3

P4

P5

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© 2009 Universität Karlsruhe (TH), System Architecture Group 19

Example

0 2 4 106 8 12 14 201816

P1

P2

P3

P4

P5

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© 2009 Universität Karlsruhe (TH), System Architecture Group 20

Example

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P1

P2

P3

P4

P5

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© 2009 Universität Karlsruhe (TH), System Architecture Group 21

Example

0 2 4 106 8 12 14 201816

P1

P2

P3

P4

P5

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© 2009 Universität Karlsruhe (TH), System Architecture Group 22

Example

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P1

P2

P3

P4

P5

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© 2009 Universität Karlsruhe (TH), System Architecture Group 23

Example

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P1

P2

P3

P4

P5

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© 2009 Universität Karlsruhe (TH), System Architecture Group 24

Example

0 2 4 106 8 12 14 201816

P1

P2

P3

P4

P5

Page 25: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 25

Reality is more complex

Processes are not usually independent

Page 26: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 26

Real-Time Traffic Scheduling

Two process streams

A high priority & a low priority

Page 27: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 27

Problem

Intersection is a mutually exclusive resource

Page 28: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 28

Mutual Exclusion

Can be solved by resource access protocols

Page 29: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

29© 2009 Universität Karlsruhe (TH), System Architecture Group

Priorities and Resource Priorities and Resource ContentionContention

Main ReferencePane W. S. Liu “Real-time Systems”, Chapter 8

Page 30: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 30

Resources

Processes require resources in order to execute. (e.g. locks, ports, memory, …)

Resource characteristics Serially reusable, Mutually exclusive

We ignore resources that are infinitely available or exceed demand, or can be pre-allocated.

Page 31: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 31

Resource Contention Problem

Priority inversion. We need to, at least,

bound the length of priority inversion.

Preferably minimize the length of priority inversion.

P3

P2

P1

R1

3

2

1

Famous example of priority inversion:

Mars Pathfinder 1997

Page 32: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 32

Marth Pathfinder

Mars Path Finder and the famous Mars Rock YOGI

Page 33: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 33

Resource Contention Problems

Timing anomaly Deadlock

P2

P1

R2

2

1

R1

Page 34: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 34

Major Assumption

Single processor system

Resource Contention

Page 35: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 35

Our Example + 2 Resources

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Resource 1

Resource 2

Nested Critical Section*

*P2 first needs R1 and then later additionally R2

Example with Resources

P5

P4

P3

P2

P1

Page 36: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 36

Simple Priority Driven Scheduling

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SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 37

Example

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SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 38

Example

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SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 39

Example

0 2 4 106 8 12 14 201816

SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 40

Example

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SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 41

Example

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SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 42

Example

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SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 43

Example

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SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 44

Example

0 2 4 106 8 12 14 201816

SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 45

Example

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SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 46

Example

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SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 47

Example

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SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 48

Example

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SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 49

Example

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SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 50

Example

0 2 4 106 8 12 14 201816

SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 51

Example

0 2 4 106 8 12 14 201816

SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 52

Example

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SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 53

Example

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SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 54

Example

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SPD Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 55

Example

0 2 4 106 8 12 14 201816

SPD Scheduling

P5

P4

P3

P2

P1

Page 56: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 56

Result

The most important processes P5 and P4 are heavily delayed

P3 is almost not delayed due to its characteristic, it does not need any resource

Find a better solution

SPD Scheduling

Page 57: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 57

4 Resource Allocation Protocols

Non Preemptive Critical Sections (NPCS)

Priority Inheritance (PI)

Priority-Ceiling Protocol (PCP)

Stacked Priority-Ceiling Protocol (SPCP)

… and some others See text book (Liu)

Resource Allocation Protocols

Page 58: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 58

Nonpreemptive Critical Sections

As soon as a process holds a resource it is no longer preemptable*

Prevents deadlock

Bounds priority inversion Max blocking time is the

maximum execution time of the critical sections of all lower priority processes

P3

P2

P1

R1

3

2

1

*This process gets highest priority in system

3

NPCS Scheduling

max prio

cannot happen at t1

Allocate at t0

Page 59: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 59

Non-Preemptive Critical Sections

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NPCS Scheduling

P5

P4

P3

P2

P1

Page 60: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 60

Example

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NPCS Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 61

Example

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NPCS Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 62

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 63

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 64

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 65

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 66

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

Page 67: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 67

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 68

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 69

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 70

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 71

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 72

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 73

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 74

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

Page 75: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 75

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

Page 76: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 76

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

Page 77: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 77

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

Page 78: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 78

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

Page 79: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 79

Example

0 2 4 106 8 12 14 201816

NPCS Scheduling

P5

P4

P3

P2

P1

Page 80: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 80

Comparison with SPD-Scheduling

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NPCS Scheduling

P5

P4

P3

P2

P1

Page 81: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 81

Analysis: Nonpreemptive Critical Sections Pros

Simple No prior knowledge of resource

requirements needed Prevents deadlock

Cons Low priority process blocks high priority

process even when there are no resource conflicts

Protocol only suitable for trusted software Usually implemented by interrupt disabling

In CS there is no system calls otherwise CPU wasting in case of a “blocking” system call

NPCS Scheduling

Page 82: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 82

Worst-Case Blocking Time

Longest lower-priority critical section:

bt = blocking timecst = critical section time

bti(rc) = max {cstk}i+1 ≤k ≤ n

NPCS Scheduling

Not that re

alistic

Page 83: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 83

Priority Inheritance (PI)

When a high-priority process (P3) blocks, the low-priority process (P1) inherits the current priority of the blocking process

PI bounds priority inversion

1

P3

P2

P1

R1

3

2

3

PI Scheduling

Page 84: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 84

Example with Priority Inheritance

0 2 4 106 8 12 14 201816

PI Scheduling

P5

P4

P3

P2

P1

Page 85: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 85

Example with Priority Inheritance

0 2 4 106 8 12 14 201816

PI Scheduling

P5

P4

P3

P2

P1

Page 86: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 86

Example with Priority Inheritance

0 2 4 106 8 12 14 201816

PI Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 87

Example with Priority Inheritance

0 2 4 106 8 12 14 201816

PI Scheduling

P5

P4

P3

P2

P1

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© 2009 Universität Karlsruhe (TH), System Architecture Group 88

Example with Priority Inheritance

0 2 4 106 8 12 14 201816

PI Scheduling

P5

P4

P3

P2

P1

Page 89: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 89

Example with Priority Inheritance

0 2 4 106 8 12 14 201816

PI Scheduling

P5

P4

P3

P2

P1

Page 90: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 90

Example with Priority Inheritance

0 2 4 106 8 12 14 201816

PI Scheduling

P5

P4

P3

P2

P1

Page 91: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 91

Example with Priority Inheritance

0 2 4 106 8 12 14 201816

4

PI Scheduling

P5

P4

P3

P2

P1

Page 92: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 92

Example with Priority Inheritance

0 2 4 106 8 12 14 201816

4

PI Scheduling

P5

P4

P3

P2

P1

Page 93: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 93

Example with Priority Inheritance

0 2 4 106 8 12 14 201816

5

4

PI Scheduling

P5

P4

P3

P2

P1

Page 94: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 94

Example with Priority Inheritance

0 2 4 106 8 12 14 201816

5

4 5

PI Scheduling

P5

P4

P3

P2

P1

Page 95: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 95

Example with Priority Inheritance

0 2 4 106 8 12 14 201816

5

4 5

PI Scheduling

P5

P4

P3

P2

P1

Page 96: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 96

Example with Priority Inheritance

0 2 4 106 8 12 14 201816

5

4 5 1

PI Scheduling

P5

P4

P3

P2

P1

Page 97: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 97

Example with Priority Inheritance

0 2 4 106 8 12 14 201816

5

4 5 1

PI Scheduling

P5

P4

P3

P2

P1

Page 98: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 98

Example with Priority Inheritance

0 2 4 106 8 12 14 201816

5

4 5 1

PI Scheduling

P5

P4

P3

P2

P1

Page 99: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 99

Example with Priority Inheritance

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PI Scheduling

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Example with Priority Inheritance

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Example with Priority Inheritance

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Example with Priority Inheritance

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Example with Priority Inheritance

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Example with Priority Inheritance

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PI Scheduling

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Example with Priority Inheritance

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PI Scheduling

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Example with Priority Inheritance

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Comparison with SPD Rule

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Analysis: Priority Inheritance

Pros Prevents uncontrolled priority inversion. Needs no knowledge of resource requirements.

Cons Does not prevent deadlock. Does not minimise blocking times.

With chained blocking, worst-case blocking time is min(n,m) critical sections

n = number of lower priority processes that can block P m = number of resources that can be used to block P

Some overhead in a release or acquire operation

PI Scheduling

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© 2009 Universität Karlsruhe (TH), System Architecture Group 109

Chained Blocking

4 lower priority processes

4 potentially conflicting resources

Worst-case blocking time = 16 units1

Time

Prio

rity

PI Scheduling

1Assume lower priority process allocates its first resource just before higher priority process runs

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Priority Ceiling Protocol

Avoids deadlock by defining an order of resource acquisition

Prevents transitive (chained) blocking Worst-case blocking time = single critical

section

PCP Scheduling

Description how to implement PCP, see:http://www.awprofessional.com/articles/article.asp?p=30188&seqNum=5&rl=1

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Priority Ceilings

Resources required by all processes are known a priori Similar approach as with deadlock avoidance

Priority ceiling of resource Ri is equal to the highest priority of all processes that use Ri

Priority ceiling of system is highest priority ceiling of all resources currently in use

PCP Scheduling

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Priority Ceilings of Our Example

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Priority Ceilings of Ri

PCP Scheduling

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Priority Ceiling Protocol Rules

Priority inheritance applies as before.

When a process (P) requests a resource (R) either: If R is allocated P blocks (+ priority

inheritance) If R is free,

If P’s current priority > system’s priority ceiling R is allocated to process P

If P’s current priority ≤ system’s priority ceiling P blocks – except if:

P already holds a resource whose priority ceiling is equal to the systems priority ceiling

PCP Scheduling

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Example

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curr

max

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Example

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Example

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Example

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Prio(P2) < CurrSPC no allocation

PCP Scheduling

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Example

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PCP Scheduling

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Comparison to Previous Example

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Page 136: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 136

Analysis: Priority Ceiling Protocol

Pros Avoids deadlocks If a process doesn’t self suspend, a process is

blocked at most once during execution Processes cannot be transitively blocked

minimizes blocking time to the longest lower-priority conflicting critical section (+ context switches)

Processes only receive their first resource when all required resources are not held by lower priority processes

Cons A priori knowledge of resource needs is

required

PCP Scheduling

Page 137: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 138

Rules

Scheduling: After a process is released, it is blocked from

starting until its assigned priority is higher than the current system priority ceiling.

Unblocked processes are preemptively priority scheduled according to their assigned priority.

Resource allocation: Whenever a process requests a resource it

receives the resource.

SPCP Scheduling

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Example

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Example

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SPCP Scheduling

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Example

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SPCP Scheduling

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Example

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Comparison with Priority Ceiling Protocol

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Analysis: Stack-Based Priority Ceiling

Pros Simple to implement. Slightly better worst-case when

compared to normal PCP – two less context switches.

No priority inheritance needed.

Cons Threads cannot self suspend.

SPCP Scheduling

Page 161: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 162

Summary

4 protocols controlling resource access in priority driven preemptive systems

NPCS

PI

PCP

SPCP

Summary

Page 162: 1 © 2009 Universität Karlsruhe (TH), System Architecture Group Priority Inversion

© 2009 Universität Karlsruhe (TH), System Architecture Group 163

Summary

NPCS and PI do not require a priori knowledge of resource requirements

PI neither prevents deadlocks nor avoids deadlocks

All protocols -except PI- ensure that processes are blocked at most once*

Summary