223 assignment final working of pmos and nmos in cadence tool

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Common Gate Amplifier Akshit Daftari Student Id: 010130133 San Jose State University

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Analog IC design

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Page 1: 223 Assignment final  Working of PMOS and NMOS in cadence tool

Common Gate AmplifierAkshit Daftari

Student Id: 010130133San Jose State University

Page 2: 223 Assignment final  Working of PMOS and NMOS in cadence tool

Abstract — The common gate amplifier is the only type of amplifier that gives a non-inverting gain. This type of configuration can be used as a voltage amplifier or a current buffer.

I. INTRODUCTION

There are three basic configurations of an amplifier. The first one is the common source amplifier wherein the input is given at the gate and the output is taken out from the drain terminal. The common source configuration can be used as an inverting amplifier. The second one is the common drain amplifier in which the input is given at the gate and output is taken from the source terminal. The common drain configuration can be used as a voltage buffer. The final one is the common gate amplifier.

II. COMMON GATE AMPLIFIER

In a common gate amplifier the input is given to the source and output is taken from the drain terminal. For optimum use of the amplifier all of its transistors must be operating in the active region. A current mirror circuit is used as the biasing network for the amplifier. The current mirror provides the biasing current and also makes it easy to change the current at the output node by just changing the size of the transistor.

Fig 2.1 NMOS Schematic

From the IV characteristics of Idc v/s Vds for different values for Vgs shown below, it can be seen that the current increases gradually and then it stays constant. This happens when the current reaches the saturation point and pinch off occurs at this point.

Fig 2.2 Id v/s Vds

Rds is the dynamic on-resistance of the transistor and it determines the conduction power dissipation and increases with increase in temperature. It is the invert of Ids over Vds.

Rds = (ΔIds/ΔVds)-1

Fig 2.3 Rds

The derivatives of Rds are taken to eliminate all the second and third order effects.

Page 3: 223 Assignment final  Working of PMOS and NMOS in cadence tool

Fig 2.4 Second Derivative of Rds

From the graph of Id v/s Vgs shown below the threshold voltage can been seen which is about 0.4V.

Fig 2.5 Id v/s Vgs

Transconductance is an important parameter, which is the ratio of output current variation to the input voltage variation. The higher the transconductance the greater will be the gain.

Gm = (ΔId/ΔVgs)

Fig 2.6 Transconductance (gm)

Fig 2.7 Second Order Derivative of Transconductance

Fig 2.7 Third Order Derivative of Transconductance

III. P-TYPE MOSIn an PMOS n-type bulk material is used and the

p-type material is used for the drain and source. Positive voltage is applied between the source and drain and negative voltage is applied between the gate and the source, while the bulk is connected to source.

Page 4: 223 Assignment final  Working of PMOS and NMOS in cadence tool

Fig 2.8 PMOS Schematic From the IV characteristics shown below for Id

v/s Vsd shown below it can be understood that the current increases gradually and then reaches saturation where it remains constant.

Fig 2.9 Id v/s Vsd

The Rds can be calculated from the plot shown below.

Rds = (ΔIds/ΔVds)-1

Fig 2.10 Rds

Fig 2.11 Second Derivative of Rds

Fig 2.12 Third Derivative of Rds

From the graph of Id v/s Vgs shown below the threshold voltage can been seen which is about 0.4V.

Page 5: 223 Assignment final  Working of PMOS and NMOS in cadence tool

Fig 2.13 Id v/s Vsg

Transconductance can be calculated from the above plot by taking its derivative.

Gm = (ΔId/ΔVgs)

Fig 2.14 Transconductance (gm)

Fig 2.15 Second Order Derivative of Transconductance

Fig 2.16 Third Order Derivative of Transconductance

IV. CONCLUSION

It can be seen that the transconductance increases and then decreases after a certain point. This occurs due to the saturation of current after it increases linearly in the triode region as the transconductance depends on the derivative of current over the gate voltage.

REFERENCES

[1] Abdus Sattar, Power MOSFET Basics, IXYS Corporation[2] Tommy Chan Carusone, “Analog Circuit Design”

Page 6: 223 Assignment final  Working of PMOS and NMOS in cadence tool