IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-25, NO. 10, OCTOBER 1978 1185

[18] E. Bassous, H. H. Taub, and L. Kuhn “Ink jet printing nozzle arrays etched in silicon,’’ Appl. Phys. Lett., vol. 31, no. 2, pp.

[19] D. A. Kiewit, “Microtool fabrication by etch pit replication,” Rev. Sci. Instrum., vol. 44, no. 12, pp. 1741-1742, Dec. 1973.

[20] C. L. Huang and T. Van Duzer, “Schottky diodes and other devices on thin silicon membranes,”ZEEE Trans. Electron Devices, vol. ED-23,no.6,pp. 579-583, June 1976.

[ 211 -, “Josephson tunneling through locally thinned silicon wafers,” Appl. Phys. Lett., vol. 25, no. 12, pp. 753-756, Dec. 1974.

[ 221 T. J. Rodgers and J. D. Meindl, “Epitaxial V-groove bipolar inte- grated circuit process,”ZEEE Trans. Electron Devices, vol. ED-20, pp. 226-232, Mar. 1973.

[23] T. J. Rodgers and J. D. Meindl, “VMOS: High speed TTL com- patible MOS logic,” ZEEE J. Solid-state Circuits, vol. SC-9, pp.

[24] M. J. Declercq, “A new C-MOS technology using anistropic etch- ing of silicon,” ZEEE J, Solid-state Circuits, vol. SC-10, no. 4,

[25] P. Ou-Yang, “Double ion implanted V-MOS technology,” ZEEE J. Solid-state Circuits, vol. SC-12, no. 1, pp. 3-10, Feb. 1977.

[26] K. E. Bean and J. R. Lawson, “Application of silicon crystal orientation and anisotropic effects to the control of charge spreading in devices,” ZEEE J. Solid-state Circuits, vol. SC-9, no. 3,pp. 111-117, June 1974.

[27] K. E. Bean and W. R. Runyan “Dielectric isolation: comprehen- sive, current and future,” J. Electrochem. SOC., vol. 124, no. 1, pp. 5C-l2C, Jan. 1977.

I281 H. Guckel, S. Larsen, M. G. Lagally, G. Moore, J. B. Miller, and J. D. Wiley, “Electromechanical devices utilizing thin Si dia- phragms,” Appl. Phys. Lett., vol. 31, no. 9, pp. 618-619, Nov. 1977.

[29] S. C. Terry, “A gas chromatography system fabricated on a silicon wafer using integrated circuit technology,” Ph.D. disserta- tion, Stanford Univ. Elec. Eng. Dept., 1975.

[30] K. E. Peterson, “Micromechanical light modulator array fabri- cated on silicon,” Appl. Phys. Lett., vol. 31 , no. 8, pp. 521-523, Oct. 1977.

[31] H. C. Nathanson and J . Guldberg, “Topologically structured thin films in semiconductor device operation,” in Physics of Thin Films, vol. 8, G. Hass, M. H. Francombe, and R. W. Hoffman,

135-137, July 1977.

239-249, Oct. 1974.

pp. 191-197, Aug. 1975.

Eds. New York: Academic Press, pp. 251-333. H. C. Nathanson, “New directions in nonplanar semiconductor device technology,”inZEDM Tech. Dig., pp. 441,1976. R. N. Thomas, J. Guldberg, H. C. Nathanson, and P. R. Malm- berg, “The mirror matrix tube: A novel light valve for projection displays,” ZEEE Trans. Electron Devices, vol. ED-22, no. 9, pp. 765-775, Sept. 1975. R. M. Finne and D. L. Klein “A water-amine-complexing agent system for etching silicon,” J. Electrochem. SOC., vol. 114, pp. 965-970, Sept. 1967. E. Bassous and E. F. Baran, “Fabrication of silicon nozzle arrays for ink jet printing,” presented at the Electrochemical Society Fall Meeting, Atlanta, GA, Oct. 1977; alsoinExtendedAbstracts,

D. B. Lee, “Anisotropic etching of silicon,” J. Appl. Phys., vol. 40,no. 11, pp.4569-4574, Oct. 1969. M. J. Declercq, L. Gerzberg, and J . D. Meindl, “Optimization of of hydrazine-water solution for anisotropic etching of silicon in integrated circuit technology,” J. Electrochem. SOC., vol. 122, no. 4, pp. 545-552, Apr. 1975. R. G. Sweet, “High frequency recording with electrostatically deflected ink jets,” Rev. Sci. Znstrum., vol. 36, no. 2, pp. 131-136, Feb. 1965. R, G. Sweet, “Fluid droplet recorder,” U.S. Patent 3 596 275, Jul. 1971. F. J . Kamphoefner, “Ink jet printing,” ZEEE Trans. Electron Devices, vol. ED-19, no. 4 , pp. 584-593, Apr. 1972. R. D. Carnahan and S. L. Hou, “Ink jet technology,”ZEEE Trans. Znd. App., vol. IA-13, no. 1, pp. 95-105, Jan./Feb. 1977. J. C. Greenwood, “Ethylene diamine-catechol-water mixture shows preferential etching of p-n junction,” J. Electrochem. SOC., vol. 116,no. 9,pp. 1325-1326, Sept. 1969. A. Bohg, “Ethylene diamine-pyrocatechol-water mixture shows etching anomaly in boron-doped silicon,” J. Electrochem. SOC., vol. 118, no. 2, pp. 401-402, Feb, 1971. W. Anacker, E. Bassous, F. F. Fang, R. E. Mundie, and H. N. Yu, “Fabrication of multiprobe miniature electrical connector,” ZBM Tech. Discl. Bull., vol. 19, no. 1 , pp. 372-374, June 1976. E. Bassous and L. Kuhn, “Charge electrode array and combina-

Patent 4 047 184, Sept. 1977. tion for ink jet printing and method of manufacture,,” U.S.

V O ~ . 77-2, pp. 954-955,1977.

Anisotropic Etching of Silicon KENNETH E. BEAN

Abstract-Anisotropic etching of silicon has become an important technology in silicon semiconductor processing during the past ten years. It will continue to gain stature and acceptance as standard pro- cessing technology in the next few years. Anisotropic etching of (100) orientation silicon is being widely used today and (110) orientation technology is emerging. This paper discusses both orientation-depen- dent and concentration-dependent etching of (100) and (1 10) silicon. Very exact process control steps may be designed into a process by use of (100) anisotropic and concentration-dependent etching. Also, methods of oxide or nitride pin hole detection in (100) silicon are pre-

Manuscript received March 16, 1978; revised June 26, 1978. The author is with Texas Instruments, Inc., Central Research Lab-

oratory, Dallas, TX 75 222.

sented. Mask alignments to obtain different etch front termination in both (100) and (110) silicon are shown. Very high packing density structures, less than 1 pm, are obtained in the (110) technology, and extremely high etching ratios of greater than 650 tu 1 are obtained in (110) orientation-dependent etching. Some of the many applications for anisotropic and concentration-dependent etching are described.

W ORIENTATION-DEPENDENT, ETCHING

ET CHEMICAL ETCHING has been used in silicon semiconductor processing since its beginning in the

early 1950’s. Isotropic etches, Le., etches that etch in all crystalographic direction at the same rate, consisting of hydro-

0018-9383/78/1000-1185$00.75 @ 1978 IEEE

3 186 IEEE TRANSP!~TIONS ON ELECTRON DEVICES, VOL. ED-25, NO. IO, OCTOBER 1918

TABLE I CHEMICAL ETCHING OF SILICON

ETCHES CHARACTERISTICS COMPOSITION

~ -8% -75% -17% 1

.. -. . .

. ~. RATE AND REhZARKS

PLANAR ETCH ETCH U N I F O R M I T Y H F - HNO3 - H A C - 5 p l M I N 11111 RT ..

1-3-10 ETCHES P * OR N t 1 HF HNO3 HAC i - 3 p 1 M I N 11OOl RT S IL ICON

, "STOPS" AT P- OR N' 1 1 3 10 I

11031 ODE ETCHES [loo] -100 I KOH - N O R M A L - 1 p l M I N AT 80°C ' X [Ill] DIRECTION PROPANOL Hz0 IN (1001 S IL ICON ~ STOPS AT P" INTERFAC 1

- B p I M I N AT 80°C 1 IN (1101 S IL ICON

EIHYLENEDI- 1 ORIENTATION DE- ETHYLENEDI- 1 - 1 . l p I M I N AT 1W"C AMINE PENDENT AND , AMINE - CATECHOL - I N [IW] , STOPS

, DEPENDENT $?DRAZ,NEl FACE. VERY SLOW CONCENTRATION ' ETCHING AT Pit INTER-

I I ETCHING OF Si02

fluoric, nitric, and acetic acid (HF, HN03, and CH300H) were used for etching and chemically polishing in the early w:9rk [ l ] -141. In the more recent past, people have become inter- ested in anisotropic or orientation-dependent etches [5] .-I71 (ODE). This paper will discuss primarily wet chemical, oricn- tation-dependent, and concentration- dependent etching; h sw- ever, vapor phase and plasma orientation-dependent etching are also of current interest and many of the same masking ;!nd alignment technologies apply. We will describe etch solutioos, masking materials, mask alignments, and impurity concenm- tion etch dependence for both (100) and (1 10) silicon orier [.a- tionis. Some applications for each orientation will be described.

Etches and Masks Table I gives some of the etches used in both planar End

orientation-dependent etching. Planar etch is an etch con- sisting of hydrofluoric, nitric, and acetic acid (HF - 8 percent, HN03 - 75 percent, CH300H - 17 percent). This solut on etches silicon at about 5 pm/min at 25°C. The etch rat( is approximately equal in all crystalographic directions as 1he name planar indicates. The ratios of the constituents of plaa1,ar etch may be altered to change the etch rate drastically. ]:':x example "B" etch is a mixture consisting of 1 part HF, parts H N 0 3 , and 15 parts CH300H which etches (1 11) silicon very slowly, -0.15 pm/min, and (100) at -0.20 pm/min at 25°C (approximately & the rate of planar).

Another etch made up of these same chemicals is Dash etch [3] , [6] , [8] . This etch is somewhat orientation-dependent and is used for crystal defect delineation or definition in (1 1 i ) silicon. It etches p or n silicon in the (100) direction :kt -1300 A/min, at 25"C, and at 46 A/min in the (1 11) dircrc- tion at this same temperature. However, this etch also etckas heavily doped silicon (p+- or n+-type greater than 5 X 10") much faster (-2.5 pm) than lightly doped p- or n-type silicol. (See Table I.) Therefore, it becomes concentration-dependeru:. An even more orientation-dependent etch used for etchi:ig (100) silicon is 250-g potassium hydroxide, 200-g norm1 propanol, and 800-g deionized water [9]. This etch can :le masked by photoresist for shallow 25°C etching or by use :INf SiOz or Si3N4 for deep (>20 pm) etching at 80°C. The etch rate in the (100) direction is at least one hundred times faslcr than in the (1 1 1 ) direction if the mask is properly aligned wi t h the trace of the ( 11 1 ) plane at the (100) surface, see Figs. . 5

and 16. This alignment is also parallel and perpendicular with the (1 10) direction or the flat on the (100) slice. This etch attacks oxide at -28 A/min, however, Si3N4 is not measur- ably attacked even ater 5-hours etching at 80°C.

Another orientation-dependent etch that may be used for (100) direction etching to advantage is ethylenediamine 255 cm3, pyrocatechol 45 g, and water 120 cm3, hereafter referred to as EDA [7] , [9] -[11] , [21] . This solution etches (100) silicon at 1.1 pm/min at 100°C and SiOz at -8 A/rnin. The slow etch rate of SiOz and the non-sodium or potassium nature of this etch makes it desirable for polysilicon etching in MOS-type device processing. This etch is also concentration and/or type sensitive and stops or greatly reduces in etch rate at a pt interface or junction. This etch may also be used for (110) direction etching, hydrazine may also be added to this solution for faster etching. Another etch solution which is very orientation-dependent in the (1 10) direction etching is po- tassium hydroxide and water (KOH -35 percent by weight, and HzO) at 80°C. This solution etches silicon six hundred times faster in the (1 IO) direction than in the (1 11) direction when the mask is properly aligned with the trace of the (1 11 ) plane at the (110) surface or 35.26" off from the (110) flat. (Not parallel and perpendicular to the (1 10) flat or direction in this case [20] .) The (1 10) silicon etch rate is -0.8 pmlmin and the SiOz etch rate is -30 A/min.

Silicon belongs to the diamond cubic crystal structure. In the cubic structure the crystalographic directions are perpen- dicular to the crystal planes. There are several low-index planes that we may choose to work on in this diamond cubic structure. Fig. 1 shows examples of some of these planes and their position in the cubic structure. Numbers one, three, and seven are the three index planes most commonly used for silicon device processing. Fig. 2 shows one of each of the low-index planes in the cube, that is, the (loo), the (1 lo), and the (111). One of the important parameters in orientation- dependent etching of silicon is the atomic lattice packing density and available bonds in the crystalographic plane. In Fig. 3 we show photographs of the silicon diamond cubic structure model taken from three different crystal directions. The (1 11) direction shows a very high atomic packing density in the (1 11) plane. The (100) direction photo is taken of the same model but moved around 54.75" from the (1 11 ) direc- tion, so we are now looking at a (100) plane. It is readily evident that the atomic packing density is considerably less dense. The (110) direction photo is taken by moving around 90" from the original (1 11) direction. The atomic packing density is very low in this plane when compared to the { 1 11 } plane. From this information one would expect that the etch rate, or epitaxial deposition growth rate, would be consider- ably faster in the (1 10) direction than in the (100) direction and even more so than in the ( 11 1) direction.

When we examine the crystal projection of the silicon (100) plane, Fig. 4, we see that the { 100) surface has four-fold symmetry. That is, the high atomic packing density { 11 1 } planes are equal distance out from the (100) surface plane at equal angles and they are 90" to each other. Also we can determine that the { 1 11 } planes are intersecting the {loo} plane at a rather steep angle, which is 54.74", and that they

BEAN: ANISOTROPIC ETCHING OF SILICON 1187

Fig. 1. Crystalography of silicon substrate orientations,

PATTERN OPENED IN OXIDE

11101 FLAT

SECTION THROUGH WINDOW AFTER ETCHING

Fig. 5 . Mask alignment on (100) silicon.

Fig. 2. Low crystalographic index planes of silicon.

SEk1 CROSSECTIONAL V I E W (1001 D l ETCH

Fig. 6. Top view and cross-sectional view of (100) ODE silicon.

< I l l > C l W > <110>

Fig. 3. Model showing three low-index directions of silicon.

i o 0

(1001 ODE, SEM Fig. 7. ODE etch pit in (100) silicon.

are in (1 10) directions. (See the four { 110) planes at the periphery of the projection. These are 90' to the (100) sur- face plane.)

When we grow an oxide, or deposit a silicon nitride masking film on the {loo} silicon slices and then align a mask parallel and/or perpendicular to these ', 110) directions (as indicated in

Fig. 5), as in standard photolithographic processing, we can open up narrow lines, through the mask material, which are aligned parallel with the trace of the high atomic packed { 11 1) planes. When we place these slices in an orientation- dependent etch such as KOH, normal propanol, and HzO, the etching will proceed in the ( 100) direction (into the slice) until the etch front hits the (11 1) planes, intersecting the (100) plane at the edge of the mask opening, and .then the etching will stop as in Fig. 6. Also see data in Figs. 13 and 14. The etch depth to oxide opening width ratio is 0.707. That is if we open an oxide pattern line 10 pm wide it will etch 7.07 pm deep and then for practical purposes stop etching. Due to this effect one can use ODE on (100) silicon as a method for determining pin hole density in oxide films. When one uses ethylene diamine pyrocatechol and water (EDA) (255 cm', 54 g, 120 cm3, respectively) at 100°C the etch front will propagate into the (100) silicon to form a perfect square topped inverted pyramid, through the pin hole (see Fig. 7). If

1188 IEEE TRANSACI'IONS ON ELECTRON DEVICES, VOL. ED-25, NO. 10, OCTOBER 1918

\-,

Fig. 8. (a) (loo), ODE, 2040X 65" SEM of 10-pm squares on 20+m centers. (b) (100) ODE 1240X 65" SEM of 10-pm squares containing mask oxide.

\ - I

(a) (id

Fig. 9. Corner undercutting in (100) silicon versus ODE depth. (a11 2 3 pm deep. (b) 54 pm deep.

1.91 4 , 7 0

13.49 9 .35

20.57 16.38

24.13 26.87 30.78

5 10 1s 23 30 34 38 44 49

33.50 54

5 10 15 20 25 30 35 40

Fig. 10. Corner undercutting versus ODE depth in (100) silicon.

one uses a square window frame pattern opened in the oxide or nitride mask and the same etch conditions, a square bassd pyramid structure can be etched as in Fig. 8(a) and (b). Fig. 8(a) was etched using a thin 1000-A oxide mask and 8-1rsn etch time in EDA as above. In this case, the thin oxide mark is left intact on the pyramids. In Fig. 8(b), an additiorml 30-s etch in planar etch was used to point the pyramids a : d lift off the oxide. The pyramids are 8 pm high, and have 10 pm/square bases on 20-pm centers. In the case where m e wishes to etch V-grooves for isolation purposes or for VMYN structures, edge undercutting of the mask is negligible, how- ever, corner undercutting may become a problem in deep, >20 pm, etch depths for isolation structures [ 121 -[14 1 . Fig. 9 shows the effect of corner undercutting on the relativc1.y fast etch {331} planes, which are exposed on outside (convex) corners in masked arrays. Corner undercutting does not 0cc:I.m at inside (concave) corners. In Fig. 9 it can be seen that correr undercutting is related to etch depth. Fig. 10 plots this :e- lationship of corner undercutting to etch depths for {lOill} silicon using the KOH, propanol, H20 etch at 8OoC. Frcm this data one can design corner compensation into the mark to prevent the faceted or rounded corners. Fig. 11 shows an example wherein mask corner compensation was used to p w

180 X SEM 1.2W X 80' SEM

Fig. 12. Corner faceting in (100) ODE, 50 pm deep.

duce square corners in arrays that require 50-pm-deep etching. Note the corner compensation and oxide mask pattern pro- jecting out into space above the ODE V-groove. With corner compensation, underetching will leave a tip of silicon sticking out at each corner, see Fig. 13(a), and overetching of the de- signed compensation-to-depth ratio will, of course, undercut the corners. Fig. 12 is a 180X SEM of a { 100) ODE silicon slice etched 50 pm deep without corner compensation of the mask. Note the (331 } faceting or rounding of the outside corners. The double four-fold symmetry of the {33 1 } planes in (310) directions, see Fig. 4, is evident in the corner faceting of this pattern. Note the octagon shape at the top of the smaller mesas. These (331 } planes intersect the { 100) sili- con surface at an angle of 46.5", which may be advantageously used in some cases, and will be further discussed later. Also note the exact crystalographically sharp 90" corners at the in- side corners of the array. Fig. 12 also shows a higher magnifi- cation view of these (331) facets. Again note the exact crys- talographic structure of the ODE front.

As was previously mentioned, the ODE stops when the etch depth reaches the depth at which the two { 11 l } planes at the edge of the mask opening intersect. If the mask is properly aligned with the {I 10) direction no undercutting- occurs along the mask edges (only at convex corners). Fig. 13 shows evidence of this statement. Fig. 13(a) shows a (100) silicon slice with a corner compensated oxide mask. This mask has oxide open lines 97.5 pm wide at the silicon-oxide interface. After etching 38 min at 80°C the etch depth measured 38 pm deep and the width opening at the silicon-oxide interface mea- sured 97.5 pm. Note the tip of silicon projecting out under the compensated corner oxide. (The corner compensation was designed for 50-pm etch depth.) The slices were placed back in the ODE for another 30 min at 80"C, thus giving a total ODE time of 68 min. At this time the etch depth measured 69 pm deep and the linewidth opening at the silicon-oxide interface measured 97.5 pm, see Fig. 13(b), indicating no un- dercutting of the oxide mask. The ODE should "V" or bot-

BEAN: ANISOTROPIC ETCHING

TOP FOCUS

OF SILICON

BOTTOM F O C U S

(1WI ODE 68 "IN. 80 C . 69pihl DEEP, WIDTH AT OXIDE M A S K 97 5pihI

Fig. 13. (100) ODE, 38- and 68-min etching.

TOP FOCUS BOi7OM FOCUS

(IWI ODE. 98 MIN. BO C. 69.9pM D E E P , WIDTH AT OXIDE MASK = 97.5piM

Fig. 14. (100) ODE, 98-min etching.

1189

(a) Ib) Fig. 15. Undercutting versus mask alignment accuracy in (100) ODE.

(a) 1.5' off alignment. (b) 3.9" off alignment.

10 9

- 8

g 7

5 5

g 3

2 6

= 4

= 2

1

1 2 3 4 5 6 7 8 9 DEGREES OFF ALIGNMENT

Fig. 16. Undercutting versus alignment accuracy.

tom out at this depth and time. That is 97.5 X 0.707 = 68.9. The slices were again placed back into the ODE for an addi- tional 30 min. After this additional 30-min etch, the depth measured 69.9 pm and the linewidth opening at the silicon- oxide interface again measured 97.5 pm, indicating no under- cutting of the oxide mask even after 48-min overetching. The total etch time was 98 min. The complete lack of undercut- ting indicates the etch stopping ability of the (1 11) planes when the (100) slice is properly aligned. Fig. 14 shows the ODE slice after a total of 98-min etching. Note in Fig. 13(b) the faceting of the corners under the corner compensation due to overetching for 18 min. The compensation was de- signed for 50-pm etch depth. Also note the "V" bottom in the bottom focus photo of Fig. 13(b) indicating the comple- tion of the ODE. A replica of the trace of the { 1 11 ) planes can be seen in the corner compensation oxide in both Fig, 13(b) and Fig. 14. This replica is due to a change in mask oxide thickness, and shows that the ( 11 1) planes blocked the corner undercutting for some period of time before breaking down to allow corner undercutting, or faceting, to the faster etching (331) planes. The importance of proper alignment cannot be overemphasized in the use or orientation-dependent etching. If a mask is aligned off the desired crystalographic direction undercutting will occur until the etch front reaches the slow etch { 11 1) planes. This will occur in a series of plate-like steps, see Kendall [15]. Fig. 15 shows a top view of two (100) silicon mesas with corner compensated oxide mask, ODE 50 ,urn deep. Undercutting can be detected as a function of mask alignment. Measurements were made from slices mis- oriented from 1" t o 7" and ODE 50 pm deep using (100) ODE at 80°C. The data are plotted in Fig. 16. As in the case of

la1 ib)

Fig. 17. ODE of (100) silicon. (a)(310)alignment. (b)(llO)alignment.

Kendall, for (1 10) silicon, the (100) data also give a linear plot of undercutting versus degrees off alignment. Note also the plot projects through zero indicating no undercutting for a properly aligned mask on (100) silicon. The W/D (undercut to depth) in this case is 0.10 at 4" off orientation whereas the U/D for (1 10) silicon is 0.10 at 3.5" off orientation. This in- dicates a slightly less stringent dependence on alignment ac- curacy for { 100) silicon. If we reexamine the silicon crystal structure projected in Fig. 4 we see the double four-fold sym- metry of the (3311 planes, mentioned and identified in the discussion of Fig. 12. These planes have been identified as the prevalent, fast-etching, corner-undercutting planes when using either KOH, propenal and water, or EDA in our work. Others have identified the corner faceting planes as (221) planes when etching with EDA [7] , [16] , These relatively low (46') angles, with respect to the (1 00) planes, may be advantageously used in cases wherein one wished to run metallization up and down these planes [ 171. Fig. 17 shows examples of two (100) silicon slices ODE at the same time in the same solution and having the same mask pattern. Slice in Fig. 17(a) had the mask pattern aligned parallel with the {3lO) direction, which gives etch termination on the 46" (331) planes. Slice in Fig, 17@) had the mask pattern aligned parallel with the normally used (1 10) direction. The mask did not have corner compensation; however, note the perfect 90" corners in the (310) aligned slice and the corner undercutting on the (1 10) aligned slice. It should be pointed out that edge undercutting is much greater in the (310) direction alignment. 'The ratio is 18+m under-

1190 IEEE TRANSj,rCTIONS ON ELECTRON DEVICES, VOL. ED-25, NO. 10, OCTOBER 1978

( a ] D l ARRAY M A S K fbl ODE iloOl 53 p m DEEP

Fig. 18. Effect of mask corner compensation on ODE and ODD ORIENTATION DEPENDENT DEPOSITION ORIENTATION DEPENDENT DEPOSITION

IlMI 1K X !lWl 2.5K X

Fig. 20. Orientation-dependent deposition on (100) silicon through circular oxide mask openings. l O O O X and 2500X magnification.

(a) AFTER D ! (POLY POLISHBACK) fbl AFTER E P I ON D!

Fig. 19. Effect of mask corner compensation of ODE and ODD.

cutting per 25-pm etch depth. There is no corner undercutt:rng in the (310) aligned slice, due to the fact that the faster etl:!n- ing (331) planes are now the etch terminating sides, or ma ;k- ing edge.

The effects of orientation-dependent etching, etch mrak corner compensation, and orientation-dependent depositim in graphically displayed in Figs. 18 and 19. Fig. 18(a) i~ a mask array for dielectric isolation processing [12], [14] of a seven-element array wherein each element is dielectricaly isolated from its neighboring element. The eleven narrcw rectangles above the seven-element array are thickness indic a- tors designed into each circuit bar. These indicators revtd the thickness of the single-crystal layer in each finished circ1,it or array [ 131, [ 141. At the left end of the thickness indicx- tors there are two alignment squares, one with and one wit.% out corner compensation. These squares are initially the sa11113 size. After ODE, 53 pm deep, the uncompensated com:r square has etched to an octagonal shape, consisting of eiglll: {331} planes as sides. (See Fig. 18(b).) Note the large dif- ference in size or surface area at this point in processing. TI c undercutting of the masking oxide is evident in this photc~. graph. Fig. 19 shows the left side of this same array after tftr slice has completed dielectric isolation processing. The moa +I

have been filled with polycrystalline silicon, the slice invertled and ground and polished back to the isolated silicon island:;., Note the near perfect square from the compensated mask aree and the near perfect octagon from the uncompensated mas c area. Also note the first two thickness indicators showing through. (Fig. 19(a) is looking at the back side of the slic: with respect to Fig. 18(a).) Fig. 19(b) shows the effect 01

Orientation-dependent deposition of silicon after the slice, a s in Fig. 19(a), has had an epitaxial deposition which is actualll:! simultaneous deposition of single- and polycrystal silicon. Tht: two squares are the compensated and uncompensated squara: areas. The octagon, (331) plane bounded, figure has growr. back to a near perfect square bounded by { 11 1 } planes. Note the (100) stacking fault in the mask corner compensatec square. Another example 01: orientation-dependent depositior: [13], [18], [ 191 is shown in Fig. 20. These near perfecl squares are grown through an oxide mask with 5-pm-diameter

Fig. 21. Standard (110) crystal projection for a face centered cubic crystal with { 11 1) and {22 1) planes designated.

circles, open for silicon nucleation. The 5-pm-diameter circles are on 25-pm centers; therefore, one can see the lateral spread- ing effect of the (100) oriented epitaxial deposition. The final width of the "Epi Top" in this case is - 18 ,um. The epitaxial linear growth is -6.5 pm on each side of the original 5-pm- diameter mask opening.

(1 10) Orientation-Dependent Etching

When we examine the crystal projection, Fig. 21, of the very open lattice (1 10) direction of silicon, shown in Fig. 3, we find that the high packing density { 1 11 } planes are now 90' to the (1 10) surface plane, however, they are no longer 90' to each other. This indicates that we can etch vertical moats with straight wall (1 11 } side termination. We have found that we have a >600 to 1 etching ratio in the (1 10) to (1 11 ) direction [I41 -[19]. This means that we can etch very narrow, for ex- ample, 0.6-pm wide, moats on very tight packing densities, for example, 1 pm or less center to center, straight down into or even completely through a (1 IO) oriented silicon slice. In this (110) mirror image symmetry we also have two relative low- angle (1 11 } planes intersecting the (1 10) surface at 35.26'.

BEAN: ANISOTROPIC ETCHING OF SILICON 1191

Fig. 22. 5000X 80' SEM of (110) ODE silicon 0.6-pm ridges on 1.2-um centers.

11101, ODE, 570X. 85' SEM

Fig. 25. 570X 85" SEM pointed ridges on l@pm centers, (110) ODE.

-I l-

(1101 ODE, 11.5KX. 85 $EM

Fig. 26. 11 500X 85' SEM pointed ridge.

5 W X 10, owx

80-pm etch depth, 5-pm ridges on 10-pm centers. Fig. 23. lOOOX, 5000X, and 10 OOOX SEM's of (110) ODE silicon.

Fig. 24. 240x 80' SEM of 10" off (110) ODE silicon. 5-pm ridges on 10-pm centers, 160 pm deep.

The effect of these will be seen and discussed later. (See Fig. 22.) Fig. 22 is a 500X, 80' SEM of a cleaved (cross-sectional) (1 IO) silicon slice that was etched using 50 percent KOH, 50 percent D.I. water etch at 80'C. The oxide mask was opened by e-beam lithography and had 0.6ym-wide openings on 1.2ym centers. Some undercutting, due to a slight mis- alignment, is evident at the oxide mask surface. We routinely obtain etch ratios greater than 600 to 1 using this etch system, that is etching 600 pn deep in the (1 IO) direction while under- cutting less than 1 pm in the ( 1 11 ) direction. See Fig. 23, Fig. 23 is a series of three SEM's of a (1 10) ODE cross section. The etch depth is 80 pm, the mask pattern is 5-pm-wide moats open on 10-pm centers. The top SEM is at IOOOX magnifica- tion. Note the low-angle (1 11) planes at the bottom of the moats. The lower left SEM is of the same structure at 5000X magnification and the lower right SEM is at 10 OOOX magnifica- tion. The original 6000-a-thick oxide mask is readily seen at the 5 and 10 thousand magnifications. These structures may be tilted at any angle by simply cutting the (1 10) silicon slice

Fig. 27. 160X 60" SEM cross-sectional and top view of (110) silicon slice, ODE from top and bottom surface simultaneously.

at the desired angle off the (1 10) direction. Fig. 24 is a 240X, 80' SEM cross-sectional view of an ODE (1 10) slice that was sawed 10' off the (1 10) plane. These very narrow ridges can be diffused and oxidized b,y normal silicon semiconductor processing. They may also be pointed to extremely sharp points as is shown in Figs. 25 and 26. This is accomplished by etching in Dash-type etch for approximately 10 min after moat etch is completed. Fig. 25 is a SEM, cross-sectional view, at 570X magnification. When an array such as this is pointed, the top (1 10) surface becomes a black body, with no surface reflection. Fig. 26 is an eleven and one half thousand X (1 1.5 thousand X ) SEM of one of these pointed ridges. Even at this magnification it is difficult to estimate a radius of curvature. Very fine, high density X-Y structures, or sieves, can be made by etching the (1 10) slice with masks aligned with the 90" (1 11) traces on both sides (top and bottom) of the slice. This pattern forms a rhombus with 109.47' obtuse angles. Fig. 27 is a 60' SEM showing both top and cross-sectional views of a (1 10) silicon slice, etched from both sides simultaneously. A quadrant was cleaved out of the slice for photographic pur- poses. Fig. 28 is a 500X magnification, SEM, of the top sur- face of the (1 10) slice etched from both sides simultaneously. The slice was 269.2 pm (10.6 mils) thick. The mask opens 5-pm-wide moats on 20-pm centers on both sides of the slice, resulting in 5 pm X 5 pm rhombic openings when etched to completion. Fig. 29 is a 2000X SEM of the structure. This structure offers new possibilities in electrical X-Y addressing, and optical mechanical designs. In an experiment, a rhombic window frame mask was purposely aligned 109" off the proper

1192

0 APERTURES - 5 pm ON 20 pm CENTERS * V I E W I N G ANGLE - 0 DEGREES *SLICE THICKNESS - 10 .6 WlLS

Fig. 28. 5OOX SEM, (110) ODE aperture grid, apertures 5 prn X 5ttm on 20-pm centers etched through 270-pm-thick slice.

Fig. 29. 2000X SEM (110) ODE aperture grid. 5 pm on 20-pm cein . x s etched through 270-pm-thick slice.

{110} S IL ICON O.D.E. ETCHED 24pm. DEEP

RHOhlBUS PATTERN ALIGNED 35.26‘ OFF i l l 0 1 FLAT

ACCUTE ANGLE UNDERCUT 10-90 ” FACET

MEASURED SIDE OF 90‘ ANGLE TO BE 45‘ OFF IliGl FLAT

76’ FROU {IIO} SURFACE

Fig. 30. (110) silicon ODE 24 pm deep. Rhombus pattern aligned 35.26” off (110) flat. Acute angle undercut to 90” crystal facet.

{IlG} SIL ICON O.O.E. ETCHED 2 4 p m DEEP

ALIGNED 45” OFF OF THE il‘iDi FLAT

9Y CORNERS - NO MASK COMPENSATION

UNDERCUTTING W A S 17 .8 urn. ETCH TERMINATION ON 221 PLANES

{22$ INTERSECTS THE i \ 110 SURFACE AT 76“

Fig. 31. (110) silicon ODE 24 pm deep. Square pattern aligned ‘45’ off (110) flat. 90” corners with no mask corner compensation, etch termination on (221) planes.

alignment of the sides with the { 1 11 ) traces at the (1 10) sur- face. The resulting etched structure had undercutting at all four corners. (See Fig. 30.) However, it was observed that the acute angle of the masked structure undercut to a palit of planes that are 90” to each other and 76” from the (1 10) ,mr-

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SOLAR CELL ANTI-REFI.ECTING SURFACE -_____ ____

are 4!j0 off a normal (1 10) flat, see Fig. 21, arid may be used for vertical etching of 90” corner structure (sq~mes, rect- angler;, 1; shapes, e:tc.) :in (1 10) crilicaa. A sqpare, 90’ Icormr pattern was aligned in this manner and etched 24 ~.un deep. Fig. 31 shows the resulting 90‘’ comers after etching,, The undercutting to dep1:h ratio is 18 to 24 pnn, :tpgwalximatel.:y the same as that of the (310) direction alignmlenlt on. the: (1001) silicon surface. Again perfect 90” corners are clbtainedl with- out mask corner compensation.

Some of the many appli~atio~ns for anisotropic etching, in semiconductor device processing are listed in Tlhble I.[. T h i s is only a partial listing a:nd a small beginning in the use of Ithis versatile technology.

ACKNOWLE:DGMENT

The author wishes to thank his fellow workers, J. Powell, L. Webb, R. Staring, I). Yeakley, B. Housevvright, T. Powell, Dorothy Splawn, and W. Runyan for their many contributions to this work. Also special thanks to W. Rlunyan and Hettie Smith, Emily Appersan, M. White, and R. Stein for critique and preparation of the .manuscript.

REFERE:NCES

[lo1 1111

face plane. These planes were identified as (221 } planes that [12]

D. R. Turner, “Electropolishing of silicon im hydrofluoric ,acid solutions,” J. Electrochem. SOC., vol. 105, pp. 402-4.08, 1958. R. R. Stead (Texas Instruments Incorporated.), “Etching of semi- conductor materials,” U.S. Patent 2 871 110, Jan. 1959; U.S. Patent 2 927 011, Mar. 1960; U.S. Patent 2 973 25:3, Feb. 1961. B. Schwartz and H. Robbin, “‘Chemical etching of silicon, Part I, The system HF, HNO3, H z 0 and HC2H302,” J. Electrochem. Soc., vol. 106, no. 6, pp. 505-508, 1959; Part 11, J. Electrochem. Soc., vol. 107, no. 2, pp. 108-111, 1960; Part 111, J. Electro- chew. Soc., vol. 108, no. 4, pp. 365-372, 1961. W. C. Dash, “Copper precipitation on dislocation in silicon,”

J. M. Crishal and A. L. Harrington, “A selective etch for elemen- tal silicon,” Electrochem. SOC. Extended Abstract #(Spring Meet- ing, 1962, Los Angeles, CA), Abstr. no. 89. R. M. Finne and D. L. Klein, “A water amine complexing agent system for etching silicon,” E.C.S. J., vol. 114, no. 9, Sept. 1967. D. B. Lee, “Anisotropic etching of silicon,” J. Appl. Phys., vol.

J. Appl. Phys., V O ~ . 27, pp. 1193-1195, 1956.

40, no. 1, Oct. 1969. H. Muraoka and T. Y. Sumitomo, Controlled Pre.ferentia1 Etching

- . -

Technology, in Semiconductor -Silicon 1973 (Electrochemical

J. B. Price, “Anisotropic etching of silicon with KOH-Hz0 Society, H. R. Huff and R. R. Burgess, Eds.).

isopropyl alcohol,” in ECS Semiconductor Silicon 1973, pp. 339-353. J. C. Greenwood, Zbid., vol. 116, no. 9, Sept. 1969. A. Bogh,Zbid., vol. 118, no. 2, Feb. 1971. U. S. Davidson and F. Lee, “Dielectric isolated integrated circuit

IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-25, NO. 10, OCTOBER 1978 1193

substrate processes,” Proc. IEEE, vol. 57, no. 9, pp. 1532-1537, Sept. 1969.

[ 131 K. E. Bean and P. S. Gleim, “The influence of crystal orientation on silicon semiconductor processing,” Proc. IEEE, vol. 57, no. 9, pp. 1469-1476, Sept. 1969.

[ 141 K. E. Bean and W. R. Runyan, “Dielectric isolation: Comprehen- sive current future.” Electrochem. Soc. J. , vol. 124, no. 1. PP. 5C-12C, Jan. 1977.’

1975.

. _ _ [15] D. L. Kendall, Appl. Phys. Lett., vol. 26, no. 4, p. 195, Feb. 15,

[ 161 M. J. Declercq, “A new CMOS technology using anisotropic etch- ing of silicon,” IEEE J. Solid-state Circuits, vol. SC-10, no. 4, pp. 191-197, Aug. 1975.

[17] K. E. Bean, J. S. Crabbe, .I. G. Hoffman, and F. D. Malone, “An improved radiation hardened JFET array,” in Semiconductor Sili- con 1973 (Electrochem. Soc.), H. R. Huff and R. R. Burgess, Eds.

[ 181 R. K. Smeltzer, D. L. Kendall, and G . L. Varnell, “Vertical mul- tiple junction solar cell fabrication,” in Conf. Rec. Tenth IEEE Photovoltaic Specialists Conf., p. 194, 1973.

[ 191 K. E. Bean, R. L. Yeakley, and T. K. Powell, “Orientation de- pendent etching and deposition of silicon,” in ECS Extended Ab- stracts Spring Meet. (May 1974), vol. 71-1.

[20] D. F. Weirauch, J. Appl. Phys., vol. 46, p. 1478, 1975. [21] E. Bassous and E. F. Baran, J. Electroch. Soc., vol. 125, no. 8,

Aug. 1978.

Holographic Interference Lithography for Integrated Optics

WILLIE W. NG, CHI-SHAIN HONG, AND AMNON YARIV, FELLOW, JEEE

Absfract-In this paper, some of our recent work in the use of holo- graphic interference lithography and various material removal tech- niques to corrugate thin-film optical waveguides are reviewed. The specific applications of these periodic thin-film devices in the distributed feedback and distributed Bragg reflector semiconductor laser, and as output grating couplers, are described. Recent results in the use and fabrication of chirped and curved-line gratings are also summarized.

I. INTRODUCTION N INTEGRATED OPTICS we are interested in investigating the possibilities of incorporating optical components in thin-

film waveguides. The diffraction grating and the geodesic lens are examples in which thin-film technology and microfabrica- tion techniques have made possible their incorporation into guided wave configurations. The gratings are fabricated by corrugating an interface of the waveguiding layer as shown in Fig. l(a). Since, in most cases, the period of the corrugations required is of the order of a micrometer or less, conventional optical photolithographic techniques cannot be used for writ- ing the grating lines. Instead, the grating masks have to be generated either by electron-beam lithography or holographic interference techniques. The latter is a maskless technique that records the interference fringes of two collimated interfering laser beams. In this paper we describe the state of the art of this technique and its application to some optoelectronic devices.

Since this Special Issue is devoted mostly to a review of the

I

Manuscript received February 29, 1978; revised June 15,1978. This work was supported by the Air Force Office of Scientific Research and the National Science Foundation.

CA 91125. The authors are with California Institute of Technology, Pasadena,

various techniques of lithography, material removal, and de- position in the fabrication of devices, we will only sketch the basic principles of designing periodic thin-film waveguides. For details regarding the theoretical aspects, the interested reader is referred to [ 1 3 . This paper attempts to supplement [ l ] , especially in the experimental aspects.

In Section I11 we describe in detail the fabrication of small period gratings by holographic interference. In Section IV we will describe the distributed feedback semiconductor (DFB) and distributed Bragg reflector (DBR.) lasers. Such lasers utilize Bragg reflection as the feedback mechanism for laser oscillation and thus eliminate the necessity of terminating the semiconductor laser cavity at one of the cleavage planes of the GaAs substrate. The gratings also provide wavelength selectiv- ity and stability [2] for the multiplexing of optical signals in optical communication. Section V describes the use of ion- milling for the fabrication of blazed gratings that can be used as output couplers for thin-film waveguides. And finally, in the last section, we describe some of our work in the use of curved wavefronts to generate grating lines with a variable period [3] (“chirped gratings”) and novel curved line gratings that have focusing properties. The use of the former for wave- length demultiplexing has been demonstrated [LC], [5].

11. WAVE COUPLING IN CORRUGATED WAVEGUIDES The case of Bragg reflection by a corrugated waveguide is

shown in Fig. l(b). The perturbation of the thin-film wave- guide by the corrugations causes a contradirectional wave A (z ) eiPz , to be generated from the incident wave B(z ) e-’@’. The effectiveness of coupling is derived from a pair of coupled mode equations [6] and is characterized by a coupling parame-

0018-9383/78/1000-1993$00.75 0 1978 IEEE