atmel smart sam d21 datasheet summarywiki.ocrobot.com/lib/exe/fetch.php?media=ocrobot:...aug 10,...

SMART ARM-based Microcontroller

SAM D21E SAM D21G SAM D21J Summary

DATASHEET SUMMARY

Introduction

Atmelreg | SMARTtrade SAM D21 is a series of low-power microcontrollers usingthe 32-bit ARMreg Cortexreg-M0+ processor and ranging from 32- to 64-pinswith up to 256KB Flash and 32KB of SRAM The SAM D21 devices operateat a maximum frequency of 48MHz and reach 246 CoreMarkregMHz Theyare designed for simple and intuitive migration with identical peripheralmodules hex compatible code identical linear address map and pincompatible migration paths between all devices in the product series Alldevices include intelligent and flexible peripherals Atmel Event System forinter-peripheral signaling and support for capacitive touch button slider andwheel user interfaces

Features

bull Processorndash ARM Cortex-M0+ CPU running at up to 48MHz

bull Single-cycle hardware multiplierbull Micro Trace Buffer (MTB)

bull Memoriesndash 3264128256KB in-system self-programmable Flashndash 481632KB SRAM Memory

bull Systemndash Power-on reset (POR) and brown-out detection (BOD)ndash Internal and external clock options with 48MHz Digital Frequency

Locked Loop (DFLL48M) and 48MHz to 96MHz Fractional DigitalPhase Locked Loop (FDPLL96M)

ndash External Interrupt Controller (EIC)ndash 16 external interruptsndash One non-maskable interruptndash Two-pin Serial Wire Debug (SWD) programming test and

debugging interfacebull Low Power

ndash Idle and standby sleep modesndash SleepWalking peripherals

Atmel-42181J-SAM-D21_Datasheet_Summary-072016

This is a summary document Acomplete document is availableon our Web site atwwwatmelcom

bull Peripheralsndash 12-channel Direct Memory Access Controller (DMAC)ndash 12-channel Event Systemndash Up to five 16-bit TimerCounters (TC) configurable as either

bull One 16-bit TC with two comparecapture channelsbull One 8-bit TC with two comparecapture channelsbull One 32-bit TC with two comparecapture channels by using two TCs

ndash Three 24-bit TimerCounters for Control (TCC) with extended functionsbull Up to four compare channels with optional complementary outputbull Generation of synchronized pulse width modulation (PWM) pattern across port pinsbull Deterministic fault protection fast decay and configurable dead-time between

complementary outputbull Dithering that increase resolution with up to 5 bit and reduce quantization error

ndash 32-bit Real Time Counter (RTC) with clockcalendar functionndash Watchdog Timer (WDT)ndash CRC-32 generatorndash One full-speed (12Mbps) Universal Serial Bus (USB) 20 interface

bull Embedded host and device functionbull Eight endpoints

ndash Up to six Serial Communication Interfaces (SERCOM) each configurable to operate aseither

bull USART with full-duplex and single-wire half-duplex configurationbull I2C up to 34MHzbull SPIbull LIN slave

ndash One two-channel Inter-IC Sound (I2S) interfacendash One 12-bit 350ksps Analog-to-Digital Converter (ADC) with up to 20 channels

bull Differential and single-ended inputbull 12x to 16x programmable gain stagebull Automatic offset and gain error compensationbull Oversampling and decimation in hardware to support 13- 14- 15- or 16-bit resolution

ndash 10-bit 350ksps Digital-to-Analog Converter (DAC)ndash Two Analog Comparators (AC) with window compare functionndash Peripheral Touch Controller (PTC)

bull 256-Channel capacitive touch and proximity sensingbull IO

ndash Up to 52 programmable IO pinsbull Drop in compatible with SAM D20bull Packages

ndash 64-pin TQFP QFN UFBGAndash 48-pin TQFP QFN WLCSPndash 32-pin TQFP QFN WLCSP

bull Operating Voltagendash 162V ndash 363V

Atmel SAM D21E SAM D21G SAM D21J Summary [DATASHEET]Atmel-42181J-SAM-D21_Datasheet_Summary-072016

2

Table of Contents

Introduction1

Features 1

1 Description4

2 Configuration Summary5

3 Ordering Information731 SAM D21E732 SAM D21G 933 SAM D21J1134 Device Identification 13

4 Block Diagram 15

5 Pinout1651 SAM D21J 1652 SAM D21G 1853 SAM D21E20

6 Product Mapping22

7 Processor And Architecture2371 Cortex M0+ Processor2372 Nested Vector Interrupt Controller2573 Micro Trace Buffer 2674 High-Speed Bus System 2775 AHB-APB Bridge 3076 PAC - Peripheral Access Controller31

8 Packaging Information4981 Thermal Considerations 4982 Package Drawings5083 Soldering Profile 59

1 DescriptionThe Atmelreg | SMARTtrade SAM D21 is a series of low-power microcontrollers using the 32-bit ARMreg Cortexreg-M0+ processor and ranging from 32- to 64-pins with up to 256KB Flash and 32KB of SRAM The SAMD21 devices operate at a maximum frequency of 48MHz and reach 246 CoreMarkMHz They aredesigned for simple and intuitive migration with identical peripheral modules hex compatible codeidentical linear address map and pin compatible migration paths between all devices in the productseries All devices include intelligent and flexible peripherals Atmel Event System for inter-peripheralsignaling and support for capacitive touch button slider and wheel user interfaces

The SAM D21 devices provide the following features In-system programmable Flash twelve-channeldirect memory access (DMA) controller 12 channel Event System programmable interrupt controller upto 52 programmable IO pins 32-bit real-time clock and calendar up to five 16-bit TimerCounters (TC)and three 24-bit TimerCounters for Control (TCC) where each TC can be configured to performfrequency and waveform generation accurate program execution timing or input capture with time andfrequency measurement of digital signals The TCs can operate in 8- or 16-bit mode selected TCs can becascaded to form a 32-bit TC and three timercounters have extended functions optimized for motorlighting and other control applications The series provide one full-speed USB 20 embedded host anddevice interface up to six Serial Communication Modules (SERCOM) that each can be configured to actas an USART UART SPI I2C up to 34MHz SMBus PMBus and LIN slave two-channel I2S interfaceup to twenty-channel 350ksps 12-bit ADC with programmable gain and optional oversampling anddecimation supporting up to 16-bit resolution one 10-bit 350ksps DAC two analog comparators withwindow mode Peripheral Touch Controller supporting up to 256 buttons sliders wheels and proximitysensing programmable Watchdog Timer brown-out detector and power-on reset and two-pin Serial WireDebug (SWD) program and debug interface

All devices have accurate and low-power external and internal oscillators All oscillators can be used as asource for the system clock Different clock domains can be independently configured to run at differentfrequencies enabling power saving by running each peripheral at its optimal clock frequency and thusmaintaining a high CPU frequency while reducing power consumption

The SAM D21 devices have two software-selectable sleep modes idle and standby In idle mode theCPU is stopped while all other functions can be kept running In standby all clocks and functions arestopped expect those selected to continue running The device supports SleepWalking This featureallows the peripheral to wake up from sleep based on predefined conditions and thus allows the CPU towake up only when needed eg when a threshold is crossed or a result is ready The Event Systemsupports synchronous and asynchronous events allowing peripherals to receive react to and sendevents even in standby mode

The Flash program memory can be reprogrammed in-system through the SWD interface The sameinterface can be used for non-intrusive on-chip debug of application code A boot loader running in thedevice can use any communication interface to download and upgrade the application program in theFlash memory

The SAM D21 devices are supported with a full suite of program and system development tools includingC compilers macro assemblers program debuggersimulators programmers and evaluation kits


4

2 Configuration SummarySAM D21J SAM D21G SAM D21E

Pins 64 48 32

General Purpose IO-pins(GPIOs)

52 38 26

Flash 2561286432KB 2561286432KB 2561286432KB

SRAM 321684KB 321684KB 321684KB

Timer Counter (TC)instances

5 3 3

Waveform output channelsper TC instance

2 2 2

Timer Counter for Control(TCC) instances

3 3 3

Waveform output channelsper TCC

842 842 842

DMA channels 12 12 12

USB interface 1 1 1

Serial CommunicationInterface (SERCOM)instances

6 6 4

Inter-IC Sound (I2S)interface

1 1 1

Analog-to-Digital Converter(ADC) channels

20 14 10

Analog Comparators (AC) 2 2 2

Digital-to-Analog Converter(DAC) channels

1 1 1

Real-Time Counter (RTC) Yes Yes Yes

RTC alarms 1 1 1

RTC compare values One 32-bit value or

two 16-bit values

One 32-bit value or

two 16-bit values

One 32-bit value or

two 16-bit values

External Interrupt lines 16 16 16

Peripheral Touch Controller(PTC) X and Y lines

16x16 12x10 10x6

Maximum CPU frequency 48MHz


5

SAM D21J SAM D21G SAM D21E

Packages QFN

TQFP

UFBGA

QFN

TQFP

WLCSP

QFN

TQFP

WLCSP

Oscillators 32768kHz crystal oscillator (XOSC32K)

04-32MHz crystal oscillator (XOSC)

32768kHz internal oscillator (OSC32K)

32KHz ultra-low-power internal oscillator (OSCULP32K)

8MHz high-accuracy internal oscillator (OSC8M)

48MHz Digital Frequency Locked Loop (DFLL48M)

96MHz Fractional Digital Phased Locked Loop (FDPLL96M)

Event System channels 12 12 12

SW Debug Interface Yes Yes Yes

Watchdog Timer (WDT) Yes Yes Yes


6

3 Ordering Information

SAMD 21 E 15 A - M U T

Product FamilySAMD = General Purpose Microcontroller

21 = Cortex M0 + CPU Basic Feature Set

E = 32 PinsG = 48 PinsJ = 64 Pins

No character = Tray (Default) T = Tape and Reel

U = -40 - 85OC Matte Sn PlatingF = -40 - 125OC Matte Sn Plating

A = TQFPM = QFN U = WLCSPC = UFBGA

+ DMA + USB

Product Series

Flash Memory Density

Device VariantA = Default VariantB = Added RWW support for 32KB and 64KB memory options

Pin Count

Package Carrier

Package Grade

Package Type

18 = 256KB17 = 128KB16 = 64KB15 = 32KB

31 SAM D21ETable 3-1 Device Variant A

Ordering Code FLASH (bytes) SRAM (bytes) Package Carrier Type

ATSAMD21E15A-AU 32K 4K TQFP32 Tray

ATSAMD21E15A-AUT Tape amp Reel

ATSAMD21E15A-AF Tray

ATSAMD21E15A-AFT Tape amp Reel

ATSAMD21E15A-MU QFN32 Tray

ATSAMD21E15A-MUT Tape amp Reel

ATSAMD21E15A-MF Tray

ATSAMD21E15A-MFT Tape amp Reel


7

























ATSAMD21E18A-MFUT Tape amp Reel


8

Table 3-2 Device Variant B


ATSAMD21E15B-AU 32K 4K TQFP32 Tray

ATSAMD21E15B-AUT Tape amp Reel

ATSAMD21E15B-AF Tray

ATSAMD21E15B-AFT Tape amp Reel

ATSAMD21E15B-MU QFN32 Tray

ATSAMD21E15B-MUT Tape amp Reel

ATSAMD21E15B-MF Tray

ATSAMD21E15B-MFT Tape amp Reel

ATSAMD21E15B-UUT WLCSP35 Tape amp Reel









ATSAMD21E16B-UUT 64K 8K WLCSP35 Tape amp Reel

32 SAM D21GTable 3-3 Device Variant A


ATSAMD21G15A-AU 32K 4K TQFP48 Tray

ATSAMD21G15A-AUT Tape amp Reel

ATSAMD21G15A-AF Tray

ATSAMD21G15A-AFT Tape amp Reel

ATSAMD21G15A-MU QFN48 Tray

ATSAMD21G15A-MUT Tape amp Reel

ATSAMD21G15A-MF Tray

ATSAMD21G15A-MFT Tape amp Reel


9


















ATSAMD21G17A-UUT WLCSP45 Tape amp Reel











10



ATSAMD21G15B-AU 32K 4K TQFP48 Tray

ATSAMD21G15B-AUT Tape amp Reel

ATSAMD21G15B-AF Tray

ATSAMD21G15B-AFT Tape amp Reel

ATSAMD21G15B-MU QFN48 Tray

ATSAMD21G15B-MUT Tape amp Reel

ATSAMD21G15B-MF Tray

ATSAMD21G15B-MFT Tape amp Reel









33 SAM D21JTable 3-5 Device Variant A


ATSAMD21J15A-AU 32K 4K TQFP64 Tray

ATSAMD21J15A-AUT Tape amp Reel

ATSAMD21J15A-AF Tray

ATSAMD21J15A-AFT Tape amp Reel

ATSAMD21J15A-MU QFN64 Tray

ATSAMD21J15A-MUT Tape amp Reel

ATSAMD21J15A-MF Tray

ATSAMD21J15A-MFT Tape amp Reel


11










ATSAMD21J16A-CU UFBGA64 Tray

ATSAMD21J16A-CUT Tape amp Reel






















12



ATSAMD21J15B-AU 32K 4K TQFP64 Tray

ATSAMD21J15B-AUT Tape amp Reel

ATSAMD21J15B-AF Tray

ATSAMD21J15B-AFT Tape amp Reel

ATSAMD21J15B-MU QFN64 Tray

ATSAMD21J15B-MUT Tape amp Reel

ATSAMD21J15B-MF Tray

ATSAMD21J15B-MFT Tape amp Reel









ATSAMD21J16B-CU UFBGA64 Tray

ATSAMD21J16B-CUT Tape amp Reel

34 Device IdentificationThe DSU - Device Service Unit peripheral provides the Device Selection bits in the Device Identificationregister (DIDDEVSEL) in order to identify the device by software The SAM D21 variants have a resetvalue of DID=0x1001drxx with the LSB identifying the die number (d) the die revision (r) and the deviceselection (xx)

Table 3-7 SAM D21 Device Identification Values

Device Variant DIDDEVSEL Device ID (DID)

SAMD21J18A 0x00 0x10010000

SAMD21J17A 0x01 0x10010001

SAMD21J16A 0x02 0x10010002

SAMD21J15A 0x03 0x10010003

Reserved 0x04

SAMD21G18A 0x05 0x10010005

SAMD21G17A 0x06 0x10010006


13


SAMD21G16A 0x07 0x10010007

SAMD21G15A 0x08 0x10010008

Reserved 0x09

SAMD21E18A 0x0A 0x1001000A

SAMD21E17A 0x0B 0x1001000B

SAMD21E16A 0x0C 0x1001000C

SAMD21E15A 0x0D 0x1001000D

Reserved 0x10 - 0x1F

SAMD21J16B 0x20 0x10011420

SAMD21J15B 0x21 0x10011421

Reserved 0x22

SAMD21G16B 0x23 0x10011423

SAMD21G15B 0x24 0x10011424

Reserved 0x25

SAMD21E16B 0x26 0x10011426

SAMD21E15B 0x27 0x10011427

Reserved 0x28 - 0xFF

Note The device variant (last letter of the ordering number) is independent of the die revision Thedevice variant denotes functional differences whereas the die revision marks evolution of the die


14

4 Block Diagram

6 x SERCOM

8 x Timer Counter

REAL TIME COUNTER

AHB-APB BRIDGE C

M

MHIGH SPEED BUS MATRIX

POR

T

PO

RT

WATCHDOG TIMER

SERIAL WIRESWDIO

S

CORTEX-M0+ PROCESSOR Fmax 48 MHz

SWCLK

DEVICE SERVICE

UNIT

AHB-APB BRIDGE A

20-CHANNEL 12-bit ADC 350KSPS

AIN[190]

VREFA

AIN[30]

S

SRAM CONTROLLER

321684KB RAM

M

RESET CONTROLLER

SLEEP CONTROLLER

CLOCK CONTROLLER

POWER MANAGER

RESETN

5 x TIMER COUNTER

EVE

NT

SYST

EM

S

6 x SERCOM

2 ANALOG COMPARATORS

SYSTEM CONTROLLER

XOUT XIN

XOUT32 XIN32

OSCULP32K

OSC32K

OSC8M

DFLL48M

BOD33

XOSC32K

XOSC

VREF

X[150]

Y[150]

PERIPHERAL TOUCH

CONTROLLER

PERIPHERAL ACCESS CONTROLLER

AHB-APB BRIDGE B

VREFA

VOUT

10-bit DAC

EXTERNAL INTERRUPT CONTROLLER



EXTINT[150] NMI

GCLK_IO[70]

S

PAD0

WO1

PAD1PAD2PAD3

WO0

VREFB

2561286432KB NVM

NVM CONTROLLER

Cache

S

DMA

USB FSDEVICE

MINI-HOST

DP

DM

3x TIMER COUNTERFOR CONTROL

WOn

IOBUS

FDPLL96MDMA

DMA

DMA

DMA

DMA

MCK[10]SCK[10]INTER-IC

SOUND CONTROLLER

SD[10]FS[10]

DMA

MIC

RO

TRAC

E BU

FFER

SOF 1KHZ

WO0WO1

(2)

GENERIC CLOCKCONTROLLER

CMP[10]

1 Some products have different number of SERCOM instances TimerCounter instances PTC signalsand ADC signals

2 The three TCC instances have different configurations including the number of Waveform Output (WO)lines Refer to TCC Configuration Summary in the Overview of TCC ndash TimerCounter for ControlApplications for details


15

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

PA00 1PA01 2PA02 3PA03 4PB04 5PB05 6

GNDANA 7VDDANA 8

PB06 9PB07 10PB08 11PB09 12PA04 13PA05 14PA06 15PA07 16

PA08

17PA

0918

PA10

19PA

1120

VDD

IO21

GN

D22

PB10

23PB

1124

PB12

25PB

1326

PB14

27PB

1528

PA12

29PA

1330

PA14

31PA

1532

VDDIO48GND47PA2546PA2445PA2344PA2243PA2142PA2041PB1740PB1639PA1938PA1837PA1736PA1635VDDIO34GND33

PB22

49PB

2350

PA27

51R

ESET

52PA

2853

GN

D54

VDD

CO

RE

55VD

DIN

56PA

3057

PA31

58PB

3059

PB31

60PB

0061

PB01

62PB

0263

PB03

64

DIGITAL PINANALOG PINOSCILLATORGROUNDINPUT SUPPLY REGULATED OUTPUT SUPPLYRESET PIN


16

512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524

VDDIO36GND35PA2534PA2433PA2332PA2231

30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48

DIGITAL PINANALOG PINOSCILLATORGROUNDINPUT SUPPLYREGULATED OUTPUT SUPPLYRESET PIN


18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32

PA00 1PA01 2PA02 3PA03 4PA04 5PA05 6PA06 7PA07 8

VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16

PA2524PA2423PA2322PA2221PA1920PA1819PA1718PA1617

PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21

6 Product MappingFigure 6-1 Atmel SAM D21 Product Mapping

Code

SRAM

Undefined

Peripherals

Reserved

Undefined

Global Memory Space0x00000000

0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000

0x00040000 0x1FFFFFFF

0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM

SYSCTRL GCLK WDT RTC EIC

AHB-APB Bridge A0x40000000 0x40000400 0x40000800 0x40000C00 0x40001000 0x40001400 0x40001800

0x40FFFFFF 0x40001C00

AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS

SERCOM0 SERCOM1 SERCOM2 SERCOM3 SERCOM4

AHB-APB Bridge C

TC7

TCC0 TCC1 TCC2 TC3 TC4 TC5 TC6

ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000

0xE0000000 0xE000E000 0xE000F000 0xE00FF000 0xE0100000 0xFFFFFFFF

System

Reserved SCS

Reserved

ROMTable Reserved

Internal Flash0x00000000 0x00010000

0x1FFFFFFF

Internal RWW section

Device Variant A Device Variant B

This figure represents the full configuration of the Atmelreg SAM D21 with maximum flash and SRAMcapabilities and a full set of peripherals Refer to the Configuration Summary for details


22

7 Processor And Architecture

71 Cortex M0+ ProcessorThe SAM D21 implements the ARMreg Cortexreg-M0+ processor based on the ARMv6 Architecture andThumbreg-2 ISA The Cortex M0+ is 100 instruction set compatible with its predecessor the Cortex-M0core and upward compatible to Cortex-M3 and M4 cores The ARM Cortex-M0+ implemented is revisionr0p1 For more information refer to httpwwwarmcom

711 Cortex M0+ ConfigurationTable 7-1 Cortex M0+ Configuration

Features Configurable option Enter Title of Manualconfiguration

Interrupts External interrupts 0-32 28

Data endianness Little-endian or big-endian Little-endian

SysTick timer Present or absent Present

Number of watchpointcomparators

0 1 2 2

Number of breakpointcomparators

0 1 2 3 4 4

Halting debug support Present or absent Present

Multiplier Fast or small Fast (single cycle)

Single-cycle IO port Present or absent Present

Wake-up interrupt controller Supported or not supported Not supported

Vector Table Offset Register Present or absent Present

UnprivilegedPrivileged support Present or absent Absent(1)

Memory Protection Unit Not present or 8-region Not present

Reset all registers Present or absent Absent

Instruction fetch width 16-bit only or mostly 32-bit 32-bit

DAP AHB slave Debug access port type supported DAP-Specific

Architectural clock gating Implement Architectural Clock Gating Implemented

Debug Interface Serial wire andor JTAG debug interface Serial Wire

Multi-drop serial wire Serial wire multi-drop support Not implemented

Note 1 All software run in privileged mode only

The ARM Cortex-M0+ core has two bus interfaces


23

bull Single 32-bit AMBA-3 AHB-Lite system interface that provides connections to peripherals and allsystem memory which includes flash and RAM

bull Single 32-bit IO port bus interfacing to the PORT with 1-cycle loads and stores

712 Cortex-M0+ Peripheralsbull System Control Space (SCS)

ndash The processor provides debug through registers in the SCS Refer to the Cortex-M0+Technical Reference Manual for details (wwwarmcom)

bull System Timer (SysTick)ndash The System Timer is a 24-bit timer that extends the functionality of both the processor and the

NVIC Refer to the Cortex-M0+ Technical Reference Manual for details (wwwarmcom)bull Nested Vectored Interrupt Controller (NVIC)

ndash External interrupt signals connect to the NVIC and the NVIC prioritizes the interruptsSoftware can set the priority of each interrupt The NVIC and the Cortex-M0+ processor coreare closely coupled providing low latency interrupt processing and efficient processing of latearriving interrupts Refer to Nested Vector Interrupt Controller and the Cortex-M0+ TechnicalReference Manual for details (wwwarmcom)

bull System Control Block (SCB)ndash The System Control Block provides system implementation information and system control

This includes configuration control and reporting of the system exceptions Refer to theCortex-M0+ Devices Generic User Guide for details (wwwarmcom)

bull Micro Trace Buffer (MTB)ndash The CoreSight MTB-M0+ (MTB) provides a simple execution trace capability to the Cortex-

M0+ processor Refer to section Micro Trace Buffer and the CoreSight MTB-M0+ TechnicalReference Manual for details (wwwarmcom)

713 Cortex-M0+ Address MapTable 7-2 Cortex-M0+ Address Map

Address Peripheral

0xE000E000 System Control Space (SCS)

0xE000E010 System Timer (SysTick)

0xE000E100 Nested Vectored Interrupt Controller (NVIC)

0xE000ED00 System Control Block (SCB)

0x41006000 (see also Product Mapping) Micro Trace Buffer (MTB)

714 IO Interface

7141 OverviewBecause accesses to the AMBAreg AHB-Litetrade and the single cycle IO interface can be made concurrentlythe Cortex-M0+ processor can fetch the next instructions while accessing the IOs This enables singlecycle IO accesses to be sustained for as long as needed Refer to CPU Local Bus for more information

7142 DescriptionDirect access to PORT registers


24

72 Nested Vector Interrupt Controller

721 OverviewThe Nested Vectored Interrupt Controller (NVIC) in the SAM D21 supports 32 interrupt lines with fourdifferent priority levels For more details refer to the Cortex-M0+ Technical Reference Manual(wwwarmcom)

722 Interrupt Line MappingEach of the 28 interrupt lines is connected to one peripheral instance as shown in the table below Eachperipheral can have one or more interrupt flags located in the peripheralrsquos Interrupt Flag Status and Clear(INTFLAG) register The interrupt flag is set when the interrupt condition occurs Each interrupt in theperipheral can be individually enabled by writing a one to the corresponding bit in the peripheralrsquosInterrupt Enable Set (INTENSET) register and disabled by writing a one to the corresponding bit in theperipheralrsquos Interrupt Enable Clear (INTENCLR) register An interrupt request is generated from theperipheral when the interrupt flag is set and the corresponding interrupt is enabled The interrupt requestsfor one peripheral are ORed together on system level generating one interrupt request for eachperipheral An interrupt request will set the corresponding interrupt pending bit in the NVIC interruptpending registers (SETPENDCLRPEND bits in ISPRICPR) For the NVIC to activate the interrupt itmust be enabled in the NVIC interrupt enable register (SETENACLRENA bits in ISERICER) The NVICinterrupt priority registers IPR0-IPR7 provide a priority field for each interrupt

Table 7-3 Interrupt Line Mapping (Continued)

Peripheral Source NVIC Line

EIC NMI ndash External Interrupt Controller NMI

PM ndash Power Manager 0

SYSCTRL ndash System Control 1

WDT ndash Watchdog Timer 2

RTC ndash Real Time Counter 3

EIC ndash External Interrupt Controller 4

NVMCTRL ndash Non-Volatile Memory Controller 5

DMAC - Direct Memory Access Controller 6

USB - Universal Serial BusReserved 7

EVSYS ndash Event System 8

SERCOM0 ndash Serial Communication Interface 0 9





SERCOM5 ndash Serial Communication Interface 5Reserved 14

TCC0 ndash Timer Counter for Control 0 15


25




TC3 ndash Timer Counter 3 18



TC6 ndash Timer Counter 6Reserved 21


ADC ndash Analog-to-Digital Converter 23

AC ndash Analog Comparator 24

DAC ndash Digital-to-Analog ConverterReserved 25

PTC ndash Peripheral Touch ControllerReserved 26

I2S - Inter IC SoundReservedReserved 27

73 Micro Trace Buffer

731 Featuresbull Program flow tracing for the Cortex-M0+ processorbull MTB SRAM can be used for both trace and general purpose storage by the processorbull The position and size of the trace buffer in SRAM is configurable by softwarebull CoreSight compliant

732 OverviewWhen enabled the MTB records changes in program flow reported by the Cortex-M0+ processor overthe execution trace interface shared between the Cortex-M0+ processor and the CoreSight MTB-M0+This information is stored as trace packets in the SRAM by the MTB An off-chip debugger can extract thetrace information using the Debug Access Port to read the trace information from the SRAM Thedebugger can then reconstruct the program flow from this information

The MTB simultaneously stores trace information into the SRAM and gives the processor access to theSRAM The MTB ensures that trace write accesses have priority over processor accesses

The execution trace packet consists of a pair of 32-bit words that the MTB generates when it detects theprocessor PC value changes non-sequentially A non-sequential PC change can occur during branchinstructions or during exception entry See the CoreSight MTB-M0+ Technical Reference Manual for moredetails on the MTB execution trace packet format

Tracing is enabled when the MASTEREN bit in the Master Trace Control Register is 1 There are variousways to set the bit to 1 to start tracing or to 0 to stop tracing See the CoreSight Cortex-M0+ TechnicalReference Manual for more details on the Trace start and stop and for a detailed description of the MTBrsquosMASTER register The MTB can be programmed to stop tracing automatically when the memory fills to aspecified watermark level or to start or stop tracing by writing directly to the MASTEREN bit If the


26

watermark mechanism is not being used and the trace buffer overflows then the buffer wraps aroundoverwriting previous trace packets

The base address of the MTB registers is 0x41006000 this address is also written in the CoreSight ROMTable The offset of each register from the base address is fixed and as defined by the CoreSight MTB-M0+ Technical Reference Manual The MTB has 4 programmable registers to control the behavior of thetrace features

bull POSITION Contains the trace write pointer and the wrap bitbull MASTER Contains the main trace enable bit and other trace control fieldsbull FLOW Contains the WATERMARK address and the AUTOSTOP and AUTOHALT control bitsbull BASE Indicates where the SRAM is located in the processor memory map This register is

provided to enable auto discovery of the MTB SRAM location by a debug agent

See the CoreSight MTB-M0+ Technical Reference Manual for a detailed description of these registers

74 High-Speed Bus System

741 FeaturesThe High-Speed Bus System combines a Bus Interconnection Matrix for standard MasterSlavecommunication and a unified FlexRAM System Memory area with multiple access capabilities

High-Speed Bus Matrix has the following featuresbull Symmetric crossbar bus switch implementationbull Allows concurrent accesses from different masters to different slavesbull 32-bit data busbull Operation at a one-to-one clock frequency with the bus masters

FlexRAM Memory has the following features

l Unified System Memory area

l Allows concurrent accesses from different masters

l Offers privileged accesses from specific masters


27

742 Configuration

CM0+ 0

DSU 1

High-Speed Bus SLAVES

Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID

SRAM PORT IDMASTER ID


28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID


Table 7-4 Bus Matrix Masters

Bus Matrix Masters Master ID

CM0+ - Cortex M0+ Processor 0

DSU - Device Service Unit 1

DMAC - Direct Memory Access Controller Data Access 2

Table 7-5 Bus Matrix Slaves

Bus Matrix Slaves Slave ID

Internal Flash Memory 0

AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3

SRAM Port 4 - CM0+ Access 4

SRAM Port 5 - DMAC Data Access 5

SRAM Port 6 - DSU Access 6


29

Table 7-6 SRAM Port Connection

SRAM Port Connection Port ID Connection Type

MTB - Micro Trace Buffer 0 Direct

USB - Universal Serial Bus 1 Direct

DMAC - Direct Memory Access Controller - Write-Back Access 2 Direct

DMAC - Direct Memory Access Controller - Fetch Access 3 Direct

CM0+ - Cortex M0+ Processor 4 Bus Matrix

DMAC - Direct Memory Access Controller - Data Access 5 Bus Matrix

DSU - Device Service Unit 6 Bus Matrix

743 SRAM Quality of ServiceTo ensure that masters with latency requirements get sufficient priority when accessing RAM the differentmasters can be configured to have a given priority for different type of access

The Quality of Service (QoS) level is independently selected for each master accessing the RAM For anyaccess to the RAM the RAM also receives the QoS level The QoS levels and their corresponding bitvalues for the QoS level configuration is shown in Table Quality of Service

Table 7-7 Quality of Service

Value Name Description

00 DISABLE Background (no sensitive operation)

01 LOW Sensitive Bandwidth

10 MEDIUM Sensitive Latency

11 HIGH Critical Latency

If a master is configured with QoS level 0x00 or 0x01 there will be minimum one cycle latency for theRAM access

The priority order for concurrent accesses are decided by two factors First the QoS level for the masterand then a static priority given by table nn-mm (table SRAM port connection) where the lowest port IDhas the highest static priority

The MTB has fixed QoS level 3 and the DSU has fixed QoS level 1

The CPU QoS level can be writtenread at address 0x41007110 bits [10] Its reset value is 0x0

Refer to different master QOSCTRL registers for configuring QoS for the other masters (USB DMAC)

75 AHB-APB BridgeThe AHB-APB bridge is an AHB slave providing an interface between the high-speed AHB domain andthe low-power APB domain It is used to provide access to the programmable control registers ofperipherals (see Product Mapping)

AHB-APB bridge is based on AMBA APB Protocol Specification V20 (ref as APB4) includingbull Wait state supportbull Error reporting


30

bull Transaction protectionbull Sparse data transfer (byte half-word and word)

Additional enhancementsbull Address and data cycles merged into a single cyclebull Sparse data transfer also apply to read access

to operate the AHB-APB bridge the clock (CLK_HPBx_AHB) must be enabled See PM ndash PowerManager for details

Figure 7-1 APB Write AccessT0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5

Wait statesNo wait states

Figure 7-2 APB Read AccessT0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5


76 PAC - Peripheral Access Controller

761 OverviewThere is one PAC associated with each AHB-APB bridge The PAC can provide write protection forregisters of each peripheral connected on the same bridge


31

The PAC peripheral bus clock (CLK_PACx_APB) can be enabled and disabled in the Power ManagerCLK_PAC0_APB and CLK_PAC1_APB are enabled are reset CLK_PAC2_APB is disabled at resetRefer to PM ndash Power Manager for details The PAC will continue to operate in any sleep mode where theselected clock source is running Write-protection does not apply for debugger access When thedebugger makes an access to a peripheral write-protection is ignored so that the debugger can updatethe register

Write-protect registers allow the user to disable a selected peripheralrsquos write-protection without doing aread-modify-write operation These registers are mapped into two IO memory locations one for clearingand one for setting the register bits Writing a one to a bit in the Write Protect Clear register (WPCLR) willclear the corresponding bit in both registers (WPCLR and WPSET) and disable the write-protection forthe corresponding peripheral while writing a one to a bit in the Write Protect Set (WPSET) register will setthe corresponding bit in both registers (WPCLR and WPSET) and enable the write-protection for thecorresponding peripheral Both registers (WPCLR and WPSET) will return the same value when read

If a peripheral is write-protected and if a write access is performed data will not be written and theperipheral will return an access error (CPU exception)

The PAC also offers a safety feature for correct program execution with a CPU exception generated ondouble write-protection or double unprotection of a peripheral If a peripheral n is write-protected and awrite to one in WPSET[n] is detected the PAC returns an error This can be used to ensure that theapplication follows the intended program flow by always following a write-protect with an unprotect andvice versa However in applications where a write-protected peripheral is used in several contexts eginterrupts care should be taken so that either the interrupt can not happen while the main application orother interrupt levels manipulate the write-protection status or when the interrupt handler needs tounprotect the peripheral based on the current protection status by reading WPSET

762 Register DescriptionAtomic 8- 16- and 32-bit accesses are supported In addition the 8-bit quarters and 16-bit halves of a 32-bit register and the 8-bit halves of a 16-bit register can be accessed directly

Refer to Product Mapping for PAC locations

7621 PAC0 Register Description


32

Write Protect Clear

Name WPCLROffset 0x00Reset 0x000000Property

ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset

Bit 7 6 5 4 3 2 1 0 EIC RTC WDT GCLK SYSCTRL PM

Access RW RW RW RW RW RW Reset 0 0 0 0 0 0

Bit 6 ndash EICWriting a zero to these bits has no effect

Writing a one to these bits will clear the Write Protect bit for the corresponding peripherals

Value Description0 Write-protection is disabled

1 Write-protection is enabled

Bit 5 ndash RTCWriting a zero to these bits has no effect




Bit 4 ndash WDTWriting a zero to these bits has no effect



33



Bit 3 ndash GCLKWriting a zero to these bits has no effect




Bit 2 ndash SYSCTRLWriting a zero to these bits has no effect




Bit 1 ndash PMWriting a zero to these bits has no effect





34

Write Protect Set

Name WPSETOffset 0x04Reset 0x000000Property

ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset

Bit 7 6 5 4 3 2 1 0 MTB USB DMAC PORT NVMCTRL DSU


Bit 6 ndash MTBWriting a zero to these bits has no effect




Bit 5 ndash USBWriting a zero to these bits has no effect




Bit 4 ndash DMACWriting a zero to these bits has no effect



37



Bit 3 ndash PORTWriting a zero to these bits has no effect




Bit 2 ndash NVMCTRLWriting a zero to these bits has no effect




Bit 1 ndash DSUWriting a zero to these bits has no effect





38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16 I2S PTC DAC AC ADC

Access RW RW RW RW RW Reset 0 0 0 0 0

Bit 15 14 13 12 11 10 9 8 TC4 TC3 TC2 TC1 TC0 TCC2 TCC1 TCC0

Access RW RW RW RW RW RW RW RW Reset 0 0 0 0 0 0 0 0

Bit 7 6 5 4 3 2 1 0 SERCOM5 SERCOM4 SERCOM3 SERCOM2 SERCOM1 SERCOM0 EVSYS

Access RW RW RW RW RW RW RW Reset 0 0 0 0 0 0 0

Bit 20 ndash I2SWriting a zero to these bits has no effect




Bit 19 ndash PTCWriting a zero to these bits has no effect




Bit 18 ndash DACWriting a zero to these bits has no effect



41



Bit 17 ndash ACWriting a zero to these bits has no effect




Bit 16 ndash ADCWriting a zero to these bits has no effect




Bit 15 ndash TC4Writing a zero to these bits has no effect











42











Bit 1 ndash EVSYSWriting a zero to these bits has no effect




Bits 1098 ndash TCCxWriting a zero to these bits has no effect




Bits 765432 ndash SERCOMxWriting a zero to these bits has no effect



43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48

8 Packaging Information

81 Thermal ConsiderationsRelated LinksJunction Temperature on page 49

811 Thermal Resistance DataThe following Table summarizes the thermal resistance data depending on the package

Table 8-1 Thermal Resistance Data

Package Type θJA θJC

32-pin TQFP 647degCW 231degCW



32-pin QFN 409degCW 152degCW



35-pin WLCSP TBD TBD


812 Junction TemperatureThe average chip-junction temperature TJ in degC can be obtained from the following

1 TJ = TA + (PD x θJA)2 TJ = TA + (PD x (θHEATSINK + θJC))

where

bull θJA = Package thermal resistance Junction-to-ambient (degCW) see Thermal Resistance Databull θJC = Package thermal resistance Junction-to-case thermal resistance (degCW) see Thermal

Resistance Databull θHEATSINK = Thermal resistance (degCW) specification of the external cooling devicebull PD = Device power consumption (W)bull TA = Ambient temperature (degC)

From the first equation the user can derive the estimated lifetime of the chip and decide if a coolingdevice is necessary or not If a cooling device is to be fitted on the chip the second equation should beused to compute the resulting average chip-junction temperature TJ in degC

Related LinksThermal Considerations on page 49


49

82 Package Drawings

821 64 pin TQFP

Table 8-2 Device and Package Maximum Weight

300 mg

Table 8-3 Package Characteristics

Moisture Sensitivity Level MSL3

Table 8-4 Package Reference

JEDEC Drawing Reference MS-026

JESD97 Classification E3


50

822 64 pin QFN

Note The exposed die attach pad is not connected electrically inside the device


200 mg

Table 8-6 Package Charateristics



JEDEC Drawing Reference MO-220



51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN

Note The exposed die attach pad is connected inside the device to GND and GNDANA


90 mg




57




829 35 ball WLCSP


62 mg




58




83 Soldering ProfileThe following table gives the recommended soldering profile from J-STD-20

Table 8-29

Profile Feature Green Package

Average Ramp-up Rate (217degC to peak) 3degCs max

Preheat Temperature 175degC plusmn25degC 150-200degC

Time Maintained Above 217degC 60-150s

Time within 5degC of Actual Peak Temperature 30s

Peak Temperature Range 260degC

Ramp-down Rate 6degCs max

Time 25degC to Peak Temperature 8 minutes max

A maximum of three reflow passes is allowed per component


59

Atmel Corporation 1600 Technology Drive San Jose CA 95110 USA T (+1)(408) 4410311 F (+1)(408) 4364200 | wwwatmelcom

copy 2016 Atmel Corporation Rev Atmel-42181J-SAM-D21_Datasheet_Summary-072016

Atmelreg Atmel logo and combinations thereof Enabling Unlimited Possibilitiesreg and others are registered trademarks or trademarks of Atmel Corporation in US andother countries ARMreg ARM Connectedreg logo and others are the registered trademarks or trademarks of ARM Ltd Other terms and product names may betrademarks of others

DISCLAIMER The information in this document is provided in connection with Atmel products No license express or implied by estoppel or otherwise to anyintellectual property right is granted by this document or in connection with the sale of Atmel products EXCEPT AS SET FORTH IN THE ATMEL TERMS ANDCONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS IMPLIEDOR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTY OF MERCHANTABILITYFITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT INDIRECTCONSEQUENTIAL PUNITIVE SPECIAL OR INCIDENTAL DAMAGES (INCLUDING WITHOUT LIMITATION DAMAGES FOR LOSS AND PROFITS BUSINESSINTERRUPTION OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT EVEN IF ATMEL HAS BEEN ADVISEDOF THE POSSIBILITY OF SUCH DAMAGES Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of thisdocument and reserves the right to make changes to specifications and products descriptions at any time without notice Atmel does not make any commitment toupdate the information contained herein Unless specifically provided otherwise Atmel products are not suitable for and shall not be used in automotiveapplications Atmel products are not intended authorized or warranted for use as components in applications intended to support or sustain life

SAFETY-CRITICAL MILITARY AND AUTOMOTIVE APPLICATIONS DISCLAIMER Atmel products are not designed for and will not be used in connection with anyapplications where the failure of such products would reasonably be expected to result in significant personal injury or death (ldquoSafety-Critical Applicationsrdquo) withoutan Atmel officers specific written consent Safety-Critical Applications include without limitation life support devices and systems equipment or systems for theoperation of nuclear facilities and weapons systems Atmel products are not designed nor intended for use in military or aerospace applications or environmentsunless specifically designated by Atmel as military-grade Atmel products are not designed nor intended for use in automotive applications unless specificallydesignated by Atmel as automotive-grade

Introduction

Features

Table of Contents

1 Description

2 Configuration Summary


31 SAM D21E

32 SAM D21G

33 SAM D21J

34 Device Identification

4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping


71 Cortex M0+ Processor

711 Cortex M0+ Configuration

712 Cortex-M0+ Peripherals

713 Cortex-M0+ Address Map

714 IO Interface

7141 Overview

7142 Description


721 Overview

722 Interrupt Line Mapping


731 Features

732 Overview


741 Features

742 Configuration

743 SRAM Quality of Service

75 AHB-APB Bridge


761 Overview

762 Register Description


76211 Write Protect Clear

76212 Write Protect Set








81 Thermal Considerations

811 Thermal Resistance Data

812 Junction Temperature

82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP

83 Soldering Profile

bull Peripheralsndash 12-channel Direct Memory Access Controller (DMAC)ndash 12-channel Event Systemndash Up to five 16-bit TimerCounters (TC) configurable as either

bull One 16-bit TC with two comparecapture channelsbull One 8-bit TC with two comparecapture channelsbull One 32-bit TC with two comparecapture channels by using two TCs

ndash Three 24-bit TimerCounters for Control (TCC) with extended functionsbull Up to four compare channels with optional complementary outputbull Generation of synchronized pulse width modulation (PWM) pattern across port pinsbull Deterministic fault protection fast decay and configurable dead-time between

complementary outputbull Dithering that increase resolution with up to 5 bit and reduce quantization error

ndash 32-bit Real Time Counter (RTC) with clockcalendar functionndash Watchdog Timer (WDT)ndash CRC-32 generatorndash One full-speed (12Mbps) Universal Serial Bus (USB) 20 interface

bull Embedded host and device functionbull Eight endpoints

ndash Up to six Serial Communication Interfaces (SERCOM) each configurable to operate aseither

bull USART with full-duplex and single-wire half-duplex configurationbull I2C up to 34MHzbull SPIbull LIN slave

ndash One two-channel Inter-IC Sound (I2S) interfacendash One 12-bit 350ksps Analog-to-Digital Converter (ADC) with up to 20 channels

bull Differential and single-ended inputbull 12x to 16x programmable gain stagebull Automatic offset and gain error compensationbull Oversampling and decimation in hardware to support 13- 14- 15- or 16-bit resolution

ndash 10-bit 350ksps Digital-to-Analog Converter (DAC)ndash Two Analog Comparators (AC) with window compare functionndash Peripheral Touch Controller (PTC)

bull 256-Channel capacitive touch and proximity sensingbull IO

ndash Up to 52 programmable IO pinsbull Drop in compatible with SAM D20bull Packages

ndash 64-pin TQFP QFN UFBGAndash 48-pin TQFP QFN WLCSPndash 32-pin TQFP QFN WLCSP

bull Operating Voltagendash 162V ndash 363V


2

Table of Contents

Introduction1

Features 1

1 Description4



4 Block Diagram 15


6 Product Mapping22










4


Pins 64 48 32


52 38 26

Flash 2561286432KB 2561286432KB 2561286432KB

SRAM 321684KB 321684KB 321684KB


5 3 3


2 2 2


3 3 3


842 842 842


USB interface 1 1 1


6 6 4


1 1 1


20 14 10



1 1 1


RTC alarms 1 1 1


two 16-bit values

One 32-bit value or

two 16-bit values

One 32-bit value or

two 16-bit values



16x16 12x10 10x6



5


Packages QFN

TQFP

UFBGA

QFN

TQFP

WLCSP

QFN

TQFP

WLCSP












6









+ DMA + USB

Product Series



Pin Count

Package Carrier

Package Grade

Package Type

18 = 256KB17 = 128KB16 = 64KB15 = 32KB












7



























8
































9





























10






























11

































12
























SAMD21J18A 0x00 0x10010000

SAMD21J17A 0x01 0x10010001

SAMD21J16A 0x02 0x10010002

SAMD21J15A 0x03 0x10010003

Reserved 0x04

SAMD21G18A 0x05 0x10010005

SAMD21G17A 0x06 0x10010006


13


SAMD21G16A 0x07 0x10010007

SAMD21G15A 0x08 0x10010008

Reserved 0x09

SAMD21E18A 0x0A 0x1001000A

SAMD21E17A 0x0B 0x1001000B

SAMD21E16A 0x0C 0x1001000C

SAMD21E15A 0x0D 0x1001000D


SAMD21J16B 0x20 0x10011420

SAMD21J15B 0x21 0x10011421

Reserved 0x22

SAMD21G16B 0x23 0x10011423

SAMD21G15B 0x24 0x10011424

Reserved 0x25

SAMD21E16B 0x26 0x10011426

SAMD21E15B 0x27 0x10011427




14

4 Block Diagram

6 x SERCOM

8 x Timer Counter

REAL TIME COUNTER

AHB-APB BRIDGE C

M


POR

T

PO

RT

WATCHDOG TIMER

SERIAL WIRESWDIO

S


SWCLK

DEVICE SERVICE

UNIT

AHB-APB BRIDGE A


AIN[190]

VREFA

AIN[30]

S

SRAM CONTROLLER

321684KB RAM

M

RESET CONTROLLER

SLEEP CONTROLLER

CLOCK CONTROLLER

POWER MANAGER

RESETN

5 x TIMER COUNTER

EVE

NT

SYST

EM

S

6 x SERCOM


SYSTEM CONTROLLER

XOUT XIN

XOUT32 XIN32

OSCULP32K

OSC32K

OSC8M

DFLL48M

BOD33

XOSC32K

XOSC

VREF

X[150]

Y[150]

PERIPHERAL TOUCH

CONTROLLER


AHB-APB BRIDGE B

VREFA

VOUT

10-bit DAC




EXTINT[150] NMI

GCLK_IO[70]

S

PAD0

WO1

PAD1PAD2PAD3

WO0

VREFB

2561286432KB NVM

NVM CONTROLLER

Cache

S

DMA

USB FSDEVICE

MINI-HOST

DP

DM


WOn

IOBUS

FDPLL96MDMA

DMA

DMA

DMA

DMA


SOUND CONTROLLER

SD[10]FS[10]

DMA

MIC

RO

TRAC

E BU

FFER

SOF 1KHZ

WO0WO1

(2)


CMP[10]




15

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

PA00 1PA01 2PA02 3PA03 4PB04 5PB05 6

GNDANA 7VDDANA 8


PA08

17PA

0918

PA10

19PA

1120

VDD

IO21

GN

D22

PB10

23PB

1124

PB12

25PB

1326

PB14

27PB

1528

PA12

29PA

1330

PA14

31PA

1532


PB22

49PB

2350

PA27

51R

ESET

52PA

2853

GN

D54

VDD

CO

RE

55VD

DIN

56PA

3057

PA31

58PB

3059

PB31

60PB

0061

PB01

62PB

0263

PB03

64



16

512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


Table of Contents

Introduction1

Features 1

1 Description4



4 Block Diagram 15


6 Product Mapping22










4


Pins 64 48 32


52 38 26

Flash 2561286432KB 2561286432KB 2561286432KB

SRAM 321684KB 321684KB 321684KB


5 3 3


2 2 2


3 3 3


842 842 842


USB interface 1 1 1


6 6 4


1 1 1


20 14 10



1 1 1


RTC alarms 1 1 1


two 16-bit values

One 32-bit value or

two 16-bit values

One 32-bit value or

two 16-bit values



16x16 12x10 10x6



5


Packages QFN

TQFP

UFBGA

QFN

TQFP

WLCSP

QFN

TQFP

WLCSP












6









+ DMA + USB

Product Series



Pin Count

Package Carrier

Package Grade

Package Type

18 = 256KB17 = 128KB16 = 64KB15 = 32KB












7



























8
































9





























10






























11

































12
























SAMD21J18A 0x00 0x10010000

SAMD21J17A 0x01 0x10010001

SAMD21J16A 0x02 0x10010002

SAMD21J15A 0x03 0x10010003

Reserved 0x04

SAMD21G18A 0x05 0x10010005

SAMD21G17A 0x06 0x10010006


13


SAMD21G16A 0x07 0x10010007

SAMD21G15A 0x08 0x10010008

Reserved 0x09

SAMD21E18A 0x0A 0x1001000A

SAMD21E17A 0x0B 0x1001000B

SAMD21E16A 0x0C 0x1001000C

SAMD21E15A 0x0D 0x1001000D


SAMD21J16B 0x20 0x10011420

SAMD21J15B 0x21 0x10011421

Reserved 0x22

SAMD21G16B 0x23 0x10011423

SAMD21G15B 0x24 0x10011424

Reserved 0x25

SAMD21E16B 0x26 0x10011426

SAMD21E15B 0x27 0x10011427




14

4 Block Diagram

6 x SERCOM

8 x Timer Counter

REAL TIME COUNTER

AHB-APB BRIDGE C

M


POR

T

PO

RT

WATCHDOG TIMER

SERIAL WIRESWDIO

S


SWCLK

DEVICE SERVICE

UNIT

AHB-APB BRIDGE A


AIN[190]

VREFA

AIN[30]

S

SRAM CONTROLLER

321684KB RAM

M

RESET CONTROLLER

SLEEP CONTROLLER

CLOCK CONTROLLER

POWER MANAGER

RESETN

5 x TIMER COUNTER

EVE

NT

SYST

EM

S

6 x SERCOM


SYSTEM CONTROLLER

XOUT XIN

XOUT32 XIN32

OSCULP32K

OSC32K

OSC8M

DFLL48M

BOD33

XOSC32K

XOSC

VREF

X[150]

Y[150]

PERIPHERAL TOUCH

CONTROLLER


AHB-APB BRIDGE B

VREFA

VOUT

10-bit DAC




EXTINT[150] NMI

GCLK_IO[70]

S

PAD0

WO1

PAD1PAD2PAD3

WO0

VREFB

2561286432KB NVM

NVM CONTROLLER

Cache

S

DMA

USB FSDEVICE

MINI-HOST

DP

DM


WOn

IOBUS

FDPLL96MDMA

DMA

DMA

DMA

DMA


SOUND CONTROLLER

SD[10]FS[10]

DMA

MIC

RO

TRAC

E BU

FFER

SOF 1KHZ

WO0WO1

(2)


CMP[10]




15

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

PA00 1PA01 2PA02 3PA03 4PB04 5PB05 6

GNDANA 7VDDANA 8


PA08

17PA

0918

PA10

19PA

1120

VDD

IO21

GN

D22

PB10

23PB

1124

PB12

25PB

1326

PB14

27PB

1528

PA12

29PA

1330

PA14

31PA

1532


PB22

49PB

2350

PA27

51R

ESET

52PA

2853

GN

D54

VDD

CO

RE

55VD

DIN

56PA

3057

PA31

58PB

3059

PB31

60PB

0061

PB01

62PB

0263

PB03

64



16

512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP









4


Pins 64 48 32


52 38 26

Flash 2561286432KB 2561286432KB 2561286432KB

SRAM 321684KB 321684KB 321684KB


5 3 3


2 2 2


3 3 3


842 842 842


USB interface 1 1 1


6 6 4


1 1 1


20 14 10



1 1 1


RTC alarms 1 1 1


two 16-bit values

One 32-bit value or

two 16-bit values

One 32-bit value or

two 16-bit values



16x16 12x10 10x6



5


Packages QFN

TQFP

UFBGA

QFN

TQFP

WLCSP

QFN

TQFP

WLCSP












6









+ DMA + USB

Product Series



Pin Count

Package Carrier

Package Grade

Package Type

18 = 256KB17 = 128KB16 = 64KB15 = 32KB












7



























8
































9





























10






























11

































12
























SAMD21J18A 0x00 0x10010000

SAMD21J17A 0x01 0x10010001

SAMD21J16A 0x02 0x10010002

SAMD21J15A 0x03 0x10010003

Reserved 0x04

SAMD21G18A 0x05 0x10010005

SAMD21G17A 0x06 0x10010006


13


SAMD21G16A 0x07 0x10010007

SAMD21G15A 0x08 0x10010008

Reserved 0x09

SAMD21E18A 0x0A 0x1001000A

SAMD21E17A 0x0B 0x1001000B

SAMD21E16A 0x0C 0x1001000C

SAMD21E15A 0x0D 0x1001000D


SAMD21J16B 0x20 0x10011420

SAMD21J15B 0x21 0x10011421

Reserved 0x22

SAMD21G16B 0x23 0x10011423

SAMD21G15B 0x24 0x10011424

Reserved 0x25

SAMD21E16B 0x26 0x10011426

SAMD21E15B 0x27 0x10011427




14

4 Block Diagram

6 x SERCOM

8 x Timer Counter

REAL TIME COUNTER

AHB-APB BRIDGE C

M


POR

T

PO

RT

WATCHDOG TIMER

SERIAL WIRESWDIO

S


SWCLK

DEVICE SERVICE

UNIT

AHB-APB BRIDGE A


AIN[190]

VREFA

AIN[30]

S

SRAM CONTROLLER

321684KB RAM

M

RESET CONTROLLER

SLEEP CONTROLLER

CLOCK CONTROLLER

POWER MANAGER

RESETN

5 x TIMER COUNTER

EVE

NT

SYST

EM

S

6 x SERCOM


SYSTEM CONTROLLER

XOUT XIN

XOUT32 XIN32

OSCULP32K

OSC32K

OSC8M

DFLL48M

BOD33

XOSC32K

XOSC

VREF

X[150]

Y[150]

PERIPHERAL TOUCH

CONTROLLER


AHB-APB BRIDGE B

VREFA

VOUT

10-bit DAC




EXTINT[150] NMI

GCLK_IO[70]

S

PAD0

WO1

PAD1PAD2PAD3

WO0

VREFB

2561286432KB NVM

NVM CONTROLLER

Cache

S

DMA

USB FSDEVICE

MINI-HOST

DP

DM


WOn

IOBUS

FDPLL96MDMA

DMA

DMA

DMA

DMA


SOUND CONTROLLER

SD[10]FS[10]

DMA

MIC

RO

TRAC

E BU

FFER

SOF 1KHZ

WO0WO1

(2)


CMP[10]




15

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

PA00 1PA01 2PA02 3PA03 4PB04 5PB05 6

GNDANA 7VDDANA 8


PA08

17PA

0918

PA10

19PA

1120

VDD

IO21

GN

D22

PB10

23PB

1124

PB12

25PB

1326

PB14

27PB

1528

PA12

29PA

1330

PA14

31PA

1532


PB22

49PB

2350

PA27

51R

ESET

52PA

2853

GN

D54

VDD

CO

RE

55VD

DIN

56PA

3057

PA31

58PB

3059

PB31

60PB

0061

PB01

62PB

0263

PB03

64



16

512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP



Pins 64 48 32


52 38 26

Flash 2561286432KB 2561286432KB 2561286432KB

SRAM 321684KB 321684KB 321684KB


5 3 3


2 2 2


3 3 3


842 842 842


USB interface 1 1 1


6 6 4


1 1 1


20 14 10



1 1 1


RTC alarms 1 1 1


two 16-bit values

One 32-bit value or

two 16-bit values

One 32-bit value or

two 16-bit values



16x16 12x10 10x6



5


Packages QFN

TQFP

UFBGA

QFN

TQFP

WLCSP

QFN

TQFP

WLCSP












6









+ DMA + USB

Product Series



Pin Count

Package Carrier

Package Grade

Package Type

18 = 256KB17 = 128KB16 = 64KB15 = 32KB












7



























8
































9





























10






























11

































12
























SAMD21J18A 0x00 0x10010000

SAMD21J17A 0x01 0x10010001

SAMD21J16A 0x02 0x10010002

SAMD21J15A 0x03 0x10010003

Reserved 0x04

SAMD21G18A 0x05 0x10010005

SAMD21G17A 0x06 0x10010006


13


SAMD21G16A 0x07 0x10010007

SAMD21G15A 0x08 0x10010008

Reserved 0x09

SAMD21E18A 0x0A 0x1001000A

SAMD21E17A 0x0B 0x1001000B

SAMD21E16A 0x0C 0x1001000C

SAMD21E15A 0x0D 0x1001000D


SAMD21J16B 0x20 0x10011420

SAMD21J15B 0x21 0x10011421

Reserved 0x22

SAMD21G16B 0x23 0x10011423

SAMD21G15B 0x24 0x10011424

Reserved 0x25

SAMD21E16B 0x26 0x10011426

SAMD21E15B 0x27 0x10011427




14

4 Block Diagram

6 x SERCOM

8 x Timer Counter

REAL TIME COUNTER

AHB-APB BRIDGE C

M


POR

T

PO

RT

WATCHDOG TIMER

SERIAL WIRESWDIO

S


SWCLK

DEVICE SERVICE

UNIT

AHB-APB BRIDGE A


AIN[190]

VREFA

AIN[30]

S

SRAM CONTROLLER

321684KB RAM

M

RESET CONTROLLER

SLEEP CONTROLLER

CLOCK CONTROLLER

POWER MANAGER

RESETN

5 x TIMER COUNTER

EVE

NT

SYST

EM

S

6 x SERCOM


SYSTEM CONTROLLER

XOUT XIN

XOUT32 XIN32

OSCULP32K

OSC32K

OSC8M

DFLL48M

BOD33

XOSC32K

XOSC

VREF

X[150]

Y[150]

PERIPHERAL TOUCH

CONTROLLER


AHB-APB BRIDGE B

VREFA

VOUT

10-bit DAC




EXTINT[150] NMI

GCLK_IO[70]

S

PAD0

WO1

PAD1PAD2PAD3

WO0

VREFB

2561286432KB NVM

NVM CONTROLLER

Cache

S

DMA

USB FSDEVICE

MINI-HOST

DP

DM


WOn

IOBUS

FDPLL96MDMA

DMA

DMA

DMA

DMA


SOUND CONTROLLER

SD[10]FS[10]

DMA

MIC

RO

TRAC

E BU

FFER

SOF 1KHZ

WO0WO1

(2)


CMP[10]




15

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

PA00 1PA01 2PA02 3PA03 4PB04 5PB05 6

GNDANA 7VDDANA 8


PA08

17PA

0918

PA10

19PA

1120

VDD

IO21

GN

D22

PB10

23PB

1124

PB12

25PB

1326

PB14

27PB

1528

PA12

29PA

1330

PA14

31PA

1532


PB22

49PB

2350

PA27

51R

ESET

52PA

2853

GN

D54

VDD

CO

RE

55VD

DIN

56PA

3057

PA31

58PB

3059

PB31

60PB

0061

PB01

62PB

0263

PB03

64



16

512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP



Packages QFN

TQFP

UFBGA

QFN

TQFP

WLCSP

QFN

TQFP

WLCSP












6









+ DMA + USB

Product Series



Pin Count

Package Carrier

Package Grade

Package Type

18 = 256KB17 = 128KB16 = 64KB15 = 32KB












7



























8
































9





























10






























11

































12
























SAMD21J18A 0x00 0x10010000

SAMD21J17A 0x01 0x10010001

SAMD21J16A 0x02 0x10010002

SAMD21J15A 0x03 0x10010003

Reserved 0x04

SAMD21G18A 0x05 0x10010005

SAMD21G17A 0x06 0x10010006


13


SAMD21G16A 0x07 0x10010007

SAMD21G15A 0x08 0x10010008

Reserved 0x09

SAMD21E18A 0x0A 0x1001000A

SAMD21E17A 0x0B 0x1001000B

SAMD21E16A 0x0C 0x1001000C

SAMD21E15A 0x0D 0x1001000D


SAMD21J16B 0x20 0x10011420

SAMD21J15B 0x21 0x10011421

Reserved 0x22

SAMD21G16B 0x23 0x10011423

SAMD21G15B 0x24 0x10011424

Reserved 0x25

SAMD21E16B 0x26 0x10011426

SAMD21E15B 0x27 0x10011427




14

4 Block Diagram

6 x SERCOM

8 x Timer Counter

REAL TIME COUNTER

AHB-APB BRIDGE C

M


POR

T

PO

RT

WATCHDOG TIMER

SERIAL WIRESWDIO

S


SWCLK

DEVICE SERVICE

UNIT

AHB-APB BRIDGE A


AIN[190]

VREFA

AIN[30]

S

SRAM CONTROLLER

321684KB RAM

M

RESET CONTROLLER

SLEEP CONTROLLER

CLOCK CONTROLLER

POWER MANAGER

RESETN

5 x TIMER COUNTER

EVE

NT

SYST

EM

S

6 x SERCOM


SYSTEM CONTROLLER

XOUT XIN

XOUT32 XIN32

OSCULP32K

OSC32K

OSC8M

DFLL48M

BOD33

XOSC32K

XOSC

VREF

X[150]

Y[150]

PERIPHERAL TOUCH

CONTROLLER


AHB-APB BRIDGE B

VREFA

VOUT

10-bit DAC




EXTINT[150] NMI

GCLK_IO[70]

S

PAD0

WO1

PAD1PAD2PAD3

WO0

VREFB

2561286432KB NVM

NVM CONTROLLER

Cache

S

DMA

USB FSDEVICE

MINI-HOST

DP

DM


WOn

IOBUS

FDPLL96MDMA

DMA

DMA

DMA

DMA


SOUND CONTROLLER

SD[10]FS[10]

DMA

MIC

RO

TRAC

E BU

FFER

SOF 1KHZ

WO0WO1

(2)


CMP[10]




15

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

PA00 1PA01 2PA02 3PA03 4PB04 5PB05 6

GNDANA 7VDDANA 8


PA08

17PA

0918

PA10

19PA

1120

VDD

IO21

GN

D22

PB10

23PB

1124

PB12

25PB

1326

PB14

27PB

1528

PA12

29PA

1330

PA14

31PA

1532


PB22

49PB

2350

PA27

51R

ESET

52PA

2853

GN

D54

VDD

CO

RE

55VD

DIN

56PA

3057

PA31

58PB

3059

PB31

60PB

0061

PB01

62PB

0263

PB03

64



16

512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP










+ DMA + USB

Product Series



Pin Count

Package Carrier

Package Grade

Package Type

18 = 256KB17 = 128KB16 = 64KB15 = 32KB












7



























8
































9





























10






























11

































12
























SAMD21J18A 0x00 0x10010000

SAMD21J17A 0x01 0x10010001

SAMD21J16A 0x02 0x10010002

SAMD21J15A 0x03 0x10010003

Reserved 0x04

SAMD21G18A 0x05 0x10010005

SAMD21G17A 0x06 0x10010006


13


SAMD21G16A 0x07 0x10010007

SAMD21G15A 0x08 0x10010008

Reserved 0x09

SAMD21E18A 0x0A 0x1001000A

SAMD21E17A 0x0B 0x1001000B

SAMD21E16A 0x0C 0x1001000C

SAMD21E15A 0x0D 0x1001000D


SAMD21J16B 0x20 0x10011420

SAMD21J15B 0x21 0x10011421

Reserved 0x22

SAMD21G16B 0x23 0x10011423

SAMD21G15B 0x24 0x10011424

Reserved 0x25

SAMD21E16B 0x26 0x10011426

SAMD21E15B 0x27 0x10011427




14

4 Block Diagram

6 x SERCOM

8 x Timer Counter

REAL TIME COUNTER

AHB-APB BRIDGE C

M


POR

T

PO

RT

WATCHDOG TIMER

SERIAL WIRESWDIO

S


SWCLK

DEVICE SERVICE

UNIT

AHB-APB BRIDGE A


AIN[190]

VREFA

AIN[30]

S

SRAM CONTROLLER

321684KB RAM

M

RESET CONTROLLER

SLEEP CONTROLLER

CLOCK CONTROLLER

POWER MANAGER

RESETN

5 x TIMER COUNTER

EVE

NT

SYST

EM

S

6 x SERCOM


SYSTEM CONTROLLER

XOUT XIN

XOUT32 XIN32

OSCULP32K

OSC32K

OSC8M

DFLL48M

BOD33

XOSC32K

XOSC

VREF

X[150]

Y[150]

PERIPHERAL TOUCH

CONTROLLER


AHB-APB BRIDGE B

VREFA

VOUT

10-bit DAC




EXTINT[150] NMI

GCLK_IO[70]

S

PAD0

WO1

PAD1PAD2PAD3

WO0

VREFB

2561286432KB NVM

NVM CONTROLLER

Cache

S

DMA

USB FSDEVICE

MINI-HOST

DP

DM


WOn

IOBUS

FDPLL96MDMA

DMA

DMA

DMA

DMA


SOUND CONTROLLER

SD[10]FS[10]

DMA

MIC

RO

TRAC

E BU

FFER

SOF 1KHZ

WO0WO1

(2)


CMP[10]




15

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

PA00 1PA01 2PA02 3PA03 4PB04 5PB05 6

GNDANA 7VDDANA 8


PA08

17PA

0918

PA10

19PA

1120

VDD

IO21

GN

D22

PB10

23PB

1124

PB12

25PB

1326

PB14

27PB

1528

PA12

29PA

1330

PA14

31PA

1532


PB22

49PB

2350

PA27

51R

ESET

52PA

2853

GN

D54

VDD

CO

RE

55VD

DIN

56PA

3057

PA31

58PB

3059

PB31

60PB

0061

PB01

62PB

0263

PB03

64



16

512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP




























8
































9





























10






























11

































12
























SAMD21J18A 0x00 0x10010000

SAMD21J17A 0x01 0x10010001

SAMD21J16A 0x02 0x10010002

SAMD21J15A 0x03 0x10010003

Reserved 0x04

SAMD21G18A 0x05 0x10010005

SAMD21G17A 0x06 0x10010006


13


SAMD21G16A 0x07 0x10010007

SAMD21G15A 0x08 0x10010008

Reserved 0x09

SAMD21E18A 0x0A 0x1001000A

SAMD21E17A 0x0B 0x1001000B

SAMD21E16A 0x0C 0x1001000C

SAMD21E15A 0x0D 0x1001000D


SAMD21J16B 0x20 0x10011420

SAMD21J15B 0x21 0x10011421

Reserved 0x22

SAMD21G16B 0x23 0x10011423

SAMD21G15B 0x24 0x10011424

Reserved 0x25

SAMD21E16B 0x26 0x10011426

SAMD21E15B 0x27 0x10011427




14

4 Block Diagram

6 x SERCOM

8 x Timer Counter

REAL TIME COUNTER

AHB-APB BRIDGE C

M


POR

T

PO

RT

WATCHDOG TIMER

SERIAL WIRESWDIO

S


SWCLK

DEVICE SERVICE

UNIT

AHB-APB BRIDGE A


AIN[190]

VREFA

AIN[30]

S

SRAM CONTROLLER

321684KB RAM

M

RESET CONTROLLER

SLEEP CONTROLLER

CLOCK CONTROLLER

POWER MANAGER

RESETN

5 x TIMER COUNTER

EVE

NT

SYST

EM

S

6 x SERCOM


SYSTEM CONTROLLER

XOUT XIN

XOUT32 XIN32

OSCULP32K

OSC32K

OSC8M

DFLL48M

BOD33

XOSC32K

XOSC

VREF

X[150]

Y[150]

PERIPHERAL TOUCH

CONTROLLER


AHB-APB BRIDGE B

VREFA

VOUT

10-bit DAC




EXTINT[150] NMI

GCLK_IO[70]

S

PAD0

WO1

PAD1PAD2PAD3

WO0

VREFB

2561286432KB NVM

NVM CONTROLLER

Cache

S

DMA

USB FSDEVICE

MINI-HOST

DP

DM


WOn

IOBUS

FDPLL96MDMA

DMA

DMA

DMA

DMA


SOUND CONTROLLER

SD[10]FS[10]

DMA

MIC

RO

TRAC

E BU

FFER

SOF 1KHZ

WO0WO1

(2)


CMP[10]




15

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

PA00 1PA01 2PA02 3PA03 4PB04 5PB05 6

GNDANA 7VDDANA 8


PA08

17PA

0918

PA10

19PA

1120

VDD

IO21

GN

D22

PB10

23PB

1124

PB12

25PB

1326

PB14

27PB

1528

PA12

29PA

1330

PA14

31PA

1532


PB22

49PB

2350

PA27

51R

ESET

52PA

2853

GN

D54

VDD

CO

RE

55VD

DIN

56PA

3057

PA31

58PB

3059

PB31

60PB

0061

PB01

62PB

0263

PB03

64



16

512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP

































9





























10






























11

































12
























SAMD21J18A 0x00 0x10010000

SAMD21J17A 0x01 0x10010001

SAMD21J16A 0x02 0x10010002

SAMD21J15A 0x03 0x10010003

Reserved 0x04

SAMD21G18A 0x05 0x10010005

SAMD21G17A 0x06 0x10010006


13


SAMD21G16A 0x07 0x10010007

SAMD21G15A 0x08 0x10010008

Reserved 0x09

SAMD21E18A 0x0A 0x1001000A

SAMD21E17A 0x0B 0x1001000B

SAMD21E16A 0x0C 0x1001000C

SAMD21E15A 0x0D 0x1001000D


SAMD21J16B 0x20 0x10011420

SAMD21J15B 0x21 0x10011421

Reserved 0x22

SAMD21G16B 0x23 0x10011423

SAMD21G15B 0x24 0x10011424

Reserved 0x25

SAMD21E16B 0x26 0x10011426

SAMD21E15B 0x27 0x10011427




14

4 Block Diagram

6 x SERCOM

8 x Timer Counter

REAL TIME COUNTER

AHB-APB BRIDGE C

M


POR

T

PO

RT

WATCHDOG TIMER

SERIAL WIRESWDIO

S


SWCLK

DEVICE SERVICE

UNIT

AHB-APB BRIDGE A


AIN[190]

VREFA

AIN[30]

S

SRAM CONTROLLER

321684KB RAM

M

RESET CONTROLLER

SLEEP CONTROLLER

CLOCK CONTROLLER

POWER MANAGER

RESETN

5 x TIMER COUNTER

EVE

NT

SYST

EM

S

6 x SERCOM


SYSTEM CONTROLLER

XOUT XIN

XOUT32 XIN32

OSCULP32K

OSC32K

OSC8M

DFLL48M

BOD33

XOSC32K

XOSC

VREF

X[150]

Y[150]

PERIPHERAL TOUCH

CONTROLLER


AHB-APB BRIDGE B

VREFA

VOUT

10-bit DAC




EXTINT[150] NMI

GCLK_IO[70]

S

PAD0

WO1

PAD1PAD2PAD3

WO0

VREFB

2561286432KB NVM

NVM CONTROLLER

Cache

S

DMA

USB FSDEVICE

MINI-HOST

DP

DM


WOn

IOBUS

FDPLL96MDMA

DMA

DMA

DMA

DMA


SOUND CONTROLLER

SD[10]FS[10]

DMA

MIC

RO

TRAC

E BU

FFER

SOF 1KHZ

WO0WO1

(2)


CMP[10]




15

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

PA00 1PA01 2PA02 3PA03 4PB04 5PB05 6

GNDANA 7VDDANA 8


PA08

17PA

0918

PA10

19PA

1120

VDD

IO21

GN

D22

PB10

23PB

1124

PB12

25PB

1326

PB14

27PB

1528

PA12

29PA

1330

PA14

31PA

1532


PB22

49PB

2350

PA27

51R

ESET

52PA

2853

GN

D54

VDD

CO

RE

55VD

DIN

56PA

3057

PA31

58PB

3059

PB31

60PB

0061

PB01

62PB

0263

PB03

64



16

512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP






























10






























11

































12
























SAMD21J18A 0x00 0x10010000

SAMD21J17A 0x01 0x10010001

SAMD21J16A 0x02 0x10010002

SAMD21J15A 0x03 0x10010003

Reserved 0x04

SAMD21G18A 0x05 0x10010005

SAMD21G17A 0x06 0x10010006


13


SAMD21G16A 0x07 0x10010007

SAMD21G15A 0x08 0x10010008

Reserved 0x09

SAMD21E18A 0x0A 0x1001000A

SAMD21E17A 0x0B 0x1001000B

SAMD21E16A 0x0C 0x1001000C

SAMD21E15A 0x0D 0x1001000D


SAMD21J16B 0x20 0x10011420

SAMD21J15B 0x21 0x10011421

Reserved 0x22

SAMD21G16B 0x23 0x10011423

SAMD21G15B 0x24 0x10011424

Reserved 0x25

SAMD21E16B 0x26 0x10011426

SAMD21E15B 0x27 0x10011427




14

4 Block Diagram

6 x SERCOM

8 x Timer Counter

REAL TIME COUNTER

AHB-APB BRIDGE C

M


POR

T

PO

RT

WATCHDOG TIMER

SERIAL WIRESWDIO

S


SWCLK

DEVICE SERVICE

UNIT

AHB-APB BRIDGE A


AIN[190]

VREFA

AIN[30]

S

SRAM CONTROLLER

321684KB RAM

M

RESET CONTROLLER

SLEEP CONTROLLER

CLOCK CONTROLLER

POWER MANAGER

RESETN

5 x TIMER COUNTER

EVE

NT

SYST

EM

S

6 x SERCOM


SYSTEM CONTROLLER

XOUT XIN

XOUT32 XIN32

OSCULP32K

OSC32K

OSC8M

DFLL48M

BOD33

XOSC32K

XOSC

VREF

X[150]

Y[150]

PERIPHERAL TOUCH

CONTROLLER


AHB-APB BRIDGE B

VREFA

VOUT

10-bit DAC




EXTINT[150] NMI

GCLK_IO[70]

S

PAD0

WO1

PAD1PAD2PAD3

WO0

VREFB

2561286432KB NVM

NVM CONTROLLER

Cache

S

DMA

USB FSDEVICE

MINI-HOST

DP

DM


WOn

IOBUS

FDPLL96MDMA

DMA

DMA

DMA

DMA


SOUND CONTROLLER

SD[10]FS[10]

DMA

MIC

RO

TRAC

E BU

FFER

SOF 1KHZ

WO0WO1

(2)


CMP[10]




15

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

PA00 1PA01 2PA02 3PA03 4PB04 5PB05 6

GNDANA 7VDDANA 8


PA08

17PA

0918

PA10

19PA

1120

VDD

IO21

GN

D22

PB10

23PB

1124

PB12

25PB

1326

PB14

27PB

1528

PA12

29PA

1330

PA14

31PA

1532


PB22

49PB

2350

PA27

51R

ESET

52PA

2853

GN

D54

VDD

CO

RE

55VD

DIN

56PA

3057

PA31

58PB

3059

PB31

60PB

0061

PB01

62PB

0263

PB03

64



16

512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP































11

































12
























SAMD21J18A 0x00 0x10010000

SAMD21J17A 0x01 0x10010001

SAMD21J16A 0x02 0x10010002

SAMD21J15A 0x03 0x10010003

Reserved 0x04

SAMD21G18A 0x05 0x10010005

SAMD21G17A 0x06 0x10010006


13


SAMD21G16A 0x07 0x10010007

SAMD21G15A 0x08 0x10010008

Reserved 0x09

SAMD21E18A 0x0A 0x1001000A

SAMD21E17A 0x0B 0x1001000B

SAMD21E16A 0x0C 0x1001000C

SAMD21E15A 0x0D 0x1001000D


SAMD21J16B 0x20 0x10011420

SAMD21J15B 0x21 0x10011421

Reserved 0x22

SAMD21G16B 0x23 0x10011423

SAMD21G15B 0x24 0x10011424

Reserved 0x25

SAMD21E16B 0x26 0x10011426

SAMD21E15B 0x27 0x10011427




14

4 Block Diagram

6 x SERCOM

8 x Timer Counter

REAL TIME COUNTER

AHB-APB BRIDGE C

M


POR

T

PO

RT

WATCHDOG TIMER

SERIAL WIRESWDIO

S


SWCLK

DEVICE SERVICE

UNIT

AHB-APB BRIDGE A


AIN[190]

VREFA

AIN[30]

S

SRAM CONTROLLER

321684KB RAM

M

RESET CONTROLLER

SLEEP CONTROLLER

CLOCK CONTROLLER

POWER MANAGER

RESETN

5 x TIMER COUNTER

EVE

NT

SYST

EM

S

6 x SERCOM


SYSTEM CONTROLLER

XOUT XIN

XOUT32 XIN32

OSCULP32K

OSC32K

OSC8M

DFLL48M

BOD33

XOSC32K

XOSC

VREF

X[150]

Y[150]

PERIPHERAL TOUCH

CONTROLLER


AHB-APB BRIDGE B

VREFA

VOUT

10-bit DAC




EXTINT[150] NMI

GCLK_IO[70]

S

PAD0

WO1

PAD1PAD2PAD3

WO0

VREFB

2561286432KB NVM

NVM CONTROLLER

Cache

S

DMA

USB FSDEVICE

MINI-HOST

DP

DM


WOn

IOBUS

FDPLL96MDMA

DMA

DMA

DMA

DMA


SOUND CONTROLLER

SD[10]FS[10]

DMA

MIC

RO

TRAC

E BU

FFER

SOF 1KHZ

WO0WO1

(2)


CMP[10]




15

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

PA00 1PA01 2PA02 3PA03 4PB04 5PB05 6

GNDANA 7VDDANA 8


PA08

17PA

0918

PA10

19PA

1120

VDD

IO21

GN

D22

PB10

23PB

1124

PB12

25PB

1326

PB14

27PB

1528

PA12

29PA

1330

PA14

31PA

1532


PB22

49PB

2350

PA27

51R

ESET

52PA

2853

GN

D54

VDD

CO

RE

55VD

DIN

56PA

3057

PA31

58PB

3059

PB31

60PB

0061

PB01

62PB

0263

PB03

64



16

512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


































12
























SAMD21J18A 0x00 0x10010000

SAMD21J17A 0x01 0x10010001

SAMD21J16A 0x02 0x10010002

SAMD21J15A 0x03 0x10010003

Reserved 0x04

SAMD21G18A 0x05 0x10010005

SAMD21G17A 0x06 0x10010006


13


SAMD21G16A 0x07 0x10010007

SAMD21G15A 0x08 0x10010008

Reserved 0x09

SAMD21E18A 0x0A 0x1001000A

SAMD21E17A 0x0B 0x1001000B

SAMD21E16A 0x0C 0x1001000C

SAMD21E15A 0x0D 0x1001000D


SAMD21J16B 0x20 0x10011420

SAMD21J15B 0x21 0x10011421

Reserved 0x22

SAMD21G16B 0x23 0x10011423

SAMD21G15B 0x24 0x10011424

Reserved 0x25

SAMD21E16B 0x26 0x10011426

SAMD21E15B 0x27 0x10011427




14

4 Block Diagram

6 x SERCOM

8 x Timer Counter

REAL TIME COUNTER

AHB-APB BRIDGE C

M


POR

T

PO

RT

WATCHDOG TIMER

SERIAL WIRESWDIO

S


SWCLK

DEVICE SERVICE

UNIT

AHB-APB BRIDGE A


AIN[190]

VREFA

AIN[30]

S

SRAM CONTROLLER

321684KB RAM

M

RESET CONTROLLER

SLEEP CONTROLLER

CLOCK CONTROLLER

POWER MANAGER

RESETN

5 x TIMER COUNTER

EVE

NT

SYST

EM

S

6 x SERCOM


SYSTEM CONTROLLER

XOUT XIN

XOUT32 XIN32

OSCULP32K

OSC32K

OSC8M

DFLL48M

BOD33

XOSC32K

XOSC

VREF

X[150]

Y[150]

PERIPHERAL TOUCH

CONTROLLER


AHB-APB BRIDGE B

VREFA

VOUT

10-bit DAC




EXTINT[150] NMI

GCLK_IO[70]

S

PAD0

WO1

PAD1PAD2PAD3

WO0

VREFB

2561286432KB NVM

NVM CONTROLLER

Cache

S

DMA

USB FSDEVICE

MINI-HOST

DP

DM


WOn

IOBUS

FDPLL96MDMA

DMA

DMA

DMA

DMA


SOUND CONTROLLER

SD[10]FS[10]

DMA

MIC

RO

TRAC

E BU

FFER

SOF 1KHZ

WO0WO1

(2)


CMP[10]




15

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

PA00 1PA01 2PA02 3PA03 4PB04 5PB05 6

GNDANA 7VDDANA 8


PA08

17PA

0918

PA10

19PA

1120

VDD

IO21

GN

D22

PB10

23PB

1124

PB12

25PB

1326

PB14

27PB

1528

PA12

29PA

1330

PA14

31PA

1532


PB22

49PB

2350

PA27

51R

ESET

52PA

2853

GN

D54

VDD

CO

RE

55VD

DIN

56PA

3057

PA31

58PB

3059

PB31

60PB

0061

PB01

62PB

0263

PB03

64



16

512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP

























SAMD21J18A 0x00 0x10010000

SAMD21J17A 0x01 0x10010001

SAMD21J16A 0x02 0x10010002

SAMD21J15A 0x03 0x10010003

Reserved 0x04

SAMD21G18A 0x05 0x10010005

SAMD21G17A 0x06 0x10010006


13


SAMD21G16A 0x07 0x10010007

SAMD21G15A 0x08 0x10010008

Reserved 0x09

SAMD21E18A 0x0A 0x1001000A

SAMD21E17A 0x0B 0x1001000B

SAMD21E16A 0x0C 0x1001000C

SAMD21E15A 0x0D 0x1001000D


SAMD21J16B 0x20 0x10011420

SAMD21J15B 0x21 0x10011421

Reserved 0x22

SAMD21G16B 0x23 0x10011423

SAMD21G15B 0x24 0x10011424

Reserved 0x25

SAMD21E16B 0x26 0x10011426

SAMD21E15B 0x27 0x10011427




14

4 Block Diagram

6 x SERCOM

8 x Timer Counter

REAL TIME COUNTER

AHB-APB BRIDGE C

M


POR

T

PO

RT

WATCHDOG TIMER

SERIAL WIRESWDIO

S


SWCLK

DEVICE SERVICE

UNIT

AHB-APB BRIDGE A


AIN[190]

VREFA

AIN[30]

S

SRAM CONTROLLER

321684KB RAM

M

RESET CONTROLLER

SLEEP CONTROLLER

CLOCK CONTROLLER

POWER MANAGER

RESETN

5 x TIMER COUNTER

EVE

NT

SYST

EM

S

6 x SERCOM


SYSTEM CONTROLLER

XOUT XIN

XOUT32 XIN32

OSCULP32K

OSC32K

OSC8M

DFLL48M

BOD33

XOSC32K

XOSC

VREF

X[150]

Y[150]

PERIPHERAL TOUCH

CONTROLLER


AHB-APB BRIDGE B

VREFA

VOUT

10-bit DAC




EXTINT[150] NMI

GCLK_IO[70]

S

PAD0

WO1

PAD1PAD2PAD3

WO0

VREFB

2561286432KB NVM

NVM CONTROLLER

Cache

S

DMA

USB FSDEVICE

MINI-HOST

DP

DM


WOn

IOBUS

FDPLL96MDMA

DMA

DMA

DMA

DMA


SOUND CONTROLLER

SD[10]FS[10]

DMA

MIC

RO

TRAC

E BU

FFER

SOF 1KHZ

WO0WO1

(2)


CMP[10]




15

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

PA00 1PA01 2PA02 3PA03 4PB04 5PB05 6

GNDANA 7VDDANA 8


PA08

17PA

0918

PA10

19PA

1120

VDD

IO21

GN

D22

PB10

23PB

1124

PB12

25PB

1326

PB14

27PB

1528

PA12

29PA

1330

PA14

31PA

1532


PB22

49PB

2350

PA27

51R

ESET

52PA

2853

GN

D54

VDD

CO

RE

55VD

DIN

56PA

3057

PA31

58PB

3059

PB31

60PB

0061

PB01

62PB

0263

PB03

64



16

512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP



SAMD21G16A 0x07 0x10010007

SAMD21G15A 0x08 0x10010008

Reserved 0x09

SAMD21E18A 0x0A 0x1001000A

SAMD21E17A 0x0B 0x1001000B

SAMD21E16A 0x0C 0x1001000C

SAMD21E15A 0x0D 0x1001000D


SAMD21J16B 0x20 0x10011420

SAMD21J15B 0x21 0x10011421

Reserved 0x22

SAMD21G16B 0x23 0x10011423

SAMD21G15B 0x24 0x10011424

Reserved 0x25

SAMD21E16B 0x26 0x10011426

SAMD21E15B 0x27 0x10011427




14

4 Block Diagram

6 x SERCOM

8 x Timer Counter

REAL TIME COUNTER

AHB-APB BRIDGE C

M


POR

T

PO

RT

WATCHDOG TIMER

SERIAL WIRESWDIO

S


SWCLK

DEVICE SERVICE

UNIT

AHB-APB BRIDGE A


AIN[190]

VREFA

AIN[30]

S

SRAM CONTROLLER

321684KB RAM

M

RESET CONTROLLER

SLEEP CONTROLLER

CLOCK CONTROLLER

POWER MANAGER

RESETN

5 x TIMER COUNTER

EVE

NT

SYST

EM

S

6 x SERCOM


SYSTEM CONTROLLER

XOUT XIN

XOUT32 XIN32

OSCULP32K

OSC32K

OSC8M

DFLL48M

BOD33

XOSC32K

XOSC

VREF

X[150]

Y[150]

PERIPHERAL TOUCH

CONTROLLER


AHB-APB BRIDGE B

VREFA

VOUT

10-bit DAC




EXTINT[150] NMI

GCLK_IO[70]

S

PAD0

WO1

PAD1PAD2PAD3

WO0

VREFB

2561286432KB NVM

NVM CONTROLLER

Cache

S

DMA

USB FSDEVICE

MINI-HOST

DP

DM


WOn

IOBUS

FDPLL96MDMA

DMA

DMA

DMA

DMA


SOUND CONTROLLER

SD[10]FS[10]

DMA

MIC

RO

TRAC

E BU

FFER

SOF 1KHZ

WO0WO1

(2)


CMP[10]




15

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

PA00 1PA01 2PA02 3PA03 4PB04 5PB05 6

GNDANA 7VDDANA 8


PA08

17PA

0918

PA10

19PA

1120

VDD

IO21

GN

D22

PB10

23PB

1124

PB12

25PB

1326

PB14

27PB

1528

PA12

29PA

1330

PA14

31PA

1532


PB22

49PB

2350

PA27

51R

ESET

52PA

2853

GN

D54

VDD

CO

RE

55VD

DIN

56PA

3057

PA31

58PB

3059

PB31

60PB

0061

PB01

62PB

0263

PB03

64



16

512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


4 Block Diagram

6 x SERCOM

8 x Timer Counter

REAL TIME COUNTER

AHB-APB BRIDGE C

M


POR

T

PO

RT

WATCHDOG TIMER

SERIAL WIRESWDIO

S


SWCLK

DEVICE SERVICE

UNIT

AHB-APB BRIDGE A


AIN[190]

VREFA

AIN[30]

S

SRAM CONTROLLER

321684KB RAM

M

RESET CONTROLLER

SLEEP CONTROLLER

CLOCK CONTROLLER

POWER MANAGER

RESETN

5 x TIMER COUNTER

EVE

NT

SYST

EM

S

6 x SERCOM


SYSTEM CONTROLLER

XOUT XIN

XOUT32 XIN32

OSCULP32K

OSC32K

OSC8M

DFLL48M

BOD33

XOSC32K

XOSC

VREF

X[150]

Y[150]

PERIPHERAL TOUCH

CONTROLLER


AHB-APB BRIDGE B

VREFA

VOUT

10-bit DAC




EXTINT[150] NMI

GCLK_IO[70]

S

PAD0

WO1

PAD1PAD2PAD3

WO0

VREFB

2561286432KB NVM

NVM CONTROLLER

Cache

S

DMA

USB FSDEVICE

MINI-HOST

DP

DM


WOn

IOBUS

FDPLL96MDMA

DMA

DMA

DMA

DMA


SOUND CONTROLLER

SD[10]FS[10]

DMA

MIC

RO

TRAC

E BU

FFER

SOF 1KHZ

WO0WO1

(2)


CMP[10]




15

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

PA00 1PA01 2PA02 3PA03 4PB04 5PB05 6

GNDANA 7VDDANA 8


PA08

17PA

0918

PA10

19PA

1120

VDD

IO21

GN

D22

PB10

23PB

1124

PB12

25PB

1326

PB14

27PB

1528

PA12

29PA

1330

PA14

31PA

1532


PB22

49PB

2350

PA27

51R

ESET

52PA

2853

GN

D54

VDD

CO

RE

55VD

DIN

56PA

3057

PA31

58PB

3059

PB31

60PB

0061

PB01

62PB

0263

PB03

64



16

512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


5 Pinout

51 SAM D21J

511 QFN64 TQFP64

PA00 1PA01 2PA02 3PA03 4PB04 5PB05 6

GNDANA 7VDDANA 8


PA08

17PA

0918

PA10

19PA

1120

VDD

IO21

GN

D22

PB10

23PB

1124

PB12

25PB

1326

PB14

27PB

1528

PA12

29PA

1330

PA14

31PA

1532


PB22

49PB

2350

PA27

51R

ESET

52PA

2853

GN

D54

VDD

CO

RE

55VD

DIN

56PA

3057

PA31

58PB

3059

PB31

60PB

0061

PB01

62PB

0263

PB03

64



16

512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


512 UFBGA64


17

52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


52 SAM D21G

521 QFN48 TQFP48

PA21

PA00 1PA01 2PA02 3PA03 4

GNDANA 5VDDANA 6

PB08 7PB09 8PA04 9PA05 10PA06 11PA07 12

PA08

13PA

0914

PA10

15PA

1116

VDD

IO17

GN

D18

PB10

19PB

1120

PA12

21PA

1322

PA14

23PA

1524


30PA2029PA1928PA1827PA1726PA1625

PB22

37PB

2338

PA27

39R

ESET

40PA

2841

GN

D42

VDD

CO

RE

43VD

DIN

44PA

3045

PA31

46PB

0247

PB03

48



18

522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


522 WLCSP45

A


19

53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


53 SAM D21E

531 QFN32 TQFP32


VDD

ANA

9G

ND

10PA

0811

PA09

12PA

1013

PA11

14PA

1415

PA15

16


PA27

25R

ESET

26PA

2827

GN

D28

VDD

CO

RE

29VD

DIN

30PA

3031

PA31

32



20

532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


532 WLCSP35

PA00

PA01

GNDANA

VDDANA

PA06

VDDIOPA15

PA18

PA19

PA23

PA24

PA25

PA14

PA16

PA17

PA22

PA27

RESET

PA03

PA05

PA10

PA08

VDDIN

VDDCORE

PA02

PA04

PA07

PA31

PA30

PA11

PA09

PA28

GND

GND

GND

1

2

3

4

5

6

A B C D E F


21


Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP



Code

SRAM

Undefined

Peripherals

Reserved

Undefined


0x20000000

0x20008000

0x40000000

0x43000000

0x60000000

Internal SRAM

SRAM

AHB-APB Bridge A

AHB-APB Bridge B

AHB-APB Bridge C

AHB-APB

Internal Flash

Reserved

Code

0x00000000


0x20000000 0x20007FFF

0x40000000

0x41000000

0x42000000

0x42FFFFFF

Reserved

PAC0 PM




AHB-APB Bridge B

Reserved

PAC1 DSU

NVMCTRL PORT

0x41000000 0x41002000 0x41004000 0x41004400

0x41FFFFFF 0x41007000

SERCOM5

PAC2 EVSYS


AHB-APB Bridge C

TC7


ADC AC

0x42000000 0x42000400 0x42000800 0x42000C00 0x42001000 0x42001400 0x42001800

0x42002000 0x42001C00

0x42003000 0x42003400 0x42003800 0x42003C00 0x42004000 0x42004400 0x42004800

Reserved0x42FFFFFF

0x60000200

0xFFFFFFFF

Reserved

System

0xE0000000

DAC0x42004C00

0x42002400 0x42002800 0x42002C00

PTC

0x42005400 0x42005000

I2S

DMAC

USB

MTB

0x41004800 0x41005000 0x41006000


System

Reserved SCS

Reserved

ROMTable Reserved


0x1FFFFFFF





22









0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP










0 1 2 2


0 1 2 3 4 4

















23













Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP














Address Peripheral






714 IO Interface




24
























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP

























25





















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP






















26














27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP















27

742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


742 Configuration

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

USB

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

USB

DMAC WB

DMAC FetchPriv

iledg

ed S

RAM

-acc

ess

MAS

TER

S

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID



28

CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


CM0+ 0

DSU 1


Inte

rnal

Fla

sh

0

AHB-

APB

Brid

ge A

1

AHB-

APB

Brid

ge B

2

AHB-

APB

Brid

ge C

3

MTB

Mul

ti-Sl

ave

MAS

TER

S

Res

erve

d

DM

AC W

B

DM

AC F

etch

CM

0+

4

DM

AC D

ata

DSU

6

SRAM

DSU 1

MTB

DMAC WB

DMAC Fetch

Priv

iledg

edSR

AM-a

cces

sM

ASTE

RS

DSU 2DMAC Data

45

0 1 2 3 65SLAVE ID










AHB-APB Bridge A 1

AHB-APB Bridge B 2

AHB-APB Bridge C 3





29


























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP



























30





Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP






Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PWDATA

PREADY

T4 T5



Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T0 T1 T2 T3

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

T4 T5





31









32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP










32

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














33
















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP

















34

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














35

















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


















36

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














37
















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP

















38

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset

Bit 23 22 21 20 19 18 17 16

Access Reset

Bit 15 14 13 12 11 10 9 8

Access Reset














39

















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


















40

Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


Write Protect Clear


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















41






















42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP























42






















43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP























43




44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP





44

Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


Write Protect Set


ndash

Bit 31 30 29 28 27 26 25 24

Access Reset


















45






















46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP























46






















47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP























47




48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP





48
















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP

















where






49

82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


82 Package Drawings

821 64 pin TQFP


300 mg







50

822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


822 64 pin QFN



200 mg







51

823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


823 64-ball UFBGA


274 mg







52

824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


824 48 pin TQFP


140 mg







53

825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


825 48 pin QFN



140 mg







54

826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


826 45-ball WLCSP


73 mg







55

827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


827 32 pin TQFP


100 mg







56

828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


828 32 pin QFN



90 mg




57




829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP





829 35 ball WLCSP


62 mg




58





Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP






Table 8-29











59






Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP







Introduction

Features

Table of Contents

1 Description



31 SAM D21E

32 SAM D21G

33 SAM D21J


4 Block Diagram

5 Pinout

51 SAM D21J

511 QFN64 TQFP64

512 UFBGA64

52 SAM D21G

521 QFN48 TQFP48

522 WLCSP45

53 SAM D21E

531 QFN32 TQFP32

532 WLCSP35

6 Product Mapping






714 IO Interface

7141 Overview

7142 Description


721 Overview



731 Features

732 Overview


741 Features

742 Configuration


75 AHB-APB Bridge


761 Overview















82 Package Drawings

821 64 pin TQFP

822 64 pin QFN

823 64-ball UFBGA

824 48 pin TQFP

825 48 pin QFN

826 45-ball WLCSP

827 32 pin TQFP

828 32 pin QFN

829 35 ball WLCSP


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