Issue 47 May 2013

Chemical Vapor Deposition Basics Part 2By Christopher HendersonThis month we will conclude our two-part series that provide anoverview of chemical vapor deposition and the basic principles behindthe technique. Process engineers usually refer to chemical vapor depo-sition by its short name CVD so we will refer to it that way as well.One method for achieving higher reaction rates is to increase thegas phase mass transfer coefficient. This can be accomplished by in-ducing a laminar flow across the wafer. The figure here depicts the ve-locity of the gas across the wafer surface. A boundary layer exists nearthe surface of the wafer. This means that the velocity of the gas at thewafer surface will be zero. This effectively limits the film growth rateat higher gas flow rates (see Figure 1 on the next page).Gas transport to the wafer is a key aspect of chemical vapor depo-sition. The mean free path of the gas molecules is a key component ofthe gas transport process. The lower the pressure is, the greater themean free path. However, lower pressure also means fewer reactantmolecules. Manufacturers of CVD systems design their systems suchthat gas flow is optimized over the wafer surfaces. The placement ofgas inlets, wafers, and exhaust, the use of various reactants, the use ofsingle wafer processing versus batch processing, and the use of ther-mal or plasma-enhanced chemical vapor deposition all affect thechamber design. There are two types of systems available for chemicalvapor deposition: batch systems and single wafer systems. In a batchsystem, the wafers are loaded as a group into a furnace tube. The reac-tant gas is introduced at one end of the tube, and the exhaust gases are

Page 1 Chemical VaporDeposition BasicsPart 2Page 5 Technical TidbitPage 6 Ask the ExpertsPage 6 SpotlightPage 8 Upcoming Courses

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purged at the other end of the tube. In a single wafer system, the gas is introduced through a showerheadover the wafer, and the exhaust gases are purged at the side of the wafer.CVD processes can be sub-divided into three types: atmospheric pressure CVD (or APCVD), low pres-sure CVD (or LPCVD), and plasma enhanced CVD (or PECVD). Both LPCVD and PECVD operate in a sub-at-mospheric pressure regime, while APCVD operates at atmospheric pressure, as one would expect giventhe name. APCVD and LPCVD use thermal energy to drive the reaction, while PECVD uses plasma energyalong with thermal energy to help lower the overall reaction temperature. These tables show the applica-tions for the three types of CVD processes.

Table 1. Pressure regimes and applications of CVD.

Figure 1. Boundary Layer in a Gas over a Flat Plate.

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There are four variants of chemical vapor deposition used in the semiconductor industry. Pure ther-mal chemical vapor deposition uses elevated temperatures to drive the reaction at the surface. Plasma En-hanced or PE-CVD is often used for faster reaction rates. Not only is energy for the reaction supplied byheat, but it is also supplied through RF energy. High Density Plasma or HDP-CVD is a recent developmentthat is a variant of PE-CVD processing. In these processes, plasmas are struck at very low pressures inelectron cyclotron resonance or inductively coupled plasma chambers. The gases, usually argon and oxy-gen, are then drawn by an electric field towards the wafer surface, where the oxygen reacts with silane. Asa result, gap fill is improved, excellent high quality SiO2 films are produced, and there is a net reduction inoverall thermal budget. Rapid thermal processing is increasingly used as well to reduce the overall ther-mal budget during processing. Rapid thermal processing CVD works similarly to rapid thermal oxidation.The temperature ramps up quickly when the heat lamps are turned on, and ramps down quickly when theheat lamps are turned off.In an atmospheric pressure CVD reaction, the reaction rate is mass transfer limited. In this situationthe flow of the gas must be uniform. This means that wafers cannot be placed too close to each other; oth-erwise they will interrupt the flow of the reaction gas. Historically, process engineers used APCVD to growthicker dielectrics like Borosilicate glasses and silicon nitride layers. With the advent of more advancedtechnologies with their thinner layers and lower processing temperatures, the use of APCVD has dimin-ished. Engineers do still use the technique for some specialize operations, like epitaxial silicon growthand growth of silicon carbide films on silicon or silicon nitride substrates.In a low pressure CVD reaction, the surface reaction is reaction rate limited. In order to grow the ap-propriate thickness, the temperature and time must be closely controlled. The reactions are heteroge-neous in order to minimize particulate generation. LPCVD operates in a surface reaction rate limitedregime, and since this eliminates limitations associated with mass transport, the equipment can processlarger batches of wafers. This is an important consideration in a high-volume factory. The pressure inthese systems ranges from around 0.25 to 1 Torr and operates at temperatures between 550 and 800°C.Given the high temperatures, this technique cannot be used after aluminum deposition on the chip. Thereare two types of process tools that employ LPCVD: hot-wall and cold-wall. Historically, engineers used hotwall reactors to process large groups of wafers simultaneously. Newer systems that cluster operations to-gether are single wafer systems using cold-wall reactor technology.Plasma Enhanced or PE-CVD is often used for faster reaction rates. Not only is energy for the reactionsupplied by heat, but it is also supplied through RF energy. This technique operates in a temperatureregime that makes the surface reaction rate the limiting factor. High Density Plasma or HDP-CVD is a re-cent development that is a variant of PE-CVD processing. In these processes, plasmas are struck at verylow pressures in electron cyclotron resonance or inductively coupled plasma chambers. The gases, usu-ally argon and oxygen, are then drawn by an electric field towards the wafer surface, where the oxygen re-acts with silane. As a result, gap fill is improved, excellent high quality SiO2 films are produced, and thereis a net reduction in overall thermal budget.This table summarizes the three types of CVD processes. All three CVD processes are heterogeneousreactions, but beyond that, each type has its own advantages and disadvantages. We cover these advan-

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tages and disadvantages in more detail in our Online Training Systems, with sections on the specific CVDtechniques.

Table 2. Characteristics associated with the types of CVD reactions.Let’s summarize what we have learned. In a generic CVD process, the reactant gases are introducedinto the reaction chamber. These gases diffuse through the boundary layer to the wafer surface. Once thegases reach the surface, we refer to them as reactants or adatoms, and they adsorb on the wafer surface.These adatoms migrate to the growth sites where they react with the surface to form the film. This reac-tion produces a solid film and gaseous by-products, and these reactions might be pyrolysis, reduction, oroxidation reactions. The gaseous by-products desorb from the surface, diffuse through the boundary layerback into the gas flow region where they are exhausted.

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Technical TidbitWafer Redistribution Process FlowRedistribution and bump is a common process for chip-scale packages. The idea is to even out thedistance between connections by adding an extra level of interconnect on top of the wafer to“redistribute” the connections such that they line up for various package formats like Ball Grid Arraypackages, Quad Flat No-Lead Packages, and so on.

The main advantage to this technology is that one silicon design can be used for multiple applications,or be placed in multiple packages. The disadvantages include the fact that: multiple mask layers for theredistribution interconnect require higher tool cost, multiple layer operations can increase process andmaterials cost by two to three times, and the increased process steps and operations lowers the finalyield. Nonetheless, this is a popular option for certain types of parts, where a new layout might be morecostly than the costs of the redistribution layer materials and processing.

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Spotlight: Changes to ComeIn the next month we will be upgrading our Online Training System Platform. Part of the reason toupgrade is to take advantage of some newer database technology features available in PostGreSQL andimprove the implementation of some administrator functions, but another reason is to improve the userexperience. The new system will allow us to incorporate more types of content. For example, we will nowbe able to directly post videos without the need to put them into a Flash player. This will allow users tosee the videos on devices that do not have a built-in Flash player. It will also provide better support forembedding questions or short quizzes into presentations. The new system will also allow us to uploadmore interactive presentations in non-Flash format, so that they can be viewed on devices like the iPadfor instance. For those of you who currently access the system, you will see some new features.• You will no longer need to enter the characters from the image "Captcha" at the login screen. Wehave implemented a more robust security system that invalidates the need for this second level ofidentification.• In the new system, Workspaces will now be called Classrooms, and Courses will be called Classes.This will provide consistency between our public-facing system and the custom-built systems weoperate.For those of you who currently have accounts, you will receive an email message with some moredetails about the rollout and change over.

Ask the Experts

Q: Why is there the option to perform Latchup Testing at both room and hottemperature? When should I test for latchup at hot temperatures?

A: JESD78 defines two classes of Latchup testing: Class I and Class II. Class I testingis at 25°C, whereas Class II testing is at the maximum operating temperature of thecomponent. For most components, latchup susceptibility increases withtemperature, so it makes sense to test at high temperatures, especially if the endapplication includes scenarios where one might operate at high temperatures, likein an automobile for example. Many companies will perform latchup testing at both25°C and maximum operating temperatures just to be on the safe side.

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Chris Henderson of Semitracks will chair the

2013 Advanced MaterialsFailure Analysis Workshop

Sunday, August 4, 2013

Indiana Convention Center • Indianapolis, Indiana

http://www.amfaworkshop.org

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Upcoming Courses(Click on each item for details)Copper Wire Bonding Technology

and ChallengesMay 13 – 14, 2013 (Mon – Tue)Munich, GermanyFailure and Yield AnalysisMay 13 – 16, 2013 (Mon – Thur)Munich, Germany

MEMS TechnologyMay 15 – 16, 2013 (Wed – Thurs)Munich, GermanyIC Packaging Design and ModelingMay 27 – 29, 2013 (Mon – Wed)Penang, Malaysia

Failure and Yield AnalysisJune 3 – 6, 2013 (Mon – Thur)San Jose, CaliforniaSemiconductor ReliabilityJune 26 – 28, 2013 (Wed – Fri)Penang, MalaysiaFailure and Yield AnalysisJuly 1 – 4, 2013 (Mon – Thur)Penang, Malaysia

Advanced Thermal Managementand Packaging MaterialsSeptember 2013 (Dates TBD)Philadelphia, Pennsylviania

FeedbackIf you have a suggestion or a comment regarding our courses, onlinetraining, discussion forums, or reference materials, or if you wish tosuggest a new course or location, please call us at 1-505-858-0454 orEmail us (info@semitracks.com).To submit questions to the Q&A section, inquire about an article, orsuggest a topic you would like to see covered in the next newsletter,please contact Jeremy Henderson by Email(jeremy.henderson@semitracks.com).We are always looking for ways to enhance our courses and educationalmaterials.~For more information on Semitracks online training or public courses,visit our web site!http://www.semitracks.comTo post, read, or answer a question, visit our forums.

We look forward to hearing from you!