cmi8738 spec v06 reg

1

Ver. 0.6

C-MEDIA ELECTRONICS INC. Tel:886-2-87731100 Fax:886-2-87732211 URL : www.cmedia.com.tw

Products and company names mentioned here are the trademarks of their respective owners.

With high speed PCI V2.1 bus controller and legacy audio

SB16® DSPemulator,CMI8738 is designed for PC add-in cards

and all-in-one motherboards. No external CODEC is needed in

CMI8738: CMI-8738 supports the legacy audio – SB16™, FM

emulator/DLS wavetable music synthesis, and HRTF 3D

positional audio functions. Above all CMI8738 supports PCtel®

HSP56 (1789) interface.

Being compatible with A3D™ and DirectSound™ 3D, CMI8738

meets PC98® requirements, and supports professional digital

audio interface such as 24-bit SPDIF IN (0.5V ~ 5V)and

OUT(44.1K and 48K format).

CMI8738 uses HRTF 3D extension technology to enhance

traditional HRTF 3D positional audio by substituting two-speaker

system by four- speaker one(it supports additional 2CH 16-bit

DAC to provide rear side audio). It greatly improves HRTF 3D

positional audio quality and successfully removes the sweet spot

limitations: users can enjoy genuine 3D audio gaming effects,

and don't have to worry about the environmental confinement

any more.

Being outstanding for its full audio functions, competitive price,

and power management, CMI-8738 is the best choice for people

seeking for optimum use of the PC applications.

C-Media licensed HRTF 3D library from Central Research Lab

(CRL®), U.K, who provides one of the world's best HRTF

libraries (CRL® also licensed its audio technology to YAMAHA®,

ESS®, and other well-known sound chip makers).

Features HRTF-based 3D positional audio,

supporting DirectSound™ 3D and A3D™

interface

Supports rear side speakers, C3DX

positional audio in 4 CH speaker mode

Legacy audio SB16™ compatible

DLS-based wavetable music synthesizer,

supports DirectMusic™

Professional digital audio interface

supporting 24-bit SPDIF IN and OUT (44.1K

and 48K format)

Built-in 32ohm Earphone buffer

Built-in PCtel® HSP56 Modem™ interface

Drivers support AC3® 5.1CH interface.

MPU-401 port

Dual game port

16-bit full duplex CODEC

4 CH 16-bit DAC

32-bit PCI bus master

External E²PROM interface

Single chip design, +5V, 128 pins QFP

Preliminary Ver 0.6

CMI-8738/PCI C3DX PCI-Based HRTF 3D Extension Positional Audio Chip

HSP56 Modem interface

CMI-8738/PCI AUDIO Specification

CMI-8738/PCI Block Diagram

PCI interfacePCI interface

PC

I B

US DMA engine

IRQ control emulatorll duplex CODECo,nter.0..

Legacy audioSB16™emulator

SPDIF IN and OUT

MPU 401 and GAME port

Music Synthesizer HRTF DSP engine

16-bit CODEC

Analog MixerPLL and timing circuit

14.318Mhz

3D Surround

Earphone buffer

LINE OUT

MIC AMP

LINE / CD / AUX / PCPSK IN

MIC IN

Rear L/R

2

Ver. 0.6



PINOUT

PINOUT

CMI8738/PCI C3DX AUDIO CHIP QFP 128 PINS


CMI-8738/PCI AUDIO SpecificationPINOUT

U 1

C M I 8 7 3 8 B

XA F E R S T1 0 3

XS C L K1 0 4

XH S P F S1 0 5

XH S P S D I1 0 6

XH S P S D O1 0 7

XA F E M C L K1 0 8

XB I O 31 0 9

XB I O 21 1 0

XB I O 11 1 1

XB I O 01 1 2

XH N D S E T1 1 3

XM D S E L1 1 4

V D D1 1 5

G N D1 1 6

XI N TA1 1 7

XI N TB1 1 8

XP R S T1 1 9

XC L K 3 31 2 0

XG N T1 2 1

XR E Q1 2 2

XA D O U TL6 4

XV R E F6 3

XI N TV R E F6 2

A V D D6 1

A G N D6 0

XA F E P D5 9

XM O U T5 8

XM I N5 7

XO U T5 6

XI N5 5

V D D5 4

G N D5 3

XA 05 2

XA 15 1

XA 25 0

XA 34 9

XA 44 8

XA 54 7

G N D4 6

V D D4 5

XA

272

GN

D3

VD

D4

XA

265

XA

256

XA

247

XC

BE

38

XID

SE

L9

VD

D1

0G

ND

11

XA

231

2X

A22

13

XA

211

4X

A20

15

XA

191

6G

ND

17

VD

D1

8X

A18

19

A1

72

0X

A16

21

XC

BE

22

2X

FR

AM

E2

3X

IRD

Y2

4X

TR

DY

25

XD

EV

SE

L2

6V

DD

27

GN

D2

8X

STO

P2

9X

PA

R3

0X

CB

E1

31

XR

ING

10

1V

DD

M1

00

DG

ND

99

XS

PD

IFO

98

XG

D7

97

XG

D6

96

XG

D5

95

XG

D4

94

XG

D3

93

XG

D2

92

XG

D1

91

XG

D0

90

XR

XD8

9X

TXD

88

XG

PB

IO8

7X

SP

DIF

I8

6X

MB

CS

Z8

5X

EE

CS

84

VD

D5V

83

AG

ND

82

AV

DD

81

XM

ICIN

80

XP

CS

PK

IN7

9X

AU

XR

78

XA

UX

L7

7X

LN

R7

6X

LN

L7

5X

RE

AR

R7

4X

RE

AR

L7

3X

CD

R7

2X

A15

32

XA

143

3X

A13

34

XA

123

5G

ND

36

VD

D3

7X

A11

38

XA 1 03 9XA 94 0XA 84 1XC B E 04 2XA 74 3XA 64 4

XA 2 91 2 8 XA 3 01 2 7 XA 3 11 2 6 G N D1 2 5 V D D1 2 4 XP M E1 2 3

XA

281

XA

DO

UT

R6

5

XA

DC

HL

66

XA

DC

HR

67

XL

FIL

T6

8

XR

FIL

T6

9

XC

DG

ND

70

XC

DL

71

XO

FF

HO

OK

10

2

3

Ver. 0.6

DIGITAL PIN DESCRIPTION

Name Number PIN

Type

Definition

XA31-XA0 126-128,1-2,5-7,12-16,19-

21,32-35,38-41,43-44,47-52

I/O PCI bus address and data lines

XINTA 117 O Interrupt request , active-low.

XINTB 118 O Modem Interrupt request,active-low

XPRST 119 I Reset

XCLK33 120 I PCI bus clock.

XGNT 121 I Bus master grant, active-low.

XREQ 122 O Bus master request, tri-state

output, active-low.

XIDSEL 9 I ID select, active-high.

XFRAME 23 I/O Cycle frame, active-low.

XIRDY 24 I/O Initiator ready, active-low. The bus

master device is ready to transmit

or receive data

XTRDY 25 I/O Target ready, active-low. The target

device is ready to transmit or

receive data

XDEVSEL 26 I/O Device select, active-low. The

target device has decoded the

address of the current transaction

as its own chip select range.

XSTOP 29 I/O Stop transaction, active-low. The

target device request to the master

to stop the current transaction.

XPAR 30 I/O Parity. The pin indicates even parity

across XA31-XA9 and XCBE3-0 for

both address and data phases.

XCBE3,2,1,0 8,22,31,42 I/O Multiplexed command/byte enable.

These pins indicate cycle type

during the address phase of a



PIN DESCRIPTION


4

Ver. 0.6

transaction.

VDD 4,10,18,27,37,45,54,115,124 +5V Digital and PCI I/O power pin

GND 3,11,17,28,36,46,53,116,115 GND Digital and PCI I/O ground

XIN 55 I 14.318Mhz crystal, or external clock

input

XOUT 56 O 14.318Mhz crystal

XGD7-XGD4 97-94 I Game port switch input pin.

Switch D to switch A

XGD3-XGD0 93-90 I/O Game port resistor input pin.

RC3 to RC0

XTXD 88 O MIDI transmit data

XRXD 89 I MIDI receive data

XSPDIFO 98 O 44.1kHZ SPDIF output

XSPDIFI 86 I* 44.1kHZ SPDIF input

XSCL 104 O General purpose output

XBIO3-

XBIO0

109-112 I/O General purpose I/O

VDD5V 83 +5V Digital and PCI I/O power pin

VDDM 100 +5V Digital and PCI I/O power pin

DGND 99 GND Digital and PCI I/O ground

XEECS 84 O EEPROM chip select




5

Ver. 0.6

AVDD 61,81 +5V Analog power

AGND 60,82 GND Analog ground

XADOUTL-R 64,65 AO1 Line out

XADCHL-R 66,67 AI/O ADC filter

XLFILT 68 AI/O Left channel DAC filter

XRFILT 69 AI/O Right channel DAC filter

XVREF 63 AI Reference Voltage

XCDL-R

XCDGND

71,72,70 AI CD audio differential input

XLNL-R 75,76 AI Line in or Rear speaker out

XAUXL-R 77,78 AI Aux. Line in

XPCSPKIN 79 AI PC beep signal

XMICIN 80 AI Microphone in

XREARL-R 73,74 AI/O Rear speaker out

XMDSEL 114 I Modes chip select (high:enable)

XGPBIO 87 O General purpose I/O pin

(0=disabled, 1=enabled)

XRING 101 I Ring detection input

XOFFHOOK 102 O Off-hook control output

XAFERST 103 O Reset signal for MODEM DAA

XHSPFS 105 O DAA frame SYNC

XHSPSDI 106 I DAA data input

XHSPSDO 107 O DAA data output

XAFEMCLK 108 O DAA master clock

XHNDSET 113 O Reserved

XAFEPD 59 O Reserved

XMOUT 58 O MODEM crystal output (18.432MHz)

XMIN 57 I MODEM crystal input

XMBCSZ 85 I Audio chip select (low:enable)



PIN DESCRIPTION

ANALOG PIN DESCRIPTION


6

Ver. 0.6




7

Ver. 0.6

Name Number Definition

XTXD 88 When pull-down select add-on mode,

default pull-high motherboard.

XAFEPD 59 When pull-down enable #INTB share with #INTA,

default high disabled.

XHNDSET 113 When pull-down enable external 18.432Mhz x'tal to HSP module,

default pull-high enable internal 24.576Mhz to HSP module.

XBIO0 112 When pull-down select CLKGEN ref. clock to external

24.576Mhz x'tal. default pull-high select 14.318Mhz




POWER ON CONFIGURATION PIN

8

Ver. 0.6

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings

Ratings Symbol Value Units

Digital power voltage VDD VDD5% V

Analog power voltage AVDD AVDD5% V

Operating temperature range TO 0 to 70 C

Storage temperature range TST -40 to 125 C

Maximum power dissipation PDMAX 300 MW

Digital Characteristics

PARAMETER Symbol Min Typ Max Unit

Input high voltage(PCI I/O) VIH 2. VDD+0.5 V

Input low voltage (PCI I/O) VIL -0.5 0.8 V

Output high voltage VOH 2.4 VDD V

Output low voltage VOL 0.0 0.2 0.4 V

SPDIF IN input high voltage VIH1 2.6 V

SPDIF IN input low voltage VIL1 2.4 V

SPDIF output high voltage VOH1 VDD V

SPDIF output low voltage VOL1 VSS V

Output buffer current 5 mA

Audio Characteristics

PARAMETER Symbol Min Typ Max Unit

Analog input voltage Avin 1.1 VRms

Analog output voltage Avout 1.1 VRms

A-A S/N ratio 85 db

A-A THD 0.09

ADC S/N ratio 80 db

ADC THD 0.1 0.2 %

DAC S/N ratio 80 db

DAC THD 0.1 0.2 %




9

Ver. 0.6

SPDIF IN/OUT S/N ratio 120 db

SPDIF IN/OUT THD 0 %

Microphone input level 20 200 mv

Microphone booster 20 db




10

Ver. 0.6



Application circuit: (for mainboard purpose)

CMI-8738/PCI AUDIO Specification Schematic Circuit

2327AM 2M .SCH 1. 3

CM I 8738 PC I 4 CHAN NEL AUDI O WI T H M ODEM

C-M EDI A ELECT RONI CS I NC.

for m ainboard

Custom

1 1T uesday, April 27, 1999

T it le

Size Docum ent Num ber Rev

Date: S heet of

+ 5V A

+12V + 5V A

VCC

VCC

DVDD

5VSBY 5VSBY

5VSBY

VCCVCC

+ 5V A

+ 5V A

VCC

+12V

VCC

+ 5V A

SPDIF INTERFACE

POWER SUPPLY

CD-AUDIO INTERFACE

SONY/IDE

AUX IN

GAME PORT

GAME PORT

DB15

PC-SPK

LINE-IN/REAR-OUT

SPDIF-IN

TEST POINT

(VEND-ID)

OUTPUT LEVEL (5V/0.5V)* SOFTWARE PROGRAMABLE SPDIF-OUT

* POWER-ON CONFIGURATIONS

XHNDSET : LOW=PASS 18.432MHZ TO HSP HI=PASS 24.576MHZ TO HSPXBIO0 : LOW=CLOCK-IN SELECT 24.576MHZ HI=CLOCK-IN SELECT 14.318MHZ

(DEFAULT : HI)

tie to SMI input* PRING for M/B ring wake up function

* 5VSBY from mainboardpower supply

* MBCSZ : AUDIO CHIP SELECTLOW : ENABLE HI : DISABLE

LOW : DISABLE HI : ENABLE* MDSEL : MODEM DEVICE SELECT

(PIN1 FOR OPTICAL MODULE)

1

2 16

15

JP1

XLI NL XLNL

XLINR XLNR

SPDI FI SPDIFOI NT A

I NT B

V AUXPRST

P CI CLKGNT

REQPM E

XCDINR XCDR A31 A30AF EM CLK A29HSPF S A28

XCDGN D XCDG MS CLK A27 A26A25

XBIO 1 O FFHOO K A24XCDI NL XCDL HS PSDO RING CBE3 IDSEL

HS PSDI A23AF ERST M UT E A22

A21 A20A19

G M RC0 T IM D DVDD5V A18G M RC2 T IM B A17 A16G M RC3 T IM A CBE2G M RC1 T IM C F RAM E

G P8 I RDYG P14 T RDY

DEV SELRFILT S T O PLFILTADCHR

PA RCBE1 A15A14

A13SWB XADO UT R A12 A11T IM C XA UXR A10

A9AVDD

T IM D XAUXLSWA A8 CBE0

A7A6

A5 A4A3

A2AVDD A1 A0

RXD G P14 AF ERSTSWD MS CLKT IM A HSPF ST XD G P8 HS PSDIT IM B HS PSDOSWC AF EM CLK

M UT E

XBIO 1XBIO 0 EECS

G M RC3MDSEL G M RC2

A0 T XDA1

I NT A A2I NT B A3PRST A4P CI CLK A5GNTREQ

PCS PKI N PM E A6A7CBE0 EECS

A31 A8A30 A9A29 A10

XADOUT L SL

S R

XADO UT R

MI N MI CI N

DVDD

OFFHOO

KA28

RINGA27

DVDD

SPDIFOA26

SWD

A25SW

CA24

SWB

CBE3SW

AIDSEL

GM

RC3G

MRC2

GM

RC1A23

GM

RC0A22

RXDA21

TXD

A20A19

SPDIFIM

BCSZEECS

A18DVDD5V

A17A16

AVDDCBE2

MICINFRAM

EPCSPKIN

IRDYXAUXR

TRDY

XAUXLDEVSEL

XLNRXLNL

STOP

PARXCDR

CBE1XCDL

A15XCDG

A14A13A12

ADCHL

A11

XADOUT L

Q 1 78L05

VI1

GND2

VO3

SLOT 1

T RST -1

+12V2

T M S3

T D14

+5V5

INT A-6

INT C-7

+5V8

RSV D9

+5V10

RSV D11

GND12

GND13

RSV D14

RST -15

+5V16

G NT -17

GND18

RSV D19

AD3020

+3. 3V21

AD2822

AD2623

GND24

AD2425

IDSEL26

+3. 3V27

AD2228

AD2029

GND30

AD1831

AD1632

+3. 3V33

FRA ME-34

GND35

T RDY -36

GND37

ST OP-38

+3. 3V39

S DONE40

S BO-41

GND42

PA R43

AD1544

+3. 3V45

AD1346

AD1147

GND48

AD0949

C/ BE0-52

+3. 3V53

AD0654

AD0455

GND56

AD0257

AD0058

+5V59

REQ64-60

+5V61

+5V62

SLOT 2

-12V1

T CK2

GND3

T D04

+5V5

+5V6

INT B-7

INT D-8

PRS NT 1-9

RSV D10

PRS NT 2-11

GND12

GND13

RSV D14

GND15

CLK16

GND17

REQ-18

+5V19

AD3120

AD2921

GND22

AD2723

AD2524

+3. 3V25

C/ BE3-26

AD2327

GND28

AD2129

AD1930

+3. 3V31

AD1732

C/ BE2-33

GND34

IRDY -35

+3. 3V36

DE VSEL-37

GND38

LO CK-39

P ERR-40

+3. 3V41

S ERR-42

+3. 3V43

C/ BE1-44

AD1445

GND46

AD1247

AD1048

GND49

AD0852

AD0753

+3. 3V54

AD0555

AD0356

GND57

AD0158

+5V59

ACK64-60

+5V61

+5V62

LI NE1 P HONEJACK3P

2

13

G AM E1

DB2F15

815

714

613

512

411

310

291

MI C1

P HONEJACK3P

2

13

SPDIF OUT 1RCA JACK

S PK1

P HONEJACK3P

2

13

Y 1

14. 318MHZ

C56

104

C60

104

U293C46

CS1

S K2

DI3

DO4

GND5NC6NC7VCC8

C5310UF/ 16V

+C44

10UF/ 16V

+ C43

104

R17 0 C23104

R3 10K

R13 10K

C13101

C1101

L3201209U280

L4201209U280

C1410UF/ 16V

+

C410UF/ 16V

+

J3

P IN 1X4

1 2 3 4 J5CD-JA CK/ PANASO NI C

1 2 3 4

R6 10K

R15 10K

R7 10K

C7

104

C9

104

C8

104

R30 2. 2KR26 2. 2KR24 2. 2KR23 2. 2K

R27 0

C35

822

C32

822

C40

822

C45

822

C39

102C29102

C55104

C47

102

C31

102

C27

104

C30

102

C46

102

R25560

R19 47

J6

P IN 1X2

1 2 R9

100

C3

104

C2

104

R12

1K

R11

1K

C101UF/ 16V

+

C11

104

R41

10K

C15

102

C59

104

C36

104

C41

104

C48

104

C49

104

C50

104

C51

104

C42

104

C37

104

C22

470UF/ 16V

+

C18

470UF/ 16V

+

L2

201209U280

L1201209U280

C19

101

C17

101

C2820P F

C34

20P FC57(20PF)

C58(20PF)

R16

O PEN(10K)

C12

104

C26104

C21

102

C25

102

C24

270

C20

270

C5410UF/ 16V

+

C5

104C6

104

R5

10K

R4

10K

J2P IN 1X4

1 2 3 4

C52

104

R210K

C16

224

R36

10K

R34

O PEN(10K)

Y 2(18.432M HZ)

R37

75

JP1

P IN 2X8

12345678910

111213141516

R38560

D1

1N4148

Q 2

2N3904/NA

R4010K/NA R41

10K/NAR42

0

R43

10K/NA

D2ZE RNER1/3. 6V

R18 O PE N(33)

R104. 7K

R84. 7K

J4P IN 1X3

1 2 3

R35

10K(O PEN)

R32 OPE N(1OK)

C38104

R45

0 C61

104

U1

CM I8738

XAF ERST103

XS CLK104

XHSPF S105

XHS PSDI106

XHS PSDO107

XAF EM CLK108

XBIO 3109

XBIO 2110

XBIO 1111

XBIO 0112

XHNDSET113

XMDSEL114

VDD115

GND116

XI NT A117

XI NT B118

XPRST119

XCLK33120

XGNT121

XREQ122

XADOUT L64

XVRE F63

XI NT VRE F62

AVDD61

AGND60

XAFEP D59

XM OUT58

XMI N57

XOUT56

XI N55

VDD54

GND53

XA052

XA151

XA250

XA349

XA448

XA547

GND46

VDD45

XA272

GND3

VDD4

XA265

XA256

XA247

XCBE38

XIDSEL9

VDD10

GND11

XA2312

XA2213

XA2114

XA2015

XA1916

GND17

VDD18

XA1819

A1720

XA1621

XCBE222

XFRAME

23XIRDY

24XT

RDY25

XDEVSEL26

VDD27

GND28

XSTOP

29XPAR

30XCBE1

31

XRING101

VDDM100

DGND99

XSPDIFO98

XGD7

97XG

D696

XGD5

95XG

D494

XGD3

93XG

D292

XGD1

91XG

D090

XRXD89

XTXD

88XGPBIO

87XSPDIFI

86XM

BCSZ85

XEECS84

VDD5V83

AGND82

AVDD81

XMICIN80

XPCSPKIN79

XAUXR78

XAUXL77

XLNR76

XLNL75

XREARR74

XREARL73

XCDR72

XA1532

XA1433

XA1334

XA1235

GND36

VDD37

XA1138

XA1039XA940XA841XCBE042XA743XA644

XA29128 XA30127 XA31126 GND125 VDD124 XPM E123

XA281

XADOUT

R65

XADCHL66

XADCHR67

XLFILT68

XRFILT69

XCDGND70

XCDL71

XOFFHOO

K102

R29 10

R39

1M

R4475

R33 1(0805)or bead core(0805)

5VSBYPRING

11

Ver. 0.6

No. Quantit

y

Reference Part

1 4 C1,C13,C17,C19 101

2 28 C2,C3,C5,C6,C7,C8,C9,

C11,

104

C12,C23,C26,C27,C36,

C37,

C38,C41,C42,C43,C48,

C49,

C50,C51,C52,C55,C56,

C59,

C60,C61

3 5 C4,C14,C44,C53,C54 10UF/16V

4 1 C10 1UF/16V

5 9 C15,C21,C25,C29,C30,

C31,

102

C39,C46,C47

6 1 C16 224

7 2 C18,C22 470UF/16V

8 2 C20,C24 270

9 2 C28,C34 20PF

10 4 C32,C35,C40,C45 822

11 2 C57,C58 (20PF)

12 1 D1 1N4148

13 1 D2 ZERNER1/3.6V

14 1 GAME1 DB2F15

15 2 J2,J3 PIN 1X4

16 1 J4 PIN 1X3

17 1 J5 CD-JACK/

PANASONIC

18 1 J6 PIN 1X2

19 1 JP1 PIN 2X8



BOM: (for mainboard)


12

Ver. 0.6

20 4 L1,L2,L3,L4 201209U280

21 3 LINE1,MIC1,SPK1 PHONEJACK3P

22 1 Q1 78L05

23 1 Q2 2N3904/NA

24 10 R2,R3,R4,R5,R6,R7,R1

3,

10K

R15,R36,R41

25 2 R8,R10 4.7K

26 1 R9 100

27 2 R11,R12 1K

28 2 R16,R34 OPEN(10K)

29 4 R17,R27,R42,R45 0




13

Ver. 0.6

No. Quantit

y

Reference Part

30 1 R18 OPEN(33)

31 1 R19 47

32 4 R23,R24,R26,R30 2.2K

33 2 R25,R38 560

34 1 R29 10

35 1 R32 OPEN(1OK)

36 1 R33 1(0805)or bead

core(0805)

37 1 R35 10K(OPEN)

38 2 R37,R44 75

39 1 R39 1M

40 3 R40,R41,R43 10K/NA

41 2 SLOT1,SLOT2 ---

42 1 SPDIFOUT1 RCA JACK

43 5 TP1,TP4,TP5,TP6,TP9 TEST PIN

44 1 U1 CMI8738

45 1 U2 93C46

46 1 Y1 14.318MHZ

47 1 Y2 (18.432MHZ)




14

Ver. 0.6



Application circuit: (for add-on card purpose)


J239A C. SCH 1. 4

CM I 8738 P CI 4 CHANNEL AUDI O WI T H M O DE M

C-M EDIA ELECT RONICS I NC.

f or add_ on card

Cust om

1 2F riday, M ay 0 7, 1999

T it le

S ize Docum ent Num ber Rev

Date: Sheet of

+5V A

+ 12V +5V A

VCC

DVDD

VCC

+ 12V

VCC

VCC

VA UX

+ 12V

+5V A

VA UX

VCC

+5V A

VCC

VCC

SPDIF INTERFACE

POWER SUPPLY

CD-AUDIO INTERFACE

SONY/IDE

AUX IN

GAME PORT

GAME PORT

DB15

PC-SPK

LINE-IN/REAR-OUT

TEST POINT

(VEND-ID)

OUTPUT LEVEL (5V/0.5V)* SOFTWARE PROGRAMABLE SPDIF-OUT

* POWER-ON CONFIGURATIONS

XHNDSET : LOW=PASS 18.432MHZ TO HSP HI=PASS 24.576MHZ TO HSPXBIO0 : LOW=CLOCK-IN SELECT 24.576MHZ HI=CLOCK-IN SELECT 14.318MHZ

(DEFAULT : HI)

* MBCSZ : AUDIO CHIP SELECT

* MDSEL : MODEM DEVICE SELECT

LOW : ENABLE HI : DISABLE

HI : ENABLE (J1 OPEN) LOW : DISABLE (J1 SHORT)

SPDIF-OUT

OPTICAL IN/OUT

protact pin

15

CN2162

1

AVDD

XLINR XLNR

XLI NL XLNL S PDI FO +5V AS PDI FI

S PDI FOI NT A

DVDD5V I NT B

VA UXP RST

PCICLKVA UX G NT

REQPM E

XCDINR XCDR V3_3 A31 A30A FE MCLK A29

M DS EL HSPF S A28XCDGND XCDG M SCLK A27 A26

NC A25NC O FF HO O K A24

XCDI NL XCDL HSP SDO RI NG CB E3 I DS ELHSP SDI AF EVDD V3_3 A23A FE RST M UT E A22

A21 A20A19

G MRC0 T I M D A18G MRC2 T I M B A17 A16G MRC3 T I M A CB E2G MRC1 T I M C FRAM E

G P8 I RDYG P14 RF ILT T RDY

LF ILT DEVS ELA DCHR ST O PADCHL

PA RCB E1 A15A14

A13SWB XAUXR XADO UT R A12 A11T I M C A10

A9XA UXL

T I M DSWA A8 CB E0

A7A6

A5 A4A3

A2AVDD A1 A0

RXD G P14 A FE RSTSWD M SCLKT I M A HSPF ST XD G P8 HSP SDIT I M B HSP SDOSWC A FE MCLK

M UT E

XB IO 0 EECSG MRC3

M DS EL G MRC2A0 T XDA1

I NT A A2I NT B A3P RST A4 EECSPCICLK A5G NTREQ

PCSP KI N PM E A6A7CB E0 XADO UT R S R

A31 A8A30 A9 SLA29 A10

XA DO UT L

XREARR RO R

RO L

XREA RL

M I N M I CI N

DVDD

OFFHO

OK

A28RING

A27DVDD

SPDIFOA26

SWD

A25SW

CA24

SWB

CBE3SW

AIDSEL

GMRC3

GMRC2

GMRC1

A23G

MRC0A22

RXDA21

TXD

A20A19

SPDIFIM

BCSZEECS

A18DVDD5V

A17A16

AVDDCBE2

MICIN

FRAME

PCSPKINIRDY

XAUXRT

RDYXAUXL

DEVSELXLNRXLNL

XREARRST

OP

XREARLPAR

XCDRCBE1

XCDLA15

XCDGA14A13A12

A11

XA DO UT L

Q 1 78L05

VI1

GND2

VO3

R22

O PE NR21

0

Y 2

14.3 18MHZ

C33

104

C11

104

U193C46

CS1

S K2

DI3

DO4

GND5NC6NC7VCC8

C6210UF/ 16V

+C51

10UF/ 16V

+

C31104

C44104

C43104

R2 10K

R1 10K

C2101

C6101

C110UF/ 16V

+

C510UF/ 16V

+

J3

PI N 1X4

1 2 3 4 J5CD-JA CK/ PA NA SO NI C

1 2 3 4

R6 10K

R8 10K

R7 10K

C13

104

C15

104

C14

104

R32 2. 2KR30 2. 2KR27 2. 2KR20 2. 2K

C41

822

C39

822

C48

822

C54

822

C47

102C36102

C61104

C56

102

C38

102

C34

104

C37

102

C55

102

R28560

R17 47

J4

PI N 1X2

1 2 R5

100

C9

104

C8

104

R10

1K

R9

1K

C101UF/ 16V

+

C16

104

R11

10K

C12

102

C30

104

C45

104

C52

104

C57

104

C58

104

C59

104

C60

104

C50

104

C42

104

R37 O PEN(0)

C17

470UF/ 16V

+

C20

470UF/ 16V

+

L1

2012 09U280

L22012 09U280

C18

101

C19

101

C4920P F

C46

20P FC40(20PF)

C27(20PF)

C32

104

C35104

C29

102

C26

102

C28

270

C25

270

C6310UF/ 16V

+

C3

104C4

104

R4

10K

R3

10K

J2PI N 1X4

1 2 3 4

C7

224

R14

10K

R25

O PE N(10K)

Y 1(18. 432M HZ)

R12

75

R15560

R1310K

J1

PI N 1X2

12

R34 O PEN(0)

R16

O PE N(10K)

C21

10UF/ 16V

+

L3

2012 09U280

L42012 09U280

C22

101

C23

101

G AM E

DB 2F15

815

714

613

512

411

310

291

SP DI FO UTRCA JACK

S LOT 1

-12V1

T CK2

GND3

T D04

+ 5V5

+ 5V6

I NT B-7

I NT D-8

PRSNT 1-9

RSV D10

PRSNT 2-11

GND12

GND13

RSV D14

GND15

CLK16

GND17

RE Q-18

+ 5V19

A D3120

A D2921

GND22

A D2723

A D2524

+3. 3V25

C/ BE3-26

A D2327

GND28

A D2129

A D1930

+3. 3V31

A D1732

C/ BE2-33

GND34

I RDY -35

+3. 3V36

DEV SEL-37

GND38

LO CK-39

PE RR-40

+3. 3V41

SE RR-42

+3. 3V43

C/ BE1-44

A D1445

GND46

A D1247

A D1048

GND49

A D0852

A D0753

+3. 3V54

A D0555

A D0356

GND57

A D0158

+ 5V59

A CK64-60

+ 5V61

+ 5V62

S LOT 2

T RS T -1

+ 12V2

T M S3

T D14

+ 5V5

I NT A-6

I NT C-7

+ 5V8

RSV D9

+ 5V10

RSV D11

GND12

GND13

RSV D14

RS T -15

+ 5V16

GNT -17

GND18

RSV D19

A D3020

+3. 3V21

A D2822

A D2623

GND24

A D2425

I DS EL26

+3. 3V27

A D2228

A D2029

GND30

A D1831

A D1632

+3. 3V33

F RAM E-34

GND35

T RDY -36

GND37

S T O P-38

+3. 3V39

SDONE40

SB O-41

GND42

PA R43

A D1544

+3. 3V45

A D1346

A D1147

GND48

A D0949

C/ BE0-52

+3. 3V53

A D0654

A D0455

GND56

A D0257

A D0058

+ 5V59

RE Q64-60

+ 5V61

+ 5V62

CN2

PI N 2X8

12345678910

111213141516

R240

R23O PE N

D13. 6V(m odem only)

C24

10UF/ 16V

+

R33 10(OP EN)

R18

1M

C53104

R290

R380 C64

104

R3675(m odem only)

R31 0

R35 1(0805)or bead core(0805)

R26

10K (OP EN)

R19 O PE N(10K)

U2

CMI 8738

XA FE RST103

XSCLK104

XHSPF S105

XHSP SDI106

XHSP SDO107

XA FE MCLK108

XB IO 3109

XB IO 2110

XB IO 1111

XB IO 0112

XHNDSET113

XM DS EL114

VDD115

GND116

XI NT A117

XI NT B118

XP RST119

XCLK33120

XG NT121

XREQ122

XA DO UT L64

XVRE F63

XINT VRE F62

AVDD61

A GND60

XA FEP D59

XMO UT58

XM I N57

XO UT56

XI N55

VDD54

GND53

XA052

XA151

XA250

XA349

XA448

XA547

GND46

VDD45

XA272

GND3

VDD4

XA265

XA256

XA247

XCBE38

XIDSEL9

VDD10

GND11

XA2312

XA2213

XA2114

XA2015

XA1916

GND17

VDD18

XA1819

A1720

XA1621

XCBE222

XFRAME

23XIRDY

24XT

RDY25

XDEVSEL26

VDD27

GND28

XSTO

P29

XPAR30

XCBE131

XRING101

VDDM100

DGND99

XSPDIFO98

XGD7

97XG

D696

XGD5

95XG

D494

XGD3

93XG

D292

XGD1

91XG

D090

XRXD89

XTXD

88XG

PBIO87

XSPDIFI86

XMBCSZ

85XEECS

84VDD5V

83AGND

82AVDD

81XM

ICIN80

XPCSPKIN79

XAUXR78

XAUXL77

XLNR76

XLNL75

XREARR74

XREARL73

XCDR72

XA1532

XA1433

XA1334

XA1235

GND36

VDD37

XA1138

XA1039XA940XA841XCB E042XA743XA644

XA29128 XA30127 XA31126 GND125 VDD124 XPM E123

XA281

XADOUT

R65

XADCHL66

XADCHR67

XLFILT68

XRFILT69

XCDGND70

XCDL71

XOFFHO

OK

102

CN1

PI N 2X5

1 23 45 67 89 10

LINENARROW PHONE JACK (5PI NS)

4

21

M I C

NARROW PHONE JACK (5PI NS)

4

21

REA R


4

21

SP K


4

21

15

Ver. 0.6

No. Quantit

y

Reference Part

1 7 C1,C5,C21,C24,C51,C

62,

10UF/16V

C63

2 6 C2,C6,C18,C19,C22,C

23

101

3 28 C3,C4,C8,C9,C11,C13

,C14,

104

C15,C16,C30,C31,C3

2,C33,

C34,C35,C42,C43,C4

4,C45,

C50,C52,C53,C57,C5

8,C59,

C60,C61,C64

4 1 C7 224

5 1 C10 1UF/16V

6 9 C12,C26,C29,C36,C3

7,C38,

102

C47,C55,C56

7 2 C17,C20 470UF/16V

8 2 C25,C28 270

9 2 C27,C40 (20PF)

10 4 C39,C41,C48,C54 822

11 2 C46,C49 20PF

12 1 CN1 PIN 2X5

13 1 CN2 PIN 2X8

14 1 D1 3.6V(modem only)

15 1 GAME DB2F15

16 2 J1,J4 PIN 1X2

17 2 J2,J3 PIN 1X4



BOM: (for add-on card)


16

Ver. 0.6

18 1 J5 CD-JACK/PANASONIC

19 4 L1,L2,L3,L4 201209U280

20 4 LINE,MIC,REAR,SPK 3.5 PHONE JACK

21 1 Q1 78L05

22 10 R1,R2,R3,R4,R6,R7,R

8,R11

10K

R13,R14

23 1 R5 100

24 2 R9,R10 1K

25 1 R12 75




17

Ver. 0.6

No. Quantit

y

Reference Part

26 2 R15,R28 560

27 3 R16,R19,R25 OPEN(10K)

28 1 R17 47

29 1 R18 1M

30 4 R20,R27,R30,R32 2.2K

31 5 R21,R24,R29,R31,R3

8

0

32 2 R22,R23 OPEN

33 1 R26 10K(OPEN)

34 1 R33 10(OPEN)

35 2 R34,R37 OPEN(0)

36 1 R35 1(0805)or bead

core(0805)

37 1 R36 75(modem only)

38 1 SLOT1 PCIC2

39 1 SLOT2 PCIS2

40 1 SPDIFOUT RCA JACK

41 4 TP1,TP2,TP3,TP9 TEST PIN

42 1 U1 93C46

43 1 U2 CMI8738

44 1 Y1 (18.432MHZ)

45 1 Y2 14.318MHZ




18

Ver. 0.6



Application circuit: (SPDIF optical module)


J 2 3 9 B A 1 . 3

C M I 8 7 3 8 P C I 4 C H A U D I O S P D I F O P TI C A L M O D U L E S

C -M E D I A E L E C TR O N I C S I N C .

A

2 2Tu e s d a y , A p ril 2 7 , 1 9 9 9

Tit le

S ize D o c u m e n t N u m b e r R e v

D a t e : S h e e t o f

+1 2 V

+1 2 V

O P T5 V O P T5 V

OPTICAL IN/OUT

protact pin

*SPDIF-IN(electric)

*SPDIF-OUT(optical)

*SPDIF-IN(optical)

S P D I F OO P T5 V O P T5 V

S P D I F OS P D I F I

C 2

1 0 4C 1

1 0 4

C 3

1 0 U F / 1 6 V

+

Q 17 8 L 0 5

V I1

GN

D2

V O3

S P D I F O U TTO TX1 7 8

1 2 3

L 1

4 7 U H

S P D I F I NTO R X1 7 8 A

1 2 3

C 4

1 0 4

R 1

4 . 7 K

R 2

4 . 7 K

C 61 0 4

C 51 0 4

C N 1

P I N 2 X5

1 23 45 67 89 1 0J 1

P I N 1 X2

12

19

Ver. 0.6

No. Quantit

y

Reference Part

1 5 C1,C2,C4,C5,C6 104

2 1 C3 10UF/16V

3 1 CN1 PIN 2X5

4 1 J1 PIN 1X2

5 1 L1 47UH

6 1 Q1 78L05

7 2 R1,R2 4.7K

8 1 SPDIFIN TORX178A

9 1 SPDIFOUT TOTX178



BOM: (for SPDIF optical module)


20

Ver. 0.6

CMI8738 PCI Configuration Spaces(Audio)

00h 13F6 : (Vender ID) read only

02h 0111 : (Device ID) read only

04h 0006 : Command (State after #RST all is “0”)

0 (bit 9) Fast back-to-back enable

0 (bit 8) #SERR enable (R/W)

0 (bit 7) Wait cycle control

0 (bit 6) Parity error response

0 (bit 5) VGA palette snoop

0 (bit 4) Memory write and invalidate enable

0 (bit 3) Special cycles

1 (bit 2) Bus master (R/W)

0 (bit 1) Memory space

1 (bit 0) I/O space (R/W)

06h 0280 : Status

0 (bit 15) Detected Parity Error

0 (bit 14) Signaled System Error

0 (bit 13) Received Master Abort

0 (bit 12) Received Target Abort

0 (bit 11) Signaled Target Abort

01 (bits 10-9) DEVSEL timing 00-fast, 01-medium, 10-slow

0 (bit 8) Data Parity Error Detected

1 (bit 7) Fast Back-to-Back Capable

0 (bit 6) UDF Supported

0 (bit 5) 0-33MHz ,1-66MHZ Capable

00000 (bits 4-0) Reserved

08h 10 : Revision ID

09h 040100 : Audio device

0Ch 00 : Cache Line Size

0Dh 20 : Latency Timer

0Eh 80 : Header Type

0Fh 00 : BIST



ConfigurationCMI-8738/PCI AUDIO Specification

21

Ver. 0.6

10h 0000d401 : I/O of length : -65280(ffff0100h) : First Base Address register

14h 00000000 : Uninitialized : Second Base Address register

18h 00000000 : Uninitialized : Third Base Address register

1Ch 00000000 : Uninitialized : Fourth Base Address register

20h 00000000 : Uninitialized : Fifth Base Address register

24h 00000000 : Uninitialized : Sixth Base Address register

28h 00000000 : Cardbus CIS Pointer

2Ch 13f6 : (SubSystem Vender ID) (R/W)

2Eh ffff : SubSystem ID (R/W)

30h 00000000 : Expansion ROM Base Address

34h 00000000 : Reserved

38h 00000000 : Reserved

3Ch 05 : Interrupt Line

3Dh 01 : Interrupt Pin

3Eh 02 : Min Grant

3Fh 18 : Max Latency

CMI8738 Configuration Spaces(Modem)00h 13F6: (Vender ID) read only

02h 0211: (Device ID) read only

04h Command (State after #RST all is "0")

0 (bit 9) Fast back-to-back enable (read only)

0 (bit 8) #SERR enable (Read only)

0 (bit 7) Wait cycle control (read only)

0 (bit 6) Parity error response (read only)

0 (bit 5) VGA palette snoop (read only)

0 (bit 4) Memory write and invalidate enable (read only)

0 (bit 3) Special cycles (read only)

0 (bit 2) Bus master (read only)

1 (bit 1) Memory space (R/W)

0 (bit 0) I/O space (read only)

06h Status

B0 (bit 15) Detected Parity Error

B0 (bit 14) Signaled System Error




22

Ver. 0.6

B0 (bit 13) Received Master Abort

B0 (bit 12) Received Target Abort

B0 (bit 11) Signaled Target Abort

B01 (bits 10-9) DEVSEL timing 00-fast, 01-medium, 10-slow

B0 (bit 8) Data parity Error Detected

B0 (bit 7) Fast Back-to-Back Capable

B0 (bit 6) UDF Supported

B0 (bit 5) 0-33MHz, 1-66MHz Capable

B00000 (bits 4-0) Reserved

08h X10: Revision ID

09h X078000: Communication device (Modem)

0Ch X00: Cache Line Size

0Dh X00: latency Timer

oEh X80: Header Type (Multifunction device)

oFh X00: BIST

10h Xbbbbb000: Allocate 4K memory space.

14h X00000000: not used - Second Base Address register

18h X00000000: not used - Third Base Address register

1Ch X00000000: not used- Four Base Address register

20h X00000000: not used- Fifth Base Address register

24h X00000000: not used- Sixth Base Address register

28h X00000000: Card bus CIS Pointer

2Ch X13f6: Sub-System Vender ID (Value can be replaced after reset.) (R/W)

2Eh X0211: Sub-System ID (Value can be replaced after reset) (R/W)

*Refer to the Audio PCI registers bit-13 of address (18-1B) for how to replace.30h

X00000000: Expansion ROM Base Address

34h X00000040: pointer to the power-saving registers. (Read only)

38h X00000000: Reserved

3Ch X00: Interrupt Line (R/W)

3Dh Interrupt Pin(X01 share interrupt/X02 not share interrupt with Audio)

*Select from the power on pin configuration

3Eh X00: Min Grant(not used)

3Fh X00: max Latency(not used)

40h XEC4A0001(read only)




23

Ver. 0.6

44h-47h

B0-B1: PMST (R/W) (11)

B7-B2: all 0 (read only)

B8: PMEEN (R/W) (Sticky bit)

B12-B9: DSEL (R/W) 0000

B14-B13: all 0 (read only)

B15: PMESTS (Sticky bit)




24

Ver. 0.6

DMA Slave Configuration Register(R/W) PCI Configuration address 40H

Bit(s) Function

31:16 Reserved

15:4 Slave Base Address 15-4. INTEL VX chipset seleted if Base

Address 15:4=000h

3 Non legacy Extended Addressing

0 = disabled

1 = enabled

2:1 Transfer Size

00 = 8 bit transfer

01 = 16 bit transfer

10 = 32 bit transfer, non legacy

11 = Reserved

0 Channel Enable

0 = disabled

1 = enabled




25

Ver. 0.6

Internal Register Mapping

Function Control Register 0Address 00H

Bit(s) R/W Name Description

31:20 Reserved.

19 RST_CH1 Channel1, 1->Reset (Default 0)

18 RST_CH0 Channel0, 1->Reset (Default 0)

17 CHEN1 Channel1, 1->Enabled, 0->Disabled.

16 CHEN0 Channel0, 1->Enabled, 0->Disabled.

15-2 Reserved

3 PAUSE1 Channel1, 1->Pause if channel1 is enabled.

2 PAUSE0 Channel0, 1->Pause if channel0 is enabled.

1 CHADC1 Channel 1 , 1->Recording, 0->Playback

0 CHADC0 Channel 0, 1->Recording, 0->Playback

Function Control Register 1Address 04H


31-16 Reserved

15:13 DSFC[2:0] DAC Sampling Frequency Select,

0 0 0 5.512 K

0 0 1 11.025 K

0 1 0 22.05 K

0 1 1 44.1 K

1 0 0 8 K

1 0 1 16 K

1 1 0 32 K

1 1 1 48 K

12:10 ASFC[2:0] ADC Sampling Frequency Select,

0 0 0 5.512 K

0 0 1 11.025 K

0 1 0 22.05 K




26

Ver. 0.6

0 1 1 44.1 K

1 0 0 8 K

1 0 1 16 K

1 1 0 32 K

1 1 1 48 K

9 SPDF_1 SPDIF IN/OUT at Channel B at 44.1K double-words/sec.

8 SPDF_0 SPDIF OUT only at Channel A at 44.1K double-words/sec.

7 SPDFLOOP external SPDIF/IN loopback to external SPDIF/OUT .

6 SPDO2DAC SPDIF/OUT can be heard from internal DAC.

5 INTRM Interrupt Mask bit for MCB (Master control block) module

interrupt.

0 MCB interrupt disabled.

1 MCB interrupt enabled.

4 BREQ If this bit is set low it will prevent the MCB and DAC/ADC

block from accessing the memory.

0 Bus Master request disabled(power on state)

1 Bus Master request enabled.

3 VOICE_EN This bit enables Legacy Voice device(SB16,FM).

0 Legacy Voice disabled on channel 0.

1 Legacy Voice enabled on channel 0.

2 UART_EN This bit enables Legacy UART device.

0 UART disabled

1 UART enabled

1 JYSTK_EN This bit enables Legacy Joystick device.

0 Joystick disabled

1 Joystick enabled

0 Reserved

Channel Format Register

Address 08H


31:16 Reserved

15-14 AdcBitLen[1:0] Sample resolution

0 16 Bits per sample . (Default)

01 15 Bits per sample.






27

Ver. 0.6

13-12 AdcDacLen[1:0] Sample resolution

0 600nSec per bit in a sample.

01 660nSec per bit in a sample.

10 1.3uSec per bit in a sample. (Default)

11 2.8uSec per bit in a sample.

11 CH1 Ssmple Rate 176K

10 CH1 Sample Rate 88K



7:4 reserved

3:2 CH1FMT[1:0] Data format of channel 1

00 8 bit Mono mode

01 8 bit Stereo mode

10 16 bitMono mode

11 16 bitStereo mode

1:0 CH0FMT[1:0] Data format of channel0

00 8 bit Mono mode

01 8 bit Stereo mode

10 16bit Mono mode

11 16 bitStereo mode

Interrupt Hold/Clear Register

Address 0CH


31:19 Reserved

18 TDMA_INT_EN Interrupt hold/clear bits for updating TDMA position

0 Interruupt Clear

1 Interrupt Hold if exist.

17 CH1_INT_EN Interrupt hold/clear bits for the Channel 1.

0 Interrupt Clear


16 CH0_INT_EN Interrupt hold/clear bits for the Channel 0.

0 Interrupt Clear


15:0 Reserved

Interrupt Register




28

Ver. 0.6

Address 10H


31 R INTR Interrupt reflected from any sources.

0 No interrupt

1 Interrupt pending

30:28 Reserved

27 R VCO

26 R MCBint Abort conditions occur during PCI Bus Target/Master

Access.

0 No interrupt

0 Interrupt pending

25:17 Reserved

16 R UARTint This bit is the UART interrupt bit.

0 No UART interrupt

1 UART interrupt pending

15: R LTDMAINT Interrupt for updating Low Channel TDMA position.

0 No interrupt

1 Interrupt pending

14 R HTDMAINT Interrupt for updation High Channel TDMA position.

0 No interrupt.

1 Interrupt pending.

13:8 Reserved

7 R XDO46 Direct programming EEPROM interface , read data register

6 R LHBTOG High/Low status from DMA CTRL register.

5 R LegHDMA Legacy is in High DMA channel.

4 R LegStereo Legacy is in Stereo mode.

3 R Ch1Busy Channel B Busy.

2 R Ch0Busy Channel A Busy.

1 R Chint1 Channel B Interrupt.

0 No interrupt

1 Interrupt pending

0 R Chint0 Channel A Interrupt.

0 No interrupt

1 Interrupt pending

Legacy Control/Status Register

Address 14H




29

Ver. 0.6


31 Reserved

30:29 VMPU [1:0] Base address for MPU401 access

0 Base address : 330h




28 Reserved

27:26 VSBSEL[1:0] The Base Address Select for SB16 access.

0 Base address: 220h




25:24 FMSEL[1:0] The Base Address Select for FM access.


01 Base address : 3C8h

10 Base address : 3E0h

11 Base address : 3E8h

23 ENSPDOUT enable XSPDIF/OUT to I/O Interface

22 SPDCOPYRHT SPDIF IN/OUT CopyRight status bit

21 DAC2SPDO enable Wave+FM+MIDI to SPDIF/OUT interface

20 SetRetry Mode of wait state . 0:legacy I/O wait (default) 1:legacy I/O

BUS retry

19 C_EEACCESS Direct programming EEPROM interface Registers.

18 C_EECS

17 C_EEDI46

16 C_EECK46

15-0 Reserved

Micellaneous Control Register

Address 18H


31 PWD Power Down Mode enabled..

30 RESET Reset Bus Master/DSP Engine.

29:28 SFIL[1:0] Four level of filter control at the front end DAC..

27 TX/VX Which motherboard to work with




30

Ver. 0.6

0 VX chip sets.

1 TX chip sets.

26 N4SPK3D

25 SPDO5V

24 W / SPDIF48K ; R / SPATUS48K ;

23 ENDBDAC Default low, High will enable Double DAC structure.

22 XCHGDAC Default low,

0 CH0 > Front SPKR, CH1 > Back SPKR.

1 CH0 > Back SPKR, CH1 > Front SPKR.

21 SPD32SEL when high, support 32bits SPDIF format ,low 16bits

20 SPDFLOOPI internal SPDIF/OUT loopback to internal SPDIF/IN, for

loopback testing

19 FM_EN Legacy FM enabled.

18 Reserved

17 Reserved

16 VIDWPDSB Sub ID write protect disabled. (default 0)

15 SPDF_AC97 0: SPDIF/OUT 44.1K 1:SPDIF/OUT 48K(share with AC97

transfer)

14 MASK_EN Activate channel mask on Legacy DMA.

0 Disabled

1 Enabled

13 VIDWPDSB Write Protect of HSP Configuration Sub ID.

0 Protect.

1 No protect.

12 SFILENB Let software contrl filter stepping at the front end DAC.

11-9 Mmode[2:0] Modem DAA interface mode selection,default 000

000 Modem in Local DAA interface mode

001 Modem in AC97_LINK mode

010 Modem in parallel CM_LINK mode (external modem

bridge supported)

1XX Modem in serial CM_LINK mode (external modem

bridge supported)

8 Reserved

7 FLINKON force Link detection on when in CM_LINK mode,default 0

6 FLINKOFF force Link detection off when in CM_LINK mode,default 0

5 Reserved

4 MIDSMP Enable 1/2 interpolation at the Front end DAC..




31

Ver. 0.6

3:2 UPDDMA[1:0] For every the number of samples to notify updating TDMA

position.

0 Every 2048 samples

01 Every 1024 samples

10 Every 512 samples.

11 Every 256 samples.

1:0 TWAIT[1:0] For controling the length of legacy BUS cycle.

0 3 PCICLK.

01 18 PCICLK.

10 24 PCICLK

11 32 PCICLK

* Notice REQ_SQ[2:0] States of BusRequest Engine.

MM_DATA Bus Master is using Bus.

MIDLE Bus Master is not using Bus.

REQA/REQB Channel 0/1 BusMaster Request.

GNTA/GNTB Channel 0/1 BusMaster Grant.

ADRQ/BDRQ Channel 0/1 DMA Request.

ADACK/BDACK Channel 0/1 DMA Acknoledge.

AIRQ/BIRQ Channel 0/1 Interrupt.

CX/BX Channel 0/1 Busy.

Mixer Control / Device Configure Register (can be accessed only by BYTE

instruction)

Address 20H


7:0 W SBVR[7:0] Programmable SB16 version No.

R DEV[7:0] Hardwire device version No.

Address 21H


7 Reserved

6 Reserved

5:4 Reserved

3 Reserved

2 X_ADPCM SB16 ADPCM enable,default disabled.

1 PROINV SBPro Left/Right channel switching.

0 X_SB16 Indicate device active as SB16 compatible, default SB16




32

Ver. 0.6

Address 22H


7:0 IDXdata Mapping SB16 mixer INDEX register data port(A2x5h)

Address 23H


7:0 IDXaddr Mapping SB16 mixer INDEX register address port(A2x4h)

Address 24H


7 Fmmute Mute FM

6 Wsmute Mute Wave stream

5 SPK4 select four speaker mode(emulate Line in to Line out )

4 Rear2front exchange rear and front channels’s speaker out

3 Waveinl Digital Wave recording Left channel

2 Waveinr Digital Wave recording Right channel

1 X3DEN 3D surround enable.

0 Cdplay SPDIF/IN PCM to DAC enable

Address 25H


7 RAUXREN Recording source select R-Aux

6 RAUXLEN Recording source select L_Aux

5 VAUXRM R-AUX mute control

4 VAUXLM L-AUX mute control

3:1 VADMIC[2:0] Recording MIC volume control

0 MICGAINZ MIC gain control,default high

Address 26H


7:4 VAUXL[3:0] L-AUX volume control

3:0 VAUXR[3:0] R-AUX volume control

Address 27H


0 DMAUTO SB16 Low/High DMA Auto detect enabled ,When high.




33

Ver. 0.6

1 SPDVALID SPDIF/IN valid bit detect enabled, When high.

2 XGPBIO general purpose bi-direction pin, when high output tri-

state

3 Reserved

4 Reserved

5 XGPO1 general purpose output pin 1,this pin shared with

XSPDIFO pin, and enabled when index reg. F0_bit 0 programmed high.

6:7 Reserved

Mup401 PCI Port

Index address 40-4FH

FM PCI Port

Index address 50-5FH




34

Ver. 0.6

Legacy SB16 mixerIndex D7 D6 D5 D4 D3 D2 D1 D00x00 Reserved

0x04 Wave volume left channel Wave volume right channel

0x0A Mic volume

0x22 Master volume left channel Master volume right channel

0x26 FM volume left channel FM volume right channel

0x28 Analog-CD volume left channel Analog-CD volume right channel

0x2E Line-in volume left channel Line-in volume right channel

0x30 Reserved

0x31 Reserved

0x32 Reserved

0x33 Reserved

0x34 Reserved

0x35 Reserved

0x36 Reserved

0x37 Reserved

0x38 Reserved

0x39 Reserved

0x3A Reserved

0x3B PC spk volume

0x3C Output muting controls

Line L Line R CD L CD R Mic

0x3D Recording left channel controls

FM L FM R Line L Line R CD L CD R Mic

0x3E Recording right channel controls

FM L FM R Line L Line R CD L CD R Mic

0x3F Reserved

0x40 Reserved

0x41 Reserved

0x42 Reserved

0x43 Reserved

0x44 Reserved

0x45 Reserved




35

Ver. 0.6

0x46 Reserved

0x47 Reserved

0x80 IRQ channel (read only)

IRQ10 IRQ7 IRQ5 IRQ2(9)

0x81 16 bit DMA channel (read only) 8 bit DMA channel (read only)

DMA 7 DMA 5 DMA 3 DMA 1 DMA 0

0x82 Interrupt status (read only)

MPU-

401

16bit

DMA

8bit

DMA

* Please do not write any values into reserved registers




36

Ver. 0.6

CMI8738 SPDIF IN/OUT Test ReportCMI8738 SPDIF-out 03/04/99 12:19:31Frequency, Distortion Noise Response

C o lo r L ine S tyle Th ick D a ta Axis

Green So lid 1 Fas tte s t.C h .1 Am p l Le ft

Ye llow So lid 1 Fas tte s t.C h .2 Am p l Le ft

-160

-20

-140

-120

-100

-80

-60

-40

d

B

F

S

20 10k50 100 200 500 1k 2k 5k

Hz

CMI8738 SPDIF-in 03/04/99 14:11:15Frequency, Distortion Noise Response




-160

-20

-140

-120

-100

-80

-60

-40

d

B

F

S

20 10k50 100 200 500 1k 2k 5k

Hz




SPDIF Test Report

37

Ver. 0.6

CMI8738 SPDIF-through 03/04/99 12:36:04Frequency, Distortion Noise Response




-160

-20

-140

-120

-100

-80

-60

-40

d

B

F

S

20 10k50 100 200 500 1k 2k 5k

Hz

1. SPDIF OUT (playback) > 120db

2. SPDIF IN (recording ) > 120db

3. SPDIF through mode (bypass) > 120db

* This report is generated by Audio Precision® System II using multi-tone mode.




SPDIF Test Report

38

Ver. 0.6

1. StereoIt is only one-dimensional, as sounds come from (left /right) the physical location

of speakers.

2. Surround (Stereo Expander )It filters the existing stereo signal to make the sounds fill in the area around the

speakers, and in front of the listener. Sound sources appear to come from

outside the physical locations of the speakers.

3. Multi-Speaker Surround (Dolby Pro Logic or Digital AC-3)It uses five speakers instead of two to surround the listener; hence, sound

sources come from five directions and create engaging audio experience. This

surround sound effect, however, has to be pre-recorded, and it dose not support

interactive environment.




Audio Processing Technology

39

Ver. 0.6

4. HRTF 3D Positional 3D (C-Media 3D)Only this sound processing technology can be called real 3D manifestation, as

3D usually refers to the three dimensions of X, Y and Z. This technology allows

people to pin-point the location of sound in the real world (up/down, left/right,

front/back)using only two speakers or a pair of headphones. This technology

also supports interactive 3D applications to get a real-time placement of sounds

via API (application programming interface) such as Microsoft DirectSound3DTM.

We can also use this technology to simulate Multi-speaker Surround with two

physical speakers to deliver five “virtual" speakers in the air, surrounding the

listener and creating home theater sound environment. This is the most

economical and the easiest solution to people who would like to get high

performance surround sound but don’t want to spend money in adding extra

speakers.




A virtual speaker

A physical speaker


40

Ver. 0.6

5. HRTF 3D Extension Positional (C-Media 3DX)3D illusion exists because traditional 3D positional audio system assumes the

user's position as the sweet spot to design crosstalk-cancellation circuit; therefore,

if the user wants to have 3D positional audio effects, he can’t move his head or

position out of sweet spot. Another 3D illusion fails because half the population

are compulsive "head-turners" who will never get 3D audio from two speakers .

To remedy this, C-Media utilizes HRTF 3D extension technology (C3DX) to

enhance traditional HRTF 3D positional audio by substituting two-speaker system

by four-speaker one. Therefore, at least one or two speakers should be placed

behind the listener's head to complement the rear-side effect, thus creating

compelling realistic sound. This technology greatly improves HRTF 3D positional

audio quality, and successfully eliminates the sweet spot limitation. Users can

enjoy the real 3D audio gaming effects, and don't have to worry about the

environmental confinement any more.




A virtual speaker

A physical speaker


41

Ver. 0.6

C3D HRTF Positional Audio Technology

C3D technology uses an audio filter called Head Related Transfer Functions

(HRTFs), which is licensed from CRL®(Central Research Lab). The basic concept of

C3D is: since we can hear sound three dimensionally in the real world using our two

ears, it must be possible to regenerate the same sound effect from two loud

speakers.

What is HRTF ?

HRTF (Head Related Transfer Functions) is a set of audio filters which can vary

locations of sound effects (spatial hearing cues) in three-dimension measured from

the listener's eardrum.

People can use this technology and special digital signal processing to re-create

spatial hearing cues, so as to makes the ears hear a realistic and three-dimensional

sounds coming from a pairs of loud speakers or headphones.

There are several listening cues which allow people to hear sounds three-dimensionally :

(I). Spatial Hearing : Primary 3D-cues

1. IADThe head shadowing effect creates differences in the amplitudes of the sound

signals arriving at each ear from the source. The effects of diffraction are most

noticeable in the range between about 700 Hz to 8 KHz, where the A and S

functions periodically converge and diverge gently. This Inter-aural Amplitude

difference (IAD) is one of the primary 3D sound cues.




HRTF 3D Positional Audio Technology White-Paper

42

Ver. 0.6

2. ITDIn addition to IAD, there is also a time-of-arrival difference between the left and

right ears(unless the sound source is in one of the pole positions, such as

directly in front, behind, above and below): this is known as the Inter-aural Time

Delay (ITD).





43

Ver. 0.6

3. Pinna EffectsIt has been presumed by several researchers that the convolutions of the pinna

create the spectral features which constitute the 'height' cues. In practical

experiments by Gardner, in which different parts of the pinna were occluded, and

then the ability of a number of subjects to identify sound source positions at

different heights was tested, it was shown that the different features all

contributed by different amounts. For example, if the fossa is excluded, then

height localization capability is impaired, but not totally extinguished. It would be

reasonable to conclude that it is the combined effect of the pinna convolutions

which create the various localization cues, and it is not valid - or logical - to

attempt to assign particular spatial capabilities with individual physical features.

(II). Spatial Hearing : Secondary 3D-cues (shoulder & local reflections)

In addition to the 'primary' 3D sound cues (IAD, ITD and pinna effects), there are

several additional cues which do contribute to the localization capability; these will be

referred to here as 'secondary' cues, and include shoulder/torso reflections, local

room reflections, and psychological cues.

1. Shoulder / Torso reflectionsThe presence of a torso attached to an artificial head has the effect of increasing the

pressure in the vicinity of the ear up to frequencies of around 2 kHz. The effect is

greater for frontal sources than lateral ones. In experience, the presence of the torso





44

Ver. 0.6

does not appear to contribute much to spatial accuracy. However, shoulders are

located very close to the ears, and their effect is greater, this time, in respect of

lateral sounds. If one listens to an artificial head first without - and then with -

shoulder fitments, then it is clear that the shoulders do contribute to spatial effects in

certain positions. The shoulders provide a strong reflection from lateral sources, with

a short path-length of around 10 cm between direct sound and reflection. The effects

are most important for side-positioned sources, especially for "height" effects, where

the shoulders tend to mask sources which move below about 30 degree depression.

2. Local, Room Reflections

In simulations, it is clear that the incorporation of first-order simulated room

reflections can help in the creation of sound images which have a "solid" nature.

However, the effects - if accurately simulated - are relatively slight. Experience has

shown that it is primarily the quality of the HRTFs themselves which determine the

quality and solidity of the sound image. The further addition of second-order

reflections does not help significantly, because in reality, there is a great number of

reflections in the average room. A method which does help to recreate the acoustic

experience of a room, however, is to use approximate simulations of lateral reverb,

using either 2 or 4 laterally placed "virtual" sources at, say, +-70 degrees and 80

degrees azimuth.

The quality of the sound image relates to the HRTFs used.

The quality of the room image relates to addition of reflections and reverb.

3. Psychological Cues

There are clearly psychological cues present in everyday life which work together

with the audio cues to tell us about the world around us. For example, if you hear the

sound of a helicopter flying, you expect it to be up in the air, and not downwards. If a

dog is barking nearby, you would expect it to be downwards.





45

Ver. 0.6

How to listen to C3D sound correctly and properly?

1. Use Headphones to Have Much Better Effect

When you use headphones in listening, there will be less interference such as

outside voices or room reflections comparing to using speakers.

2. Choose Correct Output Devices

Choose the correct output devices in the options of demo program in accordance

with what listening devices you want to listen to. Listening through speakers must be

proceeded by crosstalk-cancellation, so if you choose the wrong output devices,

there won’t be any 3D positional audio effect.





46

Ver. 0.6

3. Position of Speakers

If you listen from speakers, please do not reverse the left and right speakers, which

should be put in equal distance from the listener. That is, the listener, the left, and

the right speaker must be in the topmost of a right triangle. The position of the

listener is called the “sweet spot”. In addition, the height of the listener’s ears must be

equal to that of the speakers.

4. Turn Surround Sound Functions off

When the surround sound effect is enabled, it will cause confusion with C3D sound,

and make positional sound effect invalid.





47

Ver. 0.6

Audio Rack Panel




Audio Rack Panel

Two Speakers System :

Four Speakers System :

4 Speakers system Enable

Line-In becomes Rear Speakers Output

48

Ver. 0.6

CMI8738 PCI Audio Adapter Layout Notes

1. The wires of analog circuits(chip pin64-80) must be wider than 12mil.

2. Placing digital signals such as SPDIF IN/OUT(pin86, 98) and

TXD/RXD(pin88,89) near the analog signals should be avoided. However,

if these signals have to be adjacent, please place ground between these

digital and analog signal wires to isolate noises.

3. The whole PCB grounding should be well-organized(The ground must be

placed as much as possible. Also, the ground of both the component and

the solder sides should be drilled as much as possible.).

4. The grounding under CMI8738 should be well-organized as mentioned

above.

5. The regulator(78L05) must be placed near the chip as much as possible.

6. The chip and the circuits need independent power supply regulators to

prevent insufficient currents.




cmi8738 spec v06 reg

Documents

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