ee462l fall2010 tests

8/12/2019 EE462L Fall2010 Tests

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EE462L, Power Electronics, Test 2. Name ________________________________________

You must show all work to receive credit. October 15, 2010

of 3

Problem 1. Boost Converter. Use the standard assumptions (i.e., lossless, steady-state

operation, continuous current in L, very low ripple in Vout, Vin is constant, and DV

V

in

out

−

=

1

1 ).

Carefully sketch two-cycles of operation on the voltage and current graphs provided for each ofthe following. Show the amp or volt values at corner points.

• Inductor current and capacitor current.

• Inductor voltage and capacitor voltage.

• Input current.

Track power flow and confirm power balance by determining and plotting two-cycles of

operation for each of the following on the power graph provided. Show values at the corner points.

• Power delivered by Vin

• Power absorbed by L

• Power absorbed by C

• Power absorved by Vout

iL

Vin +

Vout –

Iin

L C

iC

Iout id

Operating Conditions:

V = 40V, Vout = 80V, P = 100W, f = 100kHz, L = 100microH

8/12/2019 EE462L Fall2010 Tests




of 3

Problem 1, cont. Show Y-Axis scale. Show corner points on all waveforms.

Volts

0 1 2

Periods

Volts

0 1 2

Periods

Amps

Volts

0 1 2

Periods

Watts

8/12/2019 EE462L Fall2010 Tests




of 3

Problem 2. The measured I-V curve for a solar array at a given insolation level is shown below.

If you connect the array through a boost converter to a 100Ω load, what value of D will providemaximum power to the load?

0

1

2

3

4

5

6

0 10 20 30 40

6

5

4

3

2

1

0

8/12/2019 EE462L Fall2010 Tests


EE462L, Test 3. November 19, 2010

Test 3 is a lab practicum. There will be a sign-up sheet with 15-minute slots so that you and

your newly-assigned partner can individually show your work and demonstrate your prowess incircuit understanding, scope use, and circuit testing to Dr. Grady. The 15-minute slots will be

scattered over the period Monday, Nov. 22, through Thursday, Dec. 2.

To get a good grade, it is essential that you rehearse and polish your presentation beforehand.Partners do not necessarily get the same grade, so both should be prepared to do the entire

demonstration by themselves.

Here are the steps:

1. Today, there is no locker change, but you’ll get a new partner for Test 3. You’ll be given aMOSFET firing circuit and PI controller previously built and tested by one or both of you.

You’ll also be given a PV isolation PC board, a PV chip, and a one of the buck converters.

2. Build the PV isolation board according to the 13_EE462L_PV_Isolator.pdf document on the

web page. It is not necessary to perform the optional scope waveform checkout step. Instead,you can use 12Vdc on the input side of the PV chip to verify that the isolated output voltage

makes sense.

3. Modify the PI controller as described on the front page of 13_EE462L_PV_Isolator.pdf.

This means removing the voltage divider (100k Ω, 1.5k Ω, and ceramic capacitor). Solder thePV isolator’s +/− outputs to the top(+) and bottom(−) nodes where the 1.5k Ω resistor was.

4. Wire together the buck converter, PI controller, PV isolator circuit, and 10Ω power resistor.Be sure to attach a 10µF high-frequency bipolar cap (the tall red caps) to the input terminals

of the buck converter.

For now, it is OK to use a (Variac+Transformer+DBR) as a 40V power source. But when you

demonstrate your work for a grade, you will power up with a solar panel pair if at all possible.Even a cloudy day will provide the needed power.

5. Re-tune the PI Controller to provide regulated 13.8V to the 10Ω power resistor. Tuning

includes D-limit, bump tests, proportional gain, and integrator time constant.

6. Make sure that your circuit is working properly and robustly before your time slot. Rehearse.

Be sure to practice with a solar panel pair.

8/12/2019 EE462L Fall2010 Tests


ee462l fall2010 tests

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