Eindhoven University of Technology

MASTER

Effect of LOCOS on channel width and isolation of CMOS devices

Debets, Rene J.W.

Award date:1988

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Effect of LOCOS on channel widthand Isolation of CMOS devices

R.J. W. Debets

EEA/382/08/1988

Masters thesis on a projectdone at the Philips Research

Laboratories in Eindhovenunder supervision of:

Prof. Dr. F .M. Klaassen

The department of electrical engineering of the Eindhoven University ofTechnology does not accept any responsibility for the contents of studentreports and masters theses.

AbstractIn modern VLSI circuits CMOS is becoming one of the most important

technologies. A drawback of CMOS is it's need for well structures to enabli!the implementation of P-channel devices on a P type substrate. To isolatedevices from each other the retrograde well process was introduced. Thesewells are meant only for isolation and are located directly under toe LOCOS.Together with the LOCOS it must provide sufficient isolation.

The LOCOS not only takes care of isolation but it also forms the sidewallsof the conduction channel of the MaS transistor. The shape of the LOCOShas therefore a large influence on the conduction behaviour of the transistor.In this report the Inverse Narrow Width Effect, caused by"the steep slopesand the gate - LOCOS overlap, are analyzed using a Two - dimensionalprogram package SEMMY. An a.nalytical approach is presented to predictcharge increase in the channel edges, related to the amount of gate - LOCOSoverlap.

To reduce the chip size; all dimensions must be scaled down, not onlythe MaS transistor but also the isolation areas. To prevent problems withmetallization the LOCOS thickness should be scaled down together withthe LOCOS width. The effect of scaling both dimensions simultaniouslyis analyzed using the program ISEM together with the SEMMY program.LOCOS width as low as 1.1 11m with appropriate LOCOS thickness can beachieved by increasing the doping level to four times the normal value.

Preface

This report is the result of the work that was done for graduation at thedepartment of Electrical engineering at the Eindhoven University of Tech­nology. The work has been carried out at the Philips Research LaboratoriesEindhoven from october 1987 until july 1988.

I would like to thank Prof. Dr. F.M. Klaassen for offering me the kindopportunity to do this project a.t the Philips Research Laboratories, and forhis support and suggestions during the project.

I am very grateful to Rob Petterson, for spending so much time onrewritting the ISEM program and teaching me the basics of robotics.

My appreciation goes to Rudolf Velghe, for doing the measurements andallways checking my SEMMY input syntax, and the local 'fEXpert MertenKoolen for leaving all his plastic cups on my desk.

Furthermore I would like to thank all my friends at Philips for the greattime I had.

Rene Debets, august 1988

Contents

1 Simulations of semiconductor structures. 41.1 Basic physics used for simulation by SEMMY.. 41.2 Generating meshes and describing doping profiles 51.3 Pittfalls and how to avoid them . .......... 14

2 The Inverse Narrow Width Effect 192.1 Characterization of the general effect . 19

2.1.1 The device ............ 192.1.2 What is the INWE ? . . . . . . 222.1.3 Influence on the threshold voltage 262.1.4 Comparing the simulations to the measurements 382.1.5 An analytical approach 392.1.6 Secondary effects . . .. 52

3 Double retrograde well isolation 543.1 Device isolation . . . . . . 54

3.1.1 isolation structures . . . 543.2 ISEM .................. 57

3.2.1 ISEM, The postroutine 573.2.2 Calculating the current 58

3.3 Simulation results .............. 613.3.1 Varying the oxide thickness 613.3.2 Varying the oxide width . 613.3.3 Varying the well position 64

4 Conclusions 68

1

List of Figures

1.1 Irregular shaped mesh . . . . . . . . . . . . . . .~. . . . . .. 61.2 Horizontal line definition. . . . . . . . . . . . . . . . . . . ., 71.3 Proper shape mesh using curved horizontal and vertical lines. 81.4 Crosssection of doping profile generated by input file. . 131.5 Enlargement of the LOCOS edges, bad mesh shape. 151.6 Enlargement of the LOCOS edge, proper mesh. . . 161.7 Enlargement of inversion layer area, proper mesh. . 17

2.1 Influence of bird's beak on electron concentration. 202.2 Bird's beak free LOCOS shape. . . . . . . 212.3 1 Dimensional doping profile. . . . . . . . 232.4 Surface shape and implant depth relation. 232.5 Dividing the problem into two parts. . . . 252.6 Unsymmetrical INWE due to uneven overlap. 272.7 INWE induced charge increase. . . . . . . . . 282.8 Charge distribution in channel for 2 widths . 292.9 Threshold voltage as a function of device width. 302.10 Id - Vg curves for various widths. . . . . . . . . . 312.11 Accumulation charge for various widths. . . . . . 322.12 Normal LOCOS and Recessed LOCOS charge distribution 332.13 Normal LOCOS, flat LOCOS, recessed LOCOS . . . . . . 352.14 Influence of device shape on subthreshold current. . . . . 362.15 Subthreshold current curve for various backbias voltages. 372.16 Total charge for various channel positions. . . . . . . . . . 382.17 Measured subthresholdcurves for W=0.5/0.6/0.7/1.0/2.0 IJm 402.18 device crosssection. . . . . . . . . . . . 422.19 Point B as half of an infinite capacitor 432.20 Channel capacity. . . . . . . 462.21 Edge-to-center charge ratio . . . . . . 48

2

2.22 Two ld - Vg curves, one shifted 0.5 V, same device. . . . . .. 492.23 Resulting capacity ratio curve, compared to SEMMY output 502.24 SEMMY charge ratio output compared to approximations

with ld/Vg curves of various widths. 512.25 Hot electron spots in channel. 52

3.1 CMOS structure. . . . . . . . 553.2 parasitic transistors in CMOS. 563.3 Doping profile and well locations with definitions of dimen-

sions. 573.4 Potential distribution as a function of the depth. . . . . . .. 603.5 Leakage current depending of LOCOS thickness, normal dope.

623.6 Leakage current depending of LOCOS thickness, twice the

normal dope. . . . . . . . . . . . . . . . . . . . . . . . . . .. 633.7 Relation between leakage current and oxide thickness for var-

ious LOCOS widths . . . . . . . . . . . . . 653.8 Influence of oxide width on leakage current 663.9 Influence of well position on leakage current 67

3

Chapter 1

Simulations ofsemiconductor structures.

1.1 Basic physics used for simulation by SEMMY.

The SEMMY package is designed to analyse two-dimensional devices bysolving poisson's equations. It ignores the electron and hole current con­tinuity and is therefore not usable in situations where one is interested incurrent density and the current path.

Semmy also provides a reliable result for a problem with almost no spacecharge in the device, e.g. a junction with a forward voltage which is smallerthan the built in voltage. Current is mainly dominated by the ionizationlevel of the acceptors or donors.

By ignoring the continuity of hole and electron currents the only equationSEMMY must solve to obtain the potential distribution is:

- div(f grad-w) = p (1.1)

where -W is the electrostatic potential, f is the dielectric constant, and pis the space charge density which is defined as:

(1.2)

4

with q the electric unit charge, p the hole density, n the electron den~,No the acceptor doping, and Nd the donor doping.

Semmy uses the Boltzmann expression to relate the hole ~d electrondensity to the potential '1':

(1.3)

and:

(1.4)

The imref levels are constant throughout the regions where they aredefined or imposed using contacts on N or P regions.

Semmy uses numerical analysis and approximates the correct solutionby iteration until a certain degree of accuracy is obtained. The number ofiterations is strongly dependent on the description of the problem, espe­cially the definition of the mesh. Badly shaped meshes not only cause ansubstantial increase in computing time but also produce bad results. Theseproblems are described in more detail in 1.3.

1.2 Generating meshes and describing doping pro­files

The input to SEMMY consists of three blocks:1) Mesh definition block2) Region definition3) Fortran postroutines, containing the doping description and user func­tions.

The mesh definition is straightforward for simple structures I but in­creases in complexity when odd device shapes are to be defined. The meshlines are divided into two groups: horizontal and vertical meshlines. This

5

division is only cosmetic because it doesn't mean the vertical mesh linescan only run vertically as shown in figure 1.1.

1I.r:"_+-_..L-........-........-------IIf-.......'-+_'---&"--'!.f-""'iIJ:H:,, ,It,

t ' II ' ,I I I I I I

, __ ~-_L __ ~ __ L.. -'- ~ L __ ~ __ L __ ~ __

I I I II I I I I I I II I I , I I I I

I I 1 I I I I II I I I 1 1 I I I

" __ ~ __ j __ ~ __ j -- __I ..J __ ~ __ J __ ~ __

• --r--~--r--~r-- - - - ~--r--~--r--

I I I I I , I I I

, I I I I I I I I

I I I I I I I I II I I I I I I , II I I I I

,--,--~--,--~-, - - - - - ~--,--~--,--I I I I I t I '

: I : I : I '

T I : I : I :

" ~\I-__:T'-+-,---;'-+-i-'-----+--;..'-+--';r-...J It: I

I1ESH I

Figure 1.1: Irregular shaped mesh

I··-M-IIISEI111Y

If only straight vertical meshlines are used the device structure can bedescribed by defining the intersection of the curved horizontal lines withevery vertical line as shown in figure 1.2.

This method gives enough flexibility to define each shape, but createsvery badly shaped meshes especially if a horizontal line departs from itshorizontal level very abruptly and continues almost parallel to the verticalmeshlines. These bad mesh shapes result in a bad numerical convergence ofthe problem.

Part of the curved boundaries should be defined by the vertical meshline,part by the horizontal meshlines. This way a mesh with more square shapedmeshes is created. The result is shown in figure 1.3. This trick solves theproblems but it introduces new problems to the user. A curved boundaryis defined by a function. At every intersection of the function with anothermeshline the function is evaluated for the particular X or Y coordinate. The

6

I

I I I I I :I I I I I i,I I I I I \

I 1 \

I I I I 1 I \", I I I I 1 \

'I J I )1 II' "1, I" , ,, J" ,I "" I', I I I

I '" I' I I' ,,1 I' I II 'J " ,I "I,'I I I : I I

I I I I I II I I

I I I I II I I I

11:1 11:11~-4----JL..--+---..J-""""'........J.-+-.....&.-.ar--, n:1

t" l-_--.~______1~..,.....__+-.,......__t-,._-J1':1

Figure 1.2: Horizontal line definition

7

result is one of the coordinates of t.he intersection. If the curved boundaryis described by two functions, one function describing the part formed bythe horizontal meshline and one function of the part formed by the verticalmeshline, the two functions have one begin and end point in common. Thispoint is described by two functions that both need a X or Y value as input.The X or Y value however is the result of the other function, wJiich cannotbe evaluated because the function to be evaluated cannot be evaluated be­cause there is no input available. To solve this deadlock SEMMY offers thepossibility to supply a fixed numeri,:al value as input for one function so theother can be evaluated. The drawback of this is that the input value mustbe calculated by hand. This is no problem if the mesh is not altered forseveral simulations, but if scaling of the device is involved the value mustbe scaled down with the other device dimensions.

,I,

I

II,

./:---- I

I

I Ver.III

Hor.

Figure 1.3: Proper shape mesh using curved horizontal and vertical lines.

The region definition is straightforward and uses the mesh definition.A region statement states which meshlines are the outer boundary of theregion. It also states what doping concentration or dopingfunction shouldbe used.

8

The fortran postroutine is the most important part of SEMMY for theuser. Here he can define the doping structures and extract the kind ofinformation SEMMY does not provide standard.

After SEMMY finished the solution process it saves the results whichcan be read from fortran using the value routine.

An example of the doping profile description is given below with com­ments of what's what. Keep in mi.nd that SEMMY evaluates point afterpoint. It provides the X and Y coordinates as input to the dope functionand expects to get one doping concentration back. This res.ults in a specificstructure of the dope function. For each area a specific dope function andtopdope position is defined. If the point provided by SEMMY is inside thearea the dope level is added to FUNO. Several areas overlap so it possiblethat the final doping level is the addition of several dope levels, as well P asN type. The final value of FUNO is returned to SEMMY.

Example input file for doping description.

000780007Q00080 C0008100082 C

DOUBLE PRECISION FUNCTION FUNO(X,Y)DOUBLE PRECISION X,Y,YTOP,FX,FY

*** BACKGROUND DOPEFUNO= -1.000D16

*** P - RETRO

First the P - Retro implant is defined.It is located at the left side ofthe device as can be seen in figure 1.4, which shows all implants and theirapproximate boundaries.

00083 YTOP-2.408333D-4

Y top is the vertical position of the peak of the doping profile. Thisposition can vary because the dope is implanted after the LOCOS is grown.The top position of the dope follows the shape of the surface at the moment

9

is was implanted. The regions defined by the IF-THEN statements are re­gions in which the top position changes with a different curvature.

00084000860008600087

000880008;

IF(X.GE.0.4D-4. AND .X.LE.0.6D-4)* YTOP-l.20833D-4 + 3.0*X

IF(X.GT.0.6D-4. AND .X.LT.0.gD-4)* YTOP-l.g68333D-4 + DSQRT(DABS(0.7226D-8 ­

(X-0.;D-4)**2»IF(X.GE.0.gD-4)

* YTOP-2.808333D-4

In the following part the gaussian doping profile is incorporated in thedoping profile. The maximum dope level ( situated at Ytop) is defined as-5.0e16.

000;0 FY- -6.0DI6*DEXP(-(( YTOP - Y)**2)/2.2472D-I0)

To account for the spreading of the dope in the horizontal plane theErf-function is used. For the P-retro the left boundary is placed on le-3, faroutside the left boundary of the device. The right boundary is located at1.65e-4 exactly at the midle of the LOCOS.

000;1000;2000;3 C000;4 C000;6

FX-0.6*(DERF((X-(-1.0D-3»/(0.226D-4»-* DERF((X-( 1.66D-4»/(0.226D-4»)

FUNO-FUNO + 2*FX*FY

An additional implant is defined in ADDED TO P - RETRO. This isnot a separate implant but is just a way to account for the pile-up underthe LOCOS. It has different maximum dope and a different vertical position.

ooog6 C... ADDED TO P - RETRO

10

000Q7000Q8ooOQQ0010000101

001020010300104001060010600107

YTOP-3.233333:)-4IF(X.GE.0.4D-4. AND .X.LE.0.6D-4)

• YTOP-2.03333:D-4 + 3.0.XIF(X.GT.0.6D-4. AND .X.LT.0.QD-4)

• YTOP-2.783333D-4 + DSQRT(DABS(0.7226D-8 ­(X-0.QD-4)"2»

IF(X.GE.0.OD-4)• YTOP-3.63333D-4FY- -3.0D16.DEYP(-«YTOP - Y)/4.77D-6) ••2)FX-0.6.(DERF«X-(-1.0D-3»/(4.77D-6»-

• DERF( (X- ( 1. 40-4»/ (4. 77D-6»·)FUNO-FUNO + 2.FX.FY

.....-.

00108 C •••001000011000111

0011200113001140011600116001170011800110 C00120 C00121

00122 C •••001230012400126

Now the N - RETRO and N- WELL will be defined. The general con­struction is the same as in P - RETRO only the constants differ.

N - RETROYTOP-2.833333D-4IF(X . GE . 2.4D-4 . AND. X . LE . 2.8D-4)

• YTOP-1.08333333D-4 + DSQRT(DABS(0.7226D-8 ­(X-2. 4D-4) "2»IF(X . GT . 2.8D-4 . AND. X . LT . 2.QD-4)

• YTOP-11.133333D-4 - 3.0.XIF(X . GE . 2.0D-4)

• YTOP-2.433333D-4FY- 6.000D+16.DEXP(-« YTOP - Y) ••2)/ 7.606D-10)FX-O.~O.(DERF«X-( 1.650D-04»/( 0.276D-04»-

• DERF«X-( 1.000D-03»/( 0.276D-04»)

ADDING THE N-WELLYTOP-3.633333D-4IF(X . GE . 2.40-4 . AND. X . LE . 2.8D-4)

• YTOP-2.78333333D-4 + DSQRT(DABS(0.7226D-8 ­(X-2.4O-4)"2»

11

4.7700-06)**2)4.7700-06» ­

4.7700-06»)*

IF(X . GT . 2.80-4 . ANO . X . LT . 2.00-4)* YTOP-ll.0333330-4 - 3.0*X

IF(X . GE . 2.QO-4)* YTOP-3.233333D-4FY- 3.000D+16*DEXP(-« YTOP - Y)/FX-0.60*(OERF«X-( 1.6600-04»/(

OERF«X-( 1.0000-03»/(FUNO-FUNO+2*FX*FY

0012600127001280012000130001310013200133

The source and drain are defined as constant dope areas, only the dopeshape and position are modeled in functions.

00134 C *** ORAIN

First the gaussian falloff in the vertical direction is defined:

00135 FY- 1.0000+20*DEXP(-« 3.0000-04-Y)/1.0630-06)**2)

Then the horizontal shape and dimensions are defined:

00136001370013800130 C00140

00141001420014300144 C0014600146

FX-0.60*(OERF«X-( -4.000D-06»/( 1.0630-06»-* OERF«X-( 4.0000-06»/( 1.0630-06»)

FUNO-FUNO+FX*FY*** SOURCE

FY- -1.000D+20*OEXP(-« 3.0000-04-Y)/1.0630-06)**2)FX-0.60*(OERF«X-( 2.0000-04»/( 1.0630-06»-

• OERF«X-( 3.7000-04»/( 1.0630-06»)FUNO-FUNO+FX*FY

RETURNENO

12

ISIT:5S

: I ,- ~ II:

u-- ~ II ...l t-...l

">- .-'

~".....- -.....} ~

~

Il

IT: I

Figure 1.4: Crosssection of doping profile generated by input file.

13

1.3 Pittfalls and how to avoid them

One of the general pitfalls of the simulation program semmy as mentiolle.din 1.2 is the construction of the mesh. The mesh defines the physicaldimensions of the device. To get accurate results from the simulations it isbetter to describe the device with curved lines, and not only w~th straightlines perpendicular to each other. One of the effects in 3.3.3 is based on thecurved LOCOS shape. To show what happens if a straightforward mesh iscreated, it will be compared with a proper description of the same device.

The first mesh is created by defining only non-curved vertical lines. Thisimplies that the horizontal lines define the curved shape of the device as onecan see in figure 1.5. The horizontal lines depart from normal horizontallevel with an angle of almost 90 degrees. At this point they run almost inparallel with the vertical meshlines, creating needleshaped meshes. Basicallysemmy is able to solve the equation!' of this mesh, although it takes muchmore time and is not as accurate as a mesh that avoids these needleshapedmeshes. The accuracy is decreased because the interpolation in such a smallmesh is very difficult. The mathematical center of the mesh is not the sameas the physical center.

The mesh shown in figure 1.6 does not have this kind of problems,butis more difficult to create. To avoid needleshaped meshes part of the curvedlines are formed by the horizontal and part by the vertical lines. In figure1.6 the intersection of four lines are shown. The meshlines are bent withsteep edges, but the mesh is almost rectangular.

Care must be taken not to take too few mesh lines in the current path.When simulating the crosssection of a MOS transistor the surface where theinversion takes place should have closely spaced meshlines in the verticaldirection. In figure 1.7 we can see the advantage again of the proper mesh:the meshes in the current path are closely space and almost rectangular.This is a big advantage when integrating the charge in every mesh to getthe total charge. Semmy only returns the charge density to the user, not thetotal charge in the mesh. When calculating the total charge in the inversionlayer area we must include the mesh area to get the total charge in the mesh.This is much easier and more accurate with a rectangular mesh.

Semmy is a sophisticated program but it can mislead the user by issuingerror messages that do not point out the exact cause of the error. Forinstance: SEMMY presents the post routines as pure Fortran, and Fortranallows the user to use as much braces as he likes, but SEMMY does not allow

14

Figure 1.5: Enlargement of the LOCOS edges, bad mesh shape.

15

-35 17

Figure 1.6: Enlargement of the LOCOS edge, proper mesh.

16

L

er mesh.. n layer area, propt of inverslO. 1 7' EnlargemenFIgure "

17

an equation in which the braces enclose other braces like in FX =((Y+2))/4.The inner braces are necessary to tell FORTRAN that it should devide Y+2by 4 and not 2 by 4. The outer braces are not necessary and 5EMMY willproduce an error message although the equation is mathematically correct.50 braces should only be used where it is unavoidable.

18

Chapter 2

The Inverse Narrow WidthEffect

2.1 Characterization of the general effect

2.1.1 The device

The device used for simulations is a p-channel mosfet, isolated by LOCOS.The LOCOS structure isolates the transistor from the adjacent devices, in­suring that no parasitic current can flow. The thick oxide that forms theLOCOS has a large influence on the channel dimensions. The former LO­COS had a tapered end, called the bird's beak. This bird's beak causes adecrease in electron concentration at the edges [5], compared to the cen­ter of the channel, due to the thicker oxide. The electric field \II, at thesilicon-silicondioxide boundary is decreased, and inversion, which starts at\II, = \II b , will be reached only for higher gate voltages at the edges. Thecenter of the channel is not affected and has the same \II, as a infinite widetransistor. This results in an increase in the average threshold voltage. Thethreshold voltage shift can be observed when the current is normalized tothe device width. A cross section of a device with bird's beak sidewalls withan indication of the inversion layer is shown in figure 2.1. The taperedoxide not only causes a shift in the threshold voltage of the device, it alsolimits the device width. To get a very small and exactly defined transistorchannelwidth the LOCOS sidewalls have to be steep. A cross section of thisbird's beak free LOCOS is shown in figure 2.2.

The advantages of this shape are:

19

Figure 2.1: ln8uence of bird'. beak On eleclron cOOClUllr'lio

n

.

20

11:-"......_-----...._-.",------....-".:..r- ~ IY:n

J \'-------~ ~.- 1...........__----1

tIY";:=-- L- ....JL _11_ IT:I

Figure 2.2: Bird's bt:ak free LOCOS shape.

21

1) well defined channel width.2) smaller minimal device dimensions3) no increase in threshold voltage.4) oxide can be planarised.

As will be shown in chapter 2.1.3 there is in this case no increase inthreshold voltage, it is even decreased due to the Inverse Narrow WidthEffect [3] as described in 2.1.2. The doping profile that was used duringsimulations is shown in figure 2.3. It is a composed out of two dopingimplants:1)The thresholdvoltage adjust doping.2)The Anti PunchThrough doping.These two dopings determine the vertical doping profile. The horizontaldoping profile is determined by the surface shape during implant. Thision implanting is achieved by shooting ionized projectile atoms into thesilicon. All ions have the same amount of energy and therefore penetratethe silicon to the same extend. If the surface was not flat during implant,the dopinglayer will be equidistant to the surface and will therefore havethe same shape. As shown in figure 2.4 this results in an ideal situation:while the doping under the LOCOS is located at the 5i - 5i02 interface thedoping in the channel area is far away from the surface. A seperate implantcan then be used to adjust the threshold voltage.

Only a very simple approximation of the horizontal doping profile wasused because the deeper (surface dependant) profile was not expected tohave much influence on the inversion layer.

2.1.2 What is the INWE ?

The Inverse Narrow Width Effect [3] is the opposite of the small channeleffect as described in 2.1.1. The device structure shown in figure 2.2shows the steep edges of the channel. There is no increase in oxide thicknessfrom the center of the channel to edges. The locos forms the sidewall. Tosee whether the edge is expected to have a lower threshold voltage thanthe center of the channel we calculate the capacitance ratio of the edgecapacitance and the center capacity. If we consider a point in the centerof the channel, far away from the LOCOS, we can approximate the oxidecapacitance at this point A by :

22

---- .ff.1fUSH()!I')INfl-tfl,Jf

,,,Jfl P ~"'CH·"H~"UGHI,.,fl AN.,.. -

rJ 6 fJtN

Figure 2.3: 1 Dimensional doping profile.

Figure 2.4: Surface shape and implant depth relation.

23

c = E,EoAd

(2.1)

where d is the oxide thickness, A is the gate area,and E, is .the relativepermittivity.

And the electric field E is:

(1

e=-­2EoE,

With (1 the surface charge on the capacitor plate.

(2.2)

Point B at the edge of the chann~l can be approximated by splitting theproblem in two parts:1) the channel to the left of B2) the LOCOS to the right of B

The part to the right of B is caused by the inevitable overlap between gateand LOCOS.

The situation used to approximate the original situation is shown infigure 2.5. The dashed line shows where the problem is splitt into twoparts.

The first part can be regarded as half of an infinite capacitor ( theLOCOS on the left is very far away from point B). The contribution to theelectric field of this part is :

(2.3)

The second part can be calculated by ( for a detailed description of thederivation of this electric ftield see also: 2.1.5):

(2.4)

24

II , lIE~/A,I~__---".A__-_""

Figure 2.5: Dividing the problem into two parts.

25

If we ad both components the total electric field is:

E = V( 11" /2)2 + G2q

21rfOfr

For a constant V, this results ill a higher capacitance in the edges of thechannel compared to the center:

(2.6)

(2.7)

This is larger 'than the electric field of the infinite capacitor with area A.

(f

C 2(of,center = -v:­,

Of course this is only a rough approximation that does not include anysurface effects, but it indicates that there will be a difference in thresholdvoltage between the center and the edges. The thresholdvoltage of the centeris of course identical to a transistor of infinite width, but the threshold volt­age of the entire device is decreased because of the lower threshold voltageof the edges.

The integral to the right of B is calculated from B to infinity, but inreality the overlap is large but not infinite. This indicates that there shouldbe a difference in the edge effect because the gate overlap is larger on the leftthen on the right side. This effect was indeed confirmed by the simulationsas can be seen in figure 2.6.

A quantitative description of the INWE on the device can be found in2.1.5

2.1.3 Influence on the threshold voltage

Varying the devicewidth

The device width has a large impact on the total current of the device.The formula for ld shows that, for constant device length L, the current isdirectly proportional to the gate width.

26

Charge distribution

-

,

91.019.0 37.0 55.0Position in channel

I.e

.

. ~------------O+----~-----r---_T"---_r_--___,.73.0

Figure 2.6: Unsymmetrical INWE due to uneven overlap.

27

Z )2Id = L IlnCO(Vg - Vc

Where Z is the device width.

(2.8)

The edge effect can be neglected as long as the channel width is consid­erably larger than the part of the channel where the INWE increases thecharge. At a channel width of 0.6 Ilm the current is increased by approxi­mately 20 % with respect to the transistor of width 0.6 Ilm with no InverseNarrow Width Effect. This comparison was made at Vc for both devices. Infigure 2.7 the additional charge is depicted.

2.4-2.. -0.8 0.8PoeitioD in channel

~~ ~~~ r~~~ ~~ \,~ ~,~ ~l'

~~ ~~ ~~ S• 1Ii

;en_.

"E ...."'11I--o~_...II'tlQ

; ...-'1:$0-:

Gl

•

l! ...011I-iii.....

I

Figure 2.7: INWE induced charge increase.

The charge distribution and charge density are independent of the chan­nel width for a large range of channel widths. If the transistor is wide enoughto prevent the center, or even the other edge, to have any influence on theedge, there should be no change in the inversion charge in the edges. Thisimplies that if the transistor width is decreased the part that is removed isthe center part, the edges stay as they were. The threshold voltage is defined

28

as a certain charge level ( relat\!d to the device width.) This is equivalentto the definition of Vt as \11, = 2\11 b. The lower threshold voltage of the edgesbecomes more important when the channel width is decreased and therefO!~

the total threshold voltage is lower as expected. This effect is depicted infigure 2.8.

'-

~/ r'\~

. ~,,

!

• •i\ .

• ..!'I·

I

I] 1 T+---"'T'""'--"'T'""'--"T'"--"---""

,. ... .

12.2-3.4XAS

-19.0 -11.2

It !~liI< ..:.

2••0.11-0.11XAS

.....;:...

z ....;sla..-

iiii

Figure 2.8: Charge dis~ribution in channel for 2 widths

The simulation results show the same decrease in threshold voltage asthe channel width is decreased. The threshold voltage shift is only 0.2 voltbetween 2 IJ.m and 0.4 IJ.m width. The curve for various widths is shown infigure 2.9.

The subthreshold current is shown below in figure 2.10. It shows thatdecreasing the device width also decreases the total current, but at a smallerrate than expected. H this curve would be normalized for the device width,the sequence of the curves would be reversed.

The device width has no influence on the slope of the deep subthresholdcurrent curve. This indicates that the INWE has a negligible influence onthe subthreshold current.

29

THRESHOLD VOLTAGE [DEVICE WIDTH)~--oCD--~-

8-

~~

~

1/(I

II0.40 0.72 1.04 1.36

Device width (ISm)1.68 2.00

Figure 2.9: Threshold voltage as a function of device width.

30

•0- 2.01lm1.41lm

• O.81lm0-

..0-

--to 0E -"-0- III

~o.. -•.c0

•0-...0

..r<0-:cN

0.20 0.76 1.32 1.88 2.44 3.00Gate yoltase (V)

Figure 2.10: Id - Vg curves for various widths.

31

In the accumulation curves the same effect can be observed as in thesubthreshold curves: there is only a shift in the current magnitude, not inthe slope of the curves. The acc'lmulation curves are shown in figure 2.11.

CHARGE (!EVIct "1011011 ACClJU.JlTI()I

'b 2.01lm0-

1.41lm

O.81lm

O.61lm

2O.lID D•• 0.'1 0.2t 0.13 0.«1

VG

Figure 2.11: Accumulation charge for various widths.

Varying the gateoxide geometry

The gate oxide form has a large influence on the charge distribution in thechannel. As explained in 2.1.2 the edge effect is mainly caused by the overlapof the gate with the LOCOS. In normal LOCOS the distance between thechannel edge and position X on the gate is increased by the fact that oxidetop is higher than the gate level. If one planarizes the oxide or even etchesbeyond that point, the distance between the edge and the gate is decreased.The corner capacitance would be increased and, at the same gate voltage,the inversion at the edges would be even stronger as can be seen in figure2.12.

To compare the configurations the subthreshold current is calculated forthree LOCOS structures:

32

kl"ILI'l

<DI

~~l"N

§f!31~----r------,----T"""'"---"""---..1,

!! O'lON

-;~-•

CD..o

_"Ito -E I

"o~-~.. .~~

.,c:1o

-3.0 -1.8 -0.6 0.6PoeitioD in channel

1.8 3.0MID""'

Figure 2.12: Normal LOCOS and Recessed LOCOS charge distribution

3'JoJ

1) Normal LOCOS shape.2) Flat LOCOS shape.3) Recessed LOCOS shape.

The exact shapes are shown in figure 2.13.The results for all three devices are plotted in figure 2.14. The device

width is 0.6 #lm for all devices. This small width was chosen because theedge effect is less pronounced in wider devices. A 0.4 #lm wide device wouldbe to small because the center is already influenced by the edges and thewidth is too small any way to be practical at this moment.

The device shape not only influences the inversion charge level, but alsothe charge distribution. The device with the thinnest oxide has the widestedge effect.

The threshold shift between the recessed LOCOS and the normal LOCOSdevice is at most 0.05 volts.

Varying the backblas voltage

This can be seen in figure 2.15 where the curves for various backbias voltagesare only shifted in the X direction. The curves shown are calculated for abackbias voltage of 0 , 0.5 , -0.5 , -1.0 Volts, and for a constant devicewidth of 0.6 #lm. If backbias has any influence on the INWE it can best beobserved at small dimensions. Changing the backbias voltage only influencesthe thresholdvoltage to a large extend, but it does not influence the slopeof the subthreshold current.

Varying the position along the channel

The calculation of the charge density along the channel is not possible with atwo dimensional device simulator without discarding the charge distributioncaused by the INWE. This would result in a crosssection from source todrain. If the INWE must be included there is only one way to approximatethe charge distribution along the channel. Semmy offers the possibility tovary Vn in the bulk, which results in Vn being the potential for every N typearea in the bulk, in this case the inversion layer. A particular Vn results ina virtual position along the channel, assuming that the physical crosssectionof the device remains the same. So if the V n is varied from V n == V.ouree

== 0 Volt to Vn == Vdrain we get an impression of the charge distribution

34

-6 -~

5-62-48-18 -6 -1369204161

-18 -6 -1

Figure 2.13: Normal LOCOS, flat LOCOS, recessed LOCOS

35

Normal LOCOS

Flat LOCOS

..--0

"e ­:~o!-0

" -~

.&:."0­o

!:!O,-+-..L----r- ...- -r- ~--___.

0.10 0.5:2 0.61 0.76

Ga~e voltage (V)0.88 1.00

Figure 2.14: Influence of device shape on subthreshold current

36

3.002.44l.BBl.32

VG

•0

...0

•0

on0

"0

PI

0..0

o-~

00

";"0

I......

':"U--';'0......·,0

0.20 0.76

Figure 2.15: Subthreshold current curve for various backbias voltages.

37

along the channel. However one should keep in mind that there is no linearrelationship between Vn and the pm:ition X.

In figure 2.16 the result is shown for two gate voltages: 1.0 and 1.5Volt. This difference in gate voltage results in a different charge level. Italso results in a different saturatiun voltage of Vn (= drain voltage). Theshift is exactly 0.5 Volt as predictbd by :

' .

•V, = l.OV ' V, = 1.5V

(2.9)

Figure 2.16: Total charge for various channel positions.

2.1.4 Comparing the simulations to the measurements

The measurements were performed in a different way as the simulations.The simulations were 2 dimensional, lacking the third dimension on thedrain-source axis. This results in a curve that does not consider the effectsthat occur along the channel like pinchoff etc. in a direct way. There is no

38

(2.10)

way around this so we can only compare the subthreshold region where nothree dimensional effects occur.

The channel length of all the devices that were measured was 10 #lm.

The width varied between 0.5 #lm and 2 #lm. This width range is comparableto the range of the simulations.

When comparing the various curves in figure 2.17 it can be clearly seenthat the threshold voltage decreases with decreasing device width as wasexpected from the simulations. This can be observed by a shift of the entirecurve to the left for small channel widths. The total thresholdvoltage shiftpredicted by the simulations was 0.2 volt when going from 2 #lm to 0.4#lm.

The measurements showed a shift of 0.25 to 0.3 Volt. A slight change in theslope of the measured subthreshold curve was also noted, but this doesnotcorrespond with the effects found during simulations. One of the things thatis also not predicted by the simulations is that the magnitude of the currentflowing through the smallest device is comparable to the current flowingthrough the widest device. Although the threshold voltage is lowered forsmal devices, the basic current should be only one quater of the currentthrough hte widest transistor. Only the normalized current should be higherfor the smal device. There is an explanation for it: the measurement didnot cover the voltage range for which both devices reached saturation, onlythe small device is clearly saturating. So for e.g. 2 volts the 2#lm devicecould have a approximately four times higher current as expected.

2.1.5 An analytical approach

Oxide capacitance induced thresholdvoltage shift

To derive a description of the INWE the influence of the gate overlap onthe LOCOS must be determined. Publications on this area try to relate thecapacity at the edges to the LOCOS thickness [3]. The expression derivedin [3] is:

C _2fozll ( 2Td)edge - n T

11' oz

Where Td is the gate thickness and Toz is the LOCOS thickness.The state of inversion is achieved when the surface potential in the silicon

reaches:

(2.11)

39

+****** GRAPHICS PLOT ******

E7746 P1510

( A)

1E-07

dQcadQ/div

----~~~~

? ".~~/:: ~

~~ ~/~~. ~

h~ / ~~

~ Vn.;';J

~ ~- :...-. /

I--- ,-- .... ,

1E-14.0000

VGS • 1000/d1 v (V)1.000

Figure 2.17: Measured subthresholdcurves for W=0.S/0.6/0.7/1.0/2.0 Ilm

L = 10 IJrn

40

The gate voltage Vg in this s:tuation is by definition equal to Vc. Vg canbe expressed as:

(2.12)

(2.13)

Due to the continuity of the displacement vector D across the oxide-silicon boundary: .

(2.14)

Gauss theorem relates the electrical field at the silicon -oxide boundaryto the amount of charge in the silicon

(2.15)

This relation is derived for an ideal capacitor without fringing effectsat the sides. The LOCOS structure however limits the physical size of thecapacitance and introduces consiJerable fringing. This results in a surfacecharge that depends on the position in the channel. For a simplified structurethe charge can be approximated for two points in the channel : The centerof the channel and the edge. Thesl two points are shown in figure 2.18,together with the simplified device crosssection. The cross section is a goodapproximation of reality because the inversion layer is extremely thin andso limits the area of interest to that part of the channel where the sidewallsare almost vertical.

The capacitance in the middle of the channel is given by

c = fOf,.A

d

41

(2.16)

(hocos = O.5;p.~m:5=================i~""Device width

Figure 2.18: device crosssection.

42

where Er is the relative permittivity for oxide, A is the gate area, and dis the oxide thickness.

The areas near the LOCOS sidewalls however have a different geometry.We can approximate the capacity at this point by superimposing two terms,which we can calculate easy when separated:

First we calculate the part caused by the normal gate oxide. The capacitycan be regarded as half the capacity of an infinite capacitor as can be seenin figure 2.19 below.

LOC05

Figure 2.19: Point B as half of an infinite capacitor

The second part is an integral from the edge to infinity, correspondingto the overlap the gate has with the locos. This overlap is inevitable andmust be accounted for. The electric field E at point B can be split into a

E" and E~ component:

dE = (f sin f3dP" 27rEOEr cos f3

43

(2.17)

(2.18)

Both equations must be integrl\ted from P=0 to P= 11' /2 to obtain theelectric field.

:.-

Which finally yields:

lfr

/2 u tan PdP

Ell =o 211'£0£,

(2.19)

(2.20)

(2.21)

(2.22)

The log value of 0 (cos 11' /2) does not exist. If we however limit the rangeof the integral to the right by limiting the angle P 1 then the equation canbe written as:

E = V1"721~u211"£0£'

with G = logcosPmaz.

The value for an infinite capacitor is:

E=_U_2£0£,

(2.23)

(2.24)

lLimiting the angle IJ hu not on/va mathematical background: the gate overlap can belarge but does not continue into infinity. Limiting IJ is equivalent to limiting the overlap

44

If we relate both results we can find a boundary for the Inverse NarrowWidth Effect. It relates the overlap of the gate to the right to the gate oxidethickness.

11"( __ )2 +G 2 = 11"2

2Solving this equation for G:

G= 011"2

(2.25)

(2.26)

G stands for log cos W, so we find W = 86° and a ratio between overlap andoxide thickness of ~ 15 Ofcourse this is only an indication of the capacitanceincrease in the edges of the channel but it can predict the occurance of theINWE in relation to the gate overlap for situations where a flat oxide isused.

In general there will be a gradual increase in capacity from the center tothe edges. The channel can then be regarded as an infinite number of verysmall capacitors all connected in parallel as shown in figure 2.20.

To get the total capacity we must integrate all capacitors along thechannel:

[chwidlhCeJ! = 1

0C(x)dx

The voltage across the oxide can now be expressed as :

This way we find for Vg :

-Q~Vg = -C +4.>~

eJ!

45

(2.27)

(2.28)

(2.29)

Figure 2.20: Channel capacity.

46

Which leads to a threshold voltage of:

(2.30)

Under strong inversion we must include the depletion and the inversionlayer:

(2.31)

(2.32)

Now the inversion layer charge can be expressed as:

(2.33)

All formulas can be changed to an expression of the local value of e.g.the threshold voltage by replacing GelI by qocal. This implies that thethresholdvoltage varies along the channel.

Predicting the peak values

The result of 2.1.5 is that we have an indication what is causing the increasein charge in the edges. It is not possible to predict for every gate voltageand every device shape the charge density or even distribution in the edgearea. There is however a method to prove that the increase in charge canbe modeled by an decrease in threshold voltage from center to edge.

First the ratio between the charge density in the center and the chargedensity at the edges was calculated by SEMMY for various gate voltages.The curve shown in figure 2.21 is the result of this simulations. A part ofthe accumulation and depletion region was included to show the relationshipbetween center and edge doesn't stop at the end of the inversion range. The

47

•o-

"o-...

uo0-

"(I)o

Simulated

a

~+---......,----.,..----....,..----,......---..,0.30 0.78 1.26

VG1.7" 2.22 2.70

Figure 2.21: Edge-to-center charge ratio

48

absolute values of the charge density was taken to make logarithmic plottingpossible.

To demonstrate that only a threshold shift exists between center andedge the original center IdlV, curve was taken and shifted -0.5 volt to ap­proximate the IdlV, curve in the channel edge. Both center and edge curveis plotted in figure 2.22.

0.6

o

+----,.-------r----r---.,...---,3.D

Figure 2.22: Two Id - V, curves, one shifted 0.5 V, same device.

For every gate voltage the ratio of point A and B was determined. Thisresulted, after some fine adjustments, in the curve in figure 2.23 where it iscompared with the curve generated by SEMMY.

This procedure was repeated with the IdlV, curves of devices with var­ious widths and with the same thresholdvoltage shift. This resulted in thecurves of figure 2.24.

In the inversion range the calculated and modeled curves differ a factor4. This can not be corrected by just introducing a larger thresholdvoltageshift, but can be explained by the fact that the capacitance (which doesmore than just influencing V') is higher at the edges than in the center as

49

•o

...o

..UO0­.......

CDa

oSimulated

ApproximationCI

O+-----r------r------r------.-----,0.30 0.78 1.26

VG1.74 2.22 2.70

Figure 2.23: Resulting capacity ratio curve, compared to SEMMY output

50

·o

...o

...000­,IIIo

o

°0 -+- ...,...... ....- .,....--__--,.---__---.

.30 0.78 1.26VG

1.7i 2.22 2.70

Figure 2.24: SEMMY charge ratio output compared to approximations withIdIV, curves of various widths.

51

shown in 2.1.5.

2.1.6 Secondary effects

One of the secondary effects of the threshold voltage difference betweenthe center and the edges of the channel is that the current distribution isnot uniform. This non-uniformity can cause problems with the operationallifetime of the transistors. Hot electron effects are most likely to occurin the pinch-off region at the drain side at the edges, which reaches thestate of saturation before the rest of the channel. A visualization of thiseffect is given in figure 2.25. Although the oxide above the rest of thechannel is not damaged, the device will fail when the hot electrons havedegraded the quality of the gate oxide at the drain side. To counter act thisdestruction an additional implant at the LOCOS sidewalls could be usedto raise the threshold voltage to the normal level [1]. However this is notfeasable from the viewpoint of the fabrication process where every extraprocess step decreases the yield.

Drain .ide

Source .idl'

LOCOS

Figure 2.25: Hot electron spots in channel.

Furthermore the threshold voltage will decrease with drecreasing devicewidth. The short channel effect also causes a decrease in threshold voltageso that both the INWE and short channel effect work into the same direc­tion. The Narrow Width Effect (not the INWE) could be used to balancethe decrease of Vi and stabelize it at a required level. With the currentlyemployed device structure this is not possible and other methods must be

52

Chapter 3

Double retrograde wellisolation

3.1 Device isolation

3.1.1 isolation structures

To isolate adjacent MOS transistors in CMOS a thick oxide layer is grownin between two devices to increase the thresholdvoltage to avoid inversion.This field oxide is called LOCOS. A high dopant concentration under theLOCOS also helps to decrease the leakage current. This doping area is calledthe channel stopper. By using a thick oxide and a high doping level at theSi - Si02 interface an inversion channel formation between two devices,which would result in a parasitic transistor is avoided. In figure 3.1 the basiccross section is shown of a CMOS structure, with field oxide and channelstoppers indicated. There are several parasitic transistors located in thefieldoxide area. They can be divided into the symmetric and asymmetricparasitic transistors. Symmetric transistors are always formed between twosource and/or drain areas. They have a drain and a source of comparabledimensions and positions. The asymmetric devices are formed using a sourceor drain region and a well region. The well forms the drain of this device andis much larger and lighter doped as the source area. In figure 3.2 severalsymmetric and asymmetric devices are shown.

To increase the number of transistors on one chip not only the transistorsmust be reduced in size, but also the isolation areas must be decreased. Todecrease the occupied area one could just reduce the length and the widthof the area while keeping the oxide thickness the same, but this causes

54

Atl

Figure 3.1: CMOS structure.

55

'M~ F~' P/l~AS;f"C flVHJSrSfDIt. .

t"."R.""'~""6"*

~~

. \'

~ ~I'f'" "f~ie. flt ..~;+'e Io.AIlISIS/D-.

Figure 3.2: parasitic transistors in CMOS.

56

the slopes of the oxide to be mLlch steeper. These steep slopes with smallopenings in between them result in problems in the area of contacting andmetallization. This means that not only the oxide length and width m~t

be decreased, but also the oxide thickness. A flat oxide would be ideal formetalization.

Configuration used for simulat~on is shown in fig 3.3 together with thedefinition of the dimensions used in all graphs.

~:;::r;;::;'::::=:====~i:~=:==:=======~=~J3':1SF ":15

Figure 3.3: Doping profile and well locations with definitions of dimensions.

3.2 ISEM

3.2.1 ISEM, The postroutine

The ISEM program [9] is a p08tprocessing routine for SEMMY the purposeof which it is to determine the current path and current density from thepotential distribution provided by SEMMY as the solution to a problem.ISEM accomplishes this by scanning the entire potential matrix and search­ing the saddle point in this distribution. The current path can then be

57

reconstructed. Once the current path is found, ISEM calculates the currentwidth and current density for several relevant points in the current path.With this data ISEM calculates the current flowing along the current path.The value of the current at the saddle point is the most accurate result,although the results of other points along the current path should not differtoo much. The ISEM version that was used for this report was a totallyrewritten version compared to the one used in \6J. The old version producedsuspicious results when the area in which to search the current path wasnot strictly limited to the area where to expect the current path. There isoften another local maximum or minimum 0.5 to 2 pm deeper in the de­vice. If this was only slightly higher (or lower) than value in the real currentpath ISEM would jump to that position and produce erroneous results. Thenew version was tested for extreme situations and always found the correctcurrent path.

3.2.2 Calculating the current

At thermal equilibrium the electron current density is given by:

(3.1)

Where Dn IS the electron diffusion coefficient and Pn is the electronmobility.

When substituting Dn using the Einstein relation this changes to:

KT d\llI n = qPn(-dn - n-

d)

q r

Using

qn = nj exp KT (\II - 4Jn)

this results in:

58

(3.2)

(3.3)

(3.4)

This relates the fermilevel to the electron current density.

H there exists a different fermi potential in two regions the current be­tween these two regions can be calculated using the fermi levels and thepotential distribution.

The equation for I n can be rewritten as:

J _ (dexp (-J!T4>f)) KT q..l.n - qIJ.n" dr q exp KT'+'f (3.5)

Equation ( 3.3) can be rewritten to replace ~f by the electrostatic po­tential.

q q"exp KT ~f = "i exp KT \11

Substituting ( 3.6) in ( 3.5) results in :

(3.6)

(3.7)

This equation can be integrated from point A with fermilevel ~fa topoint B with fermilevel ~fb, which yields the final expression for I n:

_ _"'....:..'(e_x_p(..;...---"-h......T_~-=-f....:..b)_-:;-e-=-x-,-p..;...(-......-h~~--'-f-'-a)I n -rb exp-ir· drJa qDn

(3.8)

Knowing In.is not enough to determine the current so additional infor­mation about the width of the current path is needed. The width of thecurrent path is equivalent to the area through which the current passes.

59

This area can be found by limiting the potential difference 6.V between anypoint in the integration area and the maximum (or minimum) to 200 mY.This seems to be a reasonable limit. Limiting the integration area width·~to

100 mV would cut of part of the integration area) but a limit 300 mV wouldnot contribute to a more accurate result. SEMMY expresses the currentin A/cm because it is a 2-dimensional simulator. In figure 3.4-a potentialdistribution is drawn with a indication how SEMMY determines the areaoccupied by the current.

YIfIN/ J-I/'fiNl- °er,,6/-Figure 3.4: Potential distribution as a function of the depth

The current densities are determined by the electron concentrations sothe effective area can be calculated using:

(3.9)

The electron current in A/cm ca.n be calculated by multiplying 3.8 and3.9. This gives the fina.l result because the currentpath is always perpendic­ular to the integration axis.

60

3.3 Simulation results

3.3.1 Varying the oxide thickness

Due to a thinner oxide the gateoxide capacitance is increased considerably,and therefore the threshold voltage for N-channel devices is decreased, re­sulting in a higher leakage current. The purpose of simulation was to findthe thickness / width / doping combination that would result in a leakagecurrent of less than le-ll A/em. This current level will result in about 1IJA of total leakage current on the chip which is acceptable.

First the thickness is decreased gradually from 0.5 IJm to 0.18 IJm, for a2.5 IJm wide device with 5e16 doping, to see how the gate thickness influ­ences the current. In figure 3.5 the 3.6, 5 and the 7 Volt curves are plotted,the same voltages with twice the normal dope can be found in figure 3.6.This shows that doubling the doping concentration has a tremendous effecton the leakage current. The large decrease of the current indicates that it isprobably not necessary to increase the doping level beyond 2e17 (four timesthe normal doping concentration) even when the LOCOS width is reduced.The general conclusion is that when more doping and lower gate voltagesare used, the slope of the Id/doz curves will be smaller. To minimize theeffect of process variations it is necessary to have the smallest slope possible.Process variations include mechanical variations e.g. mask missalignmentand chemical variations e.g. the dope level. Due to the smaller device di­mensions the supply voltage must be decreased to 3.6 Volts which resultsautomaticly in a lower current level, that is less sensitive to process varia­tions, without changing doping or oxide thickness. The margin gained bydecreasing the supply voltage can be traded in for smaller and thinner fieldoxides. A thickness of 0.25 IJm is desirable to make the top of the chip moreflat and metallization easier.

3.3.2 Varying the oxide width

To achieve a higher packing density not only the devices must be scaleddown in size, also the isolation areas which consume a relatively large spacemust be decreased. To achieved this the minimum width of the LOCOS mustbe decreased. This can be done without decreasing the LOCOS thicknessbut that would impose large problems on metallization because of the steepslopes arising from the maintained oxide thickness. It is better to chooseseveral device widths and determine the influence of decreasing the oxidethickness on the leakage current for every width separately. Mter this the

61

No = 5e16

W=2.S",m

N

'0-':'o­..'0-1ftIo-'Po-':"o

E-P~

'" 0-­« CIl-'0~~

~ '0=­'" ";".. 0IIID ........lIS -

\-: 10.. ,.,........:l ";"

o.......'0.".­";"

O-+------r----'T"'""---......,..----.-------,0.180 0.211 0.308 0.372

Oxide 'hickneu (14m)

0.136 0.500

Figure 3.5: Leakage current depending of LOCOS thickness, normal dope.

62

cr0-

coi0-

I

0-~-,e 0

u -......<-!:!~ Ic: 0..t: -:lu.. ::~ I

• 0.-: -•~

II>j"

vP;0-00-X{\J

0.180 0.244 0.308 0.372Oxide 'hickneee (pm)

0.436

Nfl = le17

W=2.5 pm

Vee = 7V

Vee = 5V

Vee = 3.6V

0.500

Figure 3.6: Leakage current depending of LOCOS thickness, twice the nor­mal dope.

63

doping concentration can be increased to yield a current level low enoughfor isolation. The submicron MOSFET will be operated from a 3.6 Volsupply normally, but, due to temporary overstressing 1, voltages as high5 Volt can arise in the circuit. The simulations are therefore carried outwith a gate voltage of 5 Volt. The four curves in figure 3.7 are calculatedat a doping level of le17 atoms / ems and show the influence of the oxidethickness at an oxide width of 2.3 p.m, 2.1 p.m, 1,7 p.m, 1.3 p.m. Up to 1.7p.m the double doping concentration is enough to ensure good isolation. At1.3 p.m it is only adequate up to a minimum oxide thickness of 0.27 p.m.

A decrease in oxide width from 2.3 p.m to 1.3 p.m yields an increase incurrent of two decades for an oxide thickness of 0.5 p.m but if the samecomparison is repeated for d=0.27 p.m the increase is almost 6 decades. Notonly the influence of the thickness is large, also the influence of the devicewidth is larger, as can be seen in figure 3.7 as an increase in slope for smallerdevice widths.

Reducing the oxide width introduces an increase in current but not withthe expected curve form. As can be seen in figure 3.8 the curve form at adoping level of Se16 can be divided in three parts. The part on the righthandside is quite flat and increases slowly. This part represents the situationwhen the parasitic channel is under the flat surface of the oxide. The oxidethickness is constant and the increase is only caused by the decrease inchannel length due to the decrease in oxide width.The well-junction staysexactly in the middle of the LOCOS. When the curved sidewall approachesthe well junction (where the depletion area is located) , the oxide abovethe channel is thinner and the current increases more rapidly, rsulting ina steeper slope in the curve. Finally if the LOCOS edge is near the welljunction the oxide thickness is constant again and the slope is almost backto the value when the channel was completely under the flat part of theoxide.

3.3.3 Varying the well position

Varying the well position yields the same results as described in 3.3.2 onlyhere the well position is shifted, causing a decrease in parasitic channellength. The curve shown in figure 3.9 shows indeed the same basic form asthe curve in figure 3.8 but the current doesnot saturate as strongly. Thecurve was calculated for a device of 2.5 p.m width and a LOCOS thickness of0.26 p.m. The LOCOS thickness is down to the desired size, but the width

le.g. MIL-lIpeclI

64

w=1.3~m

Vee = 5V

I0.136

W=1.7 ~m

_-..:::::::::::======== W=2.3~mW=2.5 ~m,

0.500I I I

0.211 0.308 0.372

LOCOS width (~m)

....I

0-..I

0-...

I

0-'"i"0- -E

u--~'o-..c:

!:!...t: I

:s 0u -.......If j"

.IC 0If... -..:l•I

0-~I

0- 0.180

Figure 3.7: Relation between leakage current and oxide thickness for variousLOCOS widths

65

...'0

rororo........,

-0e ...lJ,-0~ ......... '0;g-t'::t 0lJ =-:., '0

~r--.. 0~:!'""",

o~I

o~

~....1 ~__..,.- -..:-i I j i i1.80 1.9ot 2.08 2.22 2.36 2.50

LOCOS width (Ilm)

No. = le17

No = 2d7

Figure 3.8: Influence of well position on leakage current

66

was the original value because otherwise the curve area, where the channel islocated under the flat part of the oxide, would not be as distinct as it is now.From both curves a minimum edge to N-well distance can be determined.For a doping level of le17 the minimum distance was found to be 0.6 pm soa minimum LOCOS width of 1.2 pm (+process variations) is appropriate.

_IEU'OS

LEAKAGE CURRENT IWEL POSITION)

N" = lel7,.o

"o

.'0

...._0

E -u"_0<­-"0j;!"'tI·t ::=' =U'tI 0~!!""

.:= '0as ....,~'b

'!:'"'0.,r'

'04'---.,....----,...-----,----r----...,0.40 0.57 U.74 0.9\ \.08 1.25

Distance LOCOS edge ~ N well (#1m )__0.__- __._. -'

Figure 3.9: Influence of well position on leakage current

67

Chapter 4

Conclusions

The Inverse Narrow Width Effect.

1) Steep sidewalls like in the modern LOCOS structure induce an InverseNarrow Width Effect (INWE) unto the charge distribution in the channel.

2) The INWE causes an increase in total channel charge of ± 20 % if a0.6 J.Lm wide transistor is operated near threshold. The charge increase inthe channel edges is independant of the device width so the procentual in­crease depends strongly on device width.

3) A 0.6 J.Lm wide transistor, realized with a LOCOS thickness of 0.5 J.Lm,shows a decrease of Vt ~ 0.2 V compared to a very wide transistor.

4) The charge increase at the channel edges is caused by the increasedcapacitance due to the large gate - LOCOS overlap. If the distance gate ­channel edge is decreased by etching the LOCOS, the Inverse Narrow WidthEffect is even more severe.

5) The onset of the INWE can be predicted by a simple formula. By con­trolling the gate - LOCOS overlap, to a value of approximately 15 times theactive gate oxide thickness,the INWE can be reduced to a minimum. Butdue to the inherent overlap on one side of the channel the INWE can only

68

be avoided on the other side.

6) The charge density ratio between center and edge can be representedby assuming a difference in thresholdvoltage in these areas.

7) The INWE was confirmed by meaEurements which showed a similar de­crease of Vt when decreasing the device width.

Double retrograde well isolation.

1) To maintain a satisfactory isolatioJ'l between an N-well and a N+ junc­tion, at Vee = 3.6V, and a LOCOS width of 2.5 #-lm, while reducing theLOCOS thickness from 0.5 lim to 0.2 #-lm, a doping of le17 must be applied.

2) If a LOCOS thickness of 0.27 lim is sufficient, the width can be reducedto 1.3 lim. If the doping level too is increased to 2e17, the width can evenbe reduced to below 1.1 lim.

3) The position of the well junction has a large influence on the leakagecurrent. A minimum distance of 0.6 #-lm from N-well to the LOCOS edge isrequired.

69

Bibliography

[1] G. Fuse, A. Fukumoto e.a. A new isolation method with boron-implantedsidewalls for controlling narrow width effect. IEEE transactions on elec­tron devices, vol. ED-34, No.2, february 1987.

[2] J.Y. Chen, A.G. Lewis Parasitic transistor effects in CMOS VLSI.IEEE Circuits and devices magazine, vol. 4, No 3, May 1988.

[3] L.A. Akers Characterization of the Inverse Narrow Width Effect IEEETransaction on electron devices, Vol. ED-34, No. 12, December 1987.

[4] L.A. Akers Inverse Narrow Width Effects and small-geometry MOSFETthreshold voltage model IEEE Transaction on electron devices, Vol. ED­35, No.3, March 1988.

[5] Y.P. Tsividis Operation and modeling of the MOS transistor Mc Graw­Hill Book Company 1987

[6] P.H.A. Spijkers Modelling of parasitic field transistors in CMOS inte­grated circuits. Master thesis EEA/337 /08/1986 Department of Electri­cal Engineering, Eindhoven University of technology, The Netherlands

[7] S.M. Sze Physics of semiconductor devices, tnd Edition John Wileyand Sons, 1981

[8] N. Vossenstijn SEMMYuser manual ISA Mathematical software group,Philips Eindhoven, 1981.

[9] R. Petterson ISEM To be published, Philips Eindhoven, 1988.

70

List of symbols~ - ~--- --~--

UnitSymbol Description

A Capacitor area,- em:l-

C Capacitance F

Ccenter Gate capacitance at center of channel F/em2

C edl1e Gate capacitance at channel edge - F/em:l

Ce/f Effective gate capacitance F/em2

d di:,tance between capacitl)r plates cmDn Diffusion coefficient for ~lectrons e';":l / 8

---------- --

E Electric field V/cm-------- .-V/cmEoz Electric field in Si02

El'i Electric field in Silicon V/cmEll Y component of electric field -- V/cmEll: Z component of electric field V/cmf Permittivity F/cmfoz Relative permittivity in oxide F/cmf r Relative permittivity F/cm

--fO Permittivity in air F/cmId Drain current A

----A/em:lI n Electron current density

K Boltzmann constant J/KL Device length Jlmn Electron density em -3

No Acceptor doping concentration em -3

Nd _p~n~o~ do~in~ conce~~_~ati?n em -3-

-em -3ni Intrinsic carrier concentration

Jln ~lectro~mo~}~y em2/V sq,n Fermi potential for electrons Vq,p Fermi potential for holes V'ifb Bulk electrostatic potential V'if Electrostatic potential VWI' Surface electrostatic potential V

71

List of symbols-- -.-.----UnitSymbol Description

p Hole density..... em- 3.

q Elementary charge CQ. Surface charge on capacitor plate C

Q" Depletion layer chatge -' CQn Inversion layer charge Cp Space charge density C/em3

(7 Surface charge density Clem'·- -T _::r~~p_erat_ure K

--"Ttl. LOCOS thickness .-

IlmToz Gate oxide thickness Ilm

VII. Drain potentia~ V

Vel.", Drain potential at saturation VVFB Flatband voltage VVg Gate potential VVn Fermi potential for electrons VVoz Voltage across Si02 VV.

._-----~->--

._S~~r~~. ~otential VVt Threshold voltage VW LOCOS width IlmZ Device width Ilm

72