high speed cmos, series 74hc, on semiconductor

8/9/2019 High Speed CMOS, Series 74HC, ON Semiconductor

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HighSpeed CMOS Data

DL129/DRev. 8, January2005

SCILLC, 2005Previous Edition 2000All Rights Reserved


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ON Semiconductor and are registered trademarks of Semiconductor Components Industries , LLC (SCILLC). SCILLC reserves the right to make changes without further noticeto any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any

liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidentaldamages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary overtime. All operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC does not convey any license underits patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or deathmay occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim ofpersonal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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DL129/D

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Table of Contents

Page

Numeric Data Sheet ListingNumeric Data Sheet Listing 4. . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 1: Selector GuideBuffers/Inverters 11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Gates 13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Schmitt Triggers 15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Bus Transceivers 15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Latches 16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .FlipFlops 17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Digital Data Selectors/Multiplexers 19. . . . . . . . . . . . . . . . . .Decoders/Demultiplexers/Display Drivers 20. . . . . . . . . . . .Analog Switches/Multiplexers/ Demultiplexers 21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Shift Registers 23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Counters 24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Miscellaneous 25. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Page

Chapter 2: Data SheetsData Sheets 26. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 3: Case Outlines and PackageDimensionsCase Outlines and Package Dimensions 388. . . . . . . . . . . .

Chapter 4: IndexHighSpeed CMOS Device Index 406. . . . . . . . . . . . . . . . . .


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Numeric Data Sheet Listing

Data Sheet Function Page

MC74HC00A Quad 2Input NAND Gate HighPerformance SiliconGate CMOS 27. . . . . . . . . . . . .

MC74HC02A Quad 2Input NOR Gate HighPerformance SiliconGate CMOS 31. . . . . . . . . . . . . .

MC74HC03A Quad 2Input NAND Gate with OpenDrain Outputs HighPerformanceSiliconGate CMOS 35. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC04A Hex Inverter HighPerformance SiliconGate CMOS 39. . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC08A Quad 2Input AND Gate HighPerformance SiliconGate CMOS 43. . . . . . . . . . . . . .

MC74HC125A,MC74HC126A Quad 3State Noninverting Buffers HighPerformance SiliconGate CMOS 47 . . . . .

MC74HC132A Quad 2Input NAND Gate with SchmittTrigger Inputs HighPerformanceSiliconGate CMOS 51. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC138A 1of8 Decoder/ Demultiplexer HighPerformance SiliconGate CMOS 58. . . . . . . .

MC74HC139A Dual 1of4 Decoder/Demultiplexer HighPerformance SiliconGate CMOS 63 . . . .

MC74HC14A Hex SchmittTrigger Inverter HighPerformance SiliconGate CMOS 69. . . . . . . . . .

MC74HC157A Quad 2Input Data Selectors / Multiplexers HighPerformance SiliconGateCMOS 74. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC161A,MC74HC163A Presettable Counters HighPerformance SiliconGate CMOS 79. . . . . . . . . . . . . . . . .

MC74HC164A 8Bit SerialInput/ParallelOutput Shift Register HighPerformanceSiliconGate CMOS 92. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC174A Hex D FlipFlop with Common Clock and Reset HighPerformance SiliconGate CMOS 98. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC175A Quad D FlipFlop with Common Clock and Reset HighPerformanceSiliconGate CMOS 104. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC1G00 Single 2Input NAND Gate 110. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC1G02 Single 2Input NOR Gate 114. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC1G04 Single Inverter 118. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC1G08 Single 2Input AND Gate 122. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .


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MC74HC1G14 Single Inverter with SchmittTrigger Input 126. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC1G32 Single 2Input OR Gate 130. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC1GU04 Single Unbuffered Inverter 134. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC240A Octal 3State Inverting Buffer/Line Driver/Line Receiver HighPerformanceSiliconGate CMOS 138. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC244A Octal 3State Noninverting Buffer/Line Driver/Line Receiver HighPerformanceSiliconGate CMOS 143. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC245A Octal 3State Noninverting Bus Transceiver HighPerformance SiliconGateCMOS 148. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC273A Octal D FlipFlop with Common Clock and Reset HighPerformance SiliconGate CMOS 154. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC32A Quad 2Input OR Gate HighPerformance SiliconGate CMOS 160. . . . . . . . . . . . . .

MC74HC373A Octal 3State NonInverting Transparent Latch HighPerformance SiliconGate CMOs 164. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC374A Octal 3State NonInverting D FlipFlop HighPerformance SiliconGateCMOS 170. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC390A Dual 4Stage Binary Ripple Counter with 2 and 5 Sections HighPerformance SiliconGate CMOS 175. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC393A Dual 4Stage Binary Ripple Counter HighPerformance SiliconGate CMOS 181 . . .

MC74HC4020A 14Stage Binary Ripple Counter HighPerformance SiliconGate CMOS 187. . . . . .

MC74HC4040A 12Stage Binary Ripple Counter HighPerformance SiliconGate CMOS 193. . . . . .

MC74HC4046A PhaseLocked Loop HighPerformance SiliconGate CMOS 199. . . . . . . . . . . . . . . .

MC74HC4051A,MC74HC4052A,MC74HC4053A Analog Multiplexers / Demultiplexers HighPerformance SiliconGate CMOS 213 . . .

MC74HC4060A 14Stage Binary Ripple Counter With Oscillator HighPerformance SiliconGateCMOS 226. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC4066A Quad Analog Switch/Multiplexer/Demultiplexer HighPerformance SiliconGateCMOS 235. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC4316A Quad Analog Switch/Multiplexer/Demultiplexer with Separate Analog and DigitalPower Supplies HighPerformance SiliconGate CMOS 246. . . . . . . . . . . . . . . . . . . . .

MC74HC4538A Dual Precision Monostable Multivibrator (Retriggerable, Resettable) 257. . . . . . . . . . . . .


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MC74HC4851A,MC74HC4852A Analog Multiplexers/Demultiplexers with Injection Current Effect

Control Automotive Customized 270. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC540A Octal 3State Inverting Buffer/Line Driver/Line Receiver HighPerformanceSiliconGate CMOS 280. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC541A Octal 3State Noninverting Buffer/Line Driver/Line Receiver HighPerformanceSiliconGate CMOS 286. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC573A Octal 3State Noninverting Transparent Latch HighPerformanceSiliconGate CMOS 292. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC574A Octal 3State Noninverting D FlipFlop HighPerformance SiliconGateCMOS 298. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC589A 8Bit Serial or ParallelInput/SerialOutput Shift Register with 3StateOutput HighPerformance SiliconGate CMOS 304. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC595A 8Bit SerialInput/Serial or ParallelOutput Shift Register with Latched 3StateOutputs HighPerformance SiliconGate CMOS 313. . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HC74A Dual D FlipFlop with Set and Reset HighPerformance SiliconGate CMOS 321 . . .

MC74HCT04A Hex Inverter With LSTTLCompatible Inputs HighPerformanceSiliconGate CMOS 326. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HCT138A 1of8 Decoder/ Demultiplexer with LSTTL Compatible Inputs HighPerformanceSiliconGate CMOS 330. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HCT14A Hex SchmittTrigger Inverter with LSTTL Compatible Inputs HighPerformanceSiliconGate CMOS 335. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HCT244A Octal 3State Noninverting Buffer/Line Driver/Line Receiver with LSTTLCompatibleInputs HighPerformance SiliconGate CMOS 340. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HCT245A Octal 3State Noninverting Bus Transceiver with LSTTL CompatibleInputs HighPerformance SiliconGate CMOS 344. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HCT273A Octal D FlipFlop with Common Clock and Reset with LSTTLCompatibleInputs HighPerformance SiliconGate CMOS 349. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HCT373A Octal 3State Noninverting Transparent Latch with LSTTLCompatible

Inputs HighPerformance SiliconGate CMOS 353. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HCT374A Octal 3State Noninverting D FlipFlop with LSTTLCompatibleInputs HighPerformance SiliconGate CMOS 359. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HCT541A Octal 3State NonInverting Buffer/Line Driver/Line Receiver With LSTTLCompatibleInputs HighPerformance SiliconGate CMOS 364. . . . . . . . . . . . . . . . . . . . . . . . . . . . .


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MC74HCT573A Octal 3State Noninverting Transparent Latch with LSTTL CompatibleInputs HighPerformance SiliconGate CMOS 368. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HCT574A Octal 3State Noninverting D FlipFlop with LSTTLCompatibleInputs HighPerformance SiliconGate CMOS 373. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HCT74A Dual D FlipFlop with Set and Reset with LSTTL CompatibleInputs HighPerformance SiliconGate CMOS 378. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC74HCU04A Hex Unbuffered Inverter HighPerformance SiliconGate CMOS 383. . . . . . . . . . . . . .


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CHAPTER 1Selector Guide


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BUFFERS/INVERTERS

DeviceNumber

MC74

Function

FunctionalEquivalent

LSTTLDevice

74


CMOSDevice

MC1XXXXor CDXXXX

Direct PinCompatibility

Numberof

Pins

HC04AHCT04AHCU04AHC14A

HCT14A

Hex InverterHex Inverter with LSTTLCompatible InputsHex Unbuffered InverterHex SchmittTrigger InverterHex SchmittTrigger Inverter with LSTTLCompatible

Inputs

LS04LS04LS04LS14LS14

*4069*4069406945844584

LS/CMOSLS/CMOSLS/CMOSLS/CMOSLS/CMOS

1414141414

HC125AHC126AHC240A

Quad 3State Noninverting BufferQuad 3State Noninverting BufferOctal 3State Inverting Buffer/Line Driver/Line Receiver

LS125,LS125ALS126,LS126A

LS240

LSLSLS

141420

HC244A

HCT244A

HC245AHCT245A

Octal 3State Noninverting Buffer/Line Driver/LineReceiver

Octal 3State Noninverting Buffer/Line Driver/Line

Receiver with LSTTLCompatible InputsOctal 3State Noninverting Bus TransceiverOctal 3State Noninverting Bus Transceiver with

LSTTLCompatible Inputs

LS244

LS244

LS245LS245

LS

LS

LSLS

20

20

2020

HC540A

Octal 3State Inverting Buffer/Line Driver/Line Receiver

20

HC541A

HCT541A

Octal 3State Noninverting Buffer/Line Driver/LineReceiver

Octal 3State Noninverting Buffer/Line Driver/LineReceiver with LSTTLCompatible Inputs

LS541

LS541

LS

LS

20

20

HC Devices Have CMOSCompatible Inputs. HCT Devices Have LSTTLCompatible Inputs.

Device

HCHCT04A

HCU04A

HC14A

HC125A

HC126A

HC240A

HCHCT244A

HCHCT245A

# Pins

14

14

14

14

14

20

20

20

Quad DeviceHex DeviceOctal DeviceNineWide Device

D

D

D

D

D

D

D

D

Noninverting OutputsInverting Outputs

D

D

D

D

D

D

D

D

Single Stage (unbuffered)

D

Schmitt Trigger

D

3State Outputs

OpenDrain OutputsCommon Output EnablesActiveLow Output EnablesActiveHigh Output EnablesSeparate 4Bit SectionsSeparate 2Bit and 4Bit Sections

D

D

D

D

D

D

D

D

D

D

D

D

D

D

D

TransceiverDirection Control

D

D

LogicLevel Down Converter


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BUFFERS/INVERTERS (Continued)


Device

HC540A

HCHCT541A

# Pins

20

20

Quad DeviceHex DeviceOctal DeviceNineWide Device

D

D


D

D

Single Stage (unbuffered)

Schmitt Trigger

3State OutputsOpenDrain OutputsCommon Output EnablesActiveLow Output Enables

D

D

D

D

D

D


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GATES

DeviceNumber

MC74

Function


LSTTLDevice

74


CMOSDevice

MC1XXXXor CDXXXX


Numberof

Pins

HC00AHC02AHC03AHC08AHC32AHC86A

HC132A

Quad 2Input NAND GateQuad 2Input NOR GateQuad 2Input NAND Gate with OpenDrain OutputsQuad 2Input AND GateQuad 2Input OR GateQuad 2Input Exclusive OR GateQuad 2Input NAND Gate with SchmittTrigger Inputs

LS00

LS08LS32LS86

LS132

40114001*40114081407140704093

LS

LSLSLSLS

14141414141414

HC Devices Have CMOSCompatible Inputs.

Device

HC00A

HC02A

HC03A

HC08A

HC32A

# Pins

14

14

14

14

14

Single DeviceDual DeviceTriple DeviceQuad Device

D

D

D

D

D

NANDNORANDOR

D

D

D

D

D

Exclusive ORExclusive NORANDNORANDOR

2Input3Input4Input8Input13Input

D

D

D

D

D

SchmittTrigger Inputs

OpenDrain Outputs

D


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GATES (Continued)


Device

HC86A

HC132A

# Pins

14

14

Single Device

Dual DeviceTriple DeviceQuad Device

D

D

NANDNORANDOR

D

Exclusive ORExclusive NORANDNORANDOR

D

2Input

3Input4Input8Input13Input

D

D

SchmittTrigger Inputs

D

OpenDrain Outputs


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SCHMITT TRIGGERS

DeviceNumber

MC74

Function


LSTTLDevice

74


CMOSDevice

MC1XXXXor CDXXXX


Numberof

Pins

HC14AHCT14A

HC132A

Hex SchmittTrigger InverterHex SchmittTrigger Inverter with LSTTLCompatible

InputsQuad 2Input NAND Gate with SchmittTrigger Inputs

LS14LS14

LS132

45844584

4093

LS/CMOSLS

LS

1414

14

BUS TRANSCEIVERS

Device

NumberMC74

Function


LSTTL

Device74


CMOSDevice

MC1XXXXor CDXXXX


Number

ofPins

HC245AHCT245A

Octal 3State Noninverting Bus TransceiverOctal 3State Noninverting Bus Transceiver withLSTTLCompatible Inputs

LS245LS245

LSLS

2020


Device

HCHCT245A

# Pins

20

Quad DeviceOctal Device

D

BufferStorage Capability

D

Inverting OutputsNoninverting Outputs

D

Common Output EnableActiveLow Output EnableActiveHigh Output Enable

D

D

Direction Control

D


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LATCHES

DeviceNumber

MC74

Function


LSTTLDevice

74


CMOSDevice

MC1XXXXor CDXXXX


Numberof

Pins

HC373AHCT373A

Octal 3State Noninverting Transparent LatchOctal 3State Noninverting Transparent Latch with


LS373LS373

LS373LS373

2020

HC573AHCT573A

Octal 3State Noninverting Transparent LatchOctal 3State Noninverting Transparent Latch with


LS373LS373

LS573LS573

2020


Device

HCHCT373A

HCHCT573A

# Pins

20

20

Single DeviceDual DeviceOctal Device

D

D

Number of Bits Controlled by Latch Enable :28

D

D

TransparentAddressableReadback Capability

D

D

Noninverting Outputs

Inverting Outputs

D

D

Common Latch Enable, ActiveLow

D

D

3State OutputsCommon Output Enable, ActiveLow

D

D

D

D

These devices are identical in function and are different in pinout only: HC/HCT373A and HC/HCT573A


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FLIPFLOPS

DeviceNumber

MC74

Function


LSTTLDevice

74


CMOSDevice

MC1XXXXor CDXXXX


Numberof

Pins

HC74AHCT74A

Dual D FlipFlop with Set and ResetDual D FlipFlop with Set and Reset with


LS74,LS74ALS74,LS74A

*40134013

LSLS

1414

HC174AHC175A

Hex D FlipFlop with Common Clock and ResetQuad D FlipFlop with Common Clock and Reset

LS174LS175

41744175

LS/CMOSLS/CMOS

1616

HC273AHCT273A

HC374AHCT374A

Octal D FlipFlop with Common Clock and ResetOctal D FlipFlop with Common Clock and Reset with

LSTTLCompatible InputsOctal 3State Noninverting D FlipFlopOctal 3State Noninverting D FlipFlop with


LS273LS273

LS374LS374

LSLS

LS374LS374

2020

2020

HC574AHCT574A

Octal 3State Noninverting D FlipFlopOctal 3State Noninverting D FlipFlop withLSTTLCompatible Inputs

LS374LS374

2020

*Suggested alternative


Device

HCHCT74A

HC174A

HC175/A

# Pins

14

16

16

Type

D

D

D

Dual DeviceQuad DeviceHex DeviceOctal Device

D

D

D

Common ClockNegativeTransition ClockingPositiveTransition Clocking

D

D

D

D

D

Common, ActiveLow Data Enables


D

D

D

D

D

3State OutputsCommon, ActiveLow Output Enables

Common ResetActiveLow ResetActiveHigh Reset

D

D

D

D

D

ActiveLow Set

D



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FLIPFLOPS (Continued)


Device

HCHCT273A

HCHCT374A

HCHCT574A

# Pins

20

20

20

Type

D

D

D

Dual DeviceQuad DeviceHex DeviceOctal Device

D

D

D

Common ClockNegativeTransition ClockingPositiveTransition Clocking

D

D

D

D

D

D

Common, ActiveLow Data Enables


D

D

D

3State Outputs

Common, ActiveLow Output Enables

D

D

D

D

Common ResetActiveLow ResetActiveHigh Reset

D

D

ActiveLow Set


These devices are identical in function and are different in pinout only: HC374A and HC574A


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DIGITAL DATA SELECTORS/MULTIPLEXERS

DeviceNumber

MC74

Function


LSTTLDevice

74


CMOSDevice

MC1XXXXor CDXXXX


Numberof

Pins

HC157A

Quad 2Input Noninverting Data Selector/Multiplexer

LS157

LS

16

HC251HC253

HC257

8Input Data Selector/Multiplexer with 3State OutputsDual 4Input Data Selector/Multiplexer with 3State

OutputsQuad 2Input Data Selector/Multiplexer with 3State

Outputs

LS251LS253

LS257B

*4512

LSLS

LS

1616

16



Device

HC157A

# Pins

16

Description

One oftwo 4bitwords isselected

Single DeviceDual DeviceQuad Device

D

Data Latch with ActiveLow Latch Enable

Common Address1Bit Binary Address2Bit Binary Address3Bit Binary Address

D

D

Address Latch (Transparent)Address Latch (Nontransparent)ActiveLow Address Latch Enable

Noninverting OutputInverting Output

D

3State Outputs

Common Output EnableActiveHigh Output EnableActiveLow Output Enable

D

D


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20

DECODERS/DEMULTIPLEXERS/DISPLAY DRIVERS

DeviceNumber

MC74

Function


LSTTLDevice

74


CMOSDevice

MC1XXXXor CDXXXX


Numberof

Pins

HC138AHCT138A

HC139A

1of8 Decoder/Demultiplexer1of8 Decoder/Demultiplexer with LSTTLCompatible

InputsDual 1of4 Decoder/Demultiplexer

LS138LS138

LS139

*4028*4028

4556

LSLS

LS/CMOS

1616

16*Suggested alternative


Device

HCHCT138A

HC139A

# Pins

16

16

Input Description

3Bit Binary

Address

2Bit Binary

Address

Output Description

One of 8

One of 4

Single DeviceDual Device

D

D

Address Input LatchActiveHigh Latch EnableActiveLow Latch Enable

ActiveLow Inputs

ActiveLow OutputsActiveHigh Outputs

D

D

ActiveLow Output EnableActiveHigh Output Enable

DD

D

D

ActiveLow Reset

ActiveLow Blanking InputActiveHigh Blanking Input

ActiveLow LampTest Input

Phase Input (for LCDs)

DD Implies the device has two such enables


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21

ANALOG SWITCHES/MULTIPLEXERS/DEMULTIPLEXERS

DeviceNumber

MC74

Function


LSTTLDevice

74


CMOSDevice

MC1XXXXor CDXXXX


Numberof

Pins

HC4051AHC4052AHC4053AHC4066A

8Channel Analog Multiplexer/DemultiplexerDual 4Channel Analog Multiplexer/DemultiplexerTriple 2Channel Analog Multiplexer/DemultiplexerQuad Analog Switch/Multiplexer/Demultiplexer

405140524053

4066,4016

CMOSCMOSCMOSCMOS

16161614

K HC4316/A

K HC4851A

K HC4852A

Quad Analog Switch/Multiplexer/Demultiplexer withSeparate Analog and Digital Power Supplies

Analog Multiplexer/Demultiplexer with Injection CurrentEffect Control

Analog Multiplexer/Demultiplexer with Injection CurrentEffect Control

*4016

*4051

*4052

16

20

20

*Suggested alternative K HighSpeed CMOS design only


Device

HC4051A

HC4052A

HC4053A

HC4066A

# Pins

16

16

16

14

Description

A 3Bit AddressSelects One of 8

Switches

A 2Bit AddressSelects One of 4

Switches

A 3Bit AddressSelects VaryingCombinations ofthe 6 Switches

4 IndependentlyControlledSwitches


D

D

D

D

1to1 Multiplexing2to1 Multiplexing4to1 Multiplexing8to1 Multiplexing

D

D

D

D

ActiveHigh ON/OFF Control

D

Common Address Inputs2Bit Binary Address3Bit Binary Address

Address Latch with ActiveLow LatchEnable

D

D

D

D

D

Common Switch EnableActiveLow EnableActiveHigh Enable

D

D

D

D

D

D

Separate Analog and Control ReferencePower Supplies

D

D

D

Switched Tubs (for R ON and Prop. DelayImprovement)

D


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22

ANALOG SWITCHES/MULTIPLEXERS/DEMULTIPLEXERS (Continued)


Device

HC4316A

HC4851A

HC4852A

# Pins

16

20

20

Description

4 Independently

Controlled Switches(Has a Separate

Analog LowerPower Supply)

A 3Bit Address

Selects One of 8Switches

(Has Injection CurrentProtection)

A 3Bit Address

Selects VaryingCombinations ofthe 6 Switches

(Has Injection CurrentProtection)


D

D

D

1to1 Multiplexing2to1 Multiplexing4to1 Multiplexing8to1 Multiplexing

D

D

D

ActiveHigh ON/OFF Control

D

Common Address Inputs2Bit Binary Address3Bit Binary Address

D

D

D

D

Common Switch EnableActiveLow EnableActiveHigh Enable

D

D

D

D

D

D

Separate Analog and Control Reference Power Supplies

D

D

D

Switched Tubs (for R ON and Prop. Delay Improvement)

njection Current Protection

D

D


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23

SHIFT REGISTERS

DeviceNumber

MC74

Function


LSTTLDevice

74


CMOSDevice

MC1XXXXor CDXXXX


Numberof

Pins

HC164AHC165A

8Bit SerialInput/ParallelOutput Shift Register8Bit Serial or ParallelInput/SerialOutput Shift Register

LS164LS165

*4021

LSLS

1416

HC589A

HC595A

8Bit Serial or ParallelInput/SerialOutput Shift Registerwith 3State Output

8Bit SerialInput/Serial or ParallelOutput Shift Registerwith Latched 3State Outputs

16

16



Device

HC164A

HC165A

HC589A

HC595A

# Pins

14

16

16

16

4Bit Register8Bit Register

D

D

D

D

Serial Data InputParallel Data Inputs

D

D

D

D

D

D

Serial Output OnlyParallel OutputsInverting OutputNoninverting Output

D

D

D

D

D

D

D

D

D

Serial Shift/Parallel Load ControlShifts One Direction OnlyShifts Both Directions

D

D

D

D

D

D

PositiveTransition ClockingActiveHigh Clock Enable

D

D

D

D

D

Input Data Enable

D

Data Latch with ActiveHigh Latch Clock

D

Output Latch with ActiveHigh Latch Clock

D

3State OutputsActiveLow Output Enable

D

D

D

D

ActiveLow Reset

D

D


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24

COUNTERS

DeviceNumber

MC74

Function


LSTTLDevice

74


CMOSDevice

MC1XXXXor CDXXXX


Numberof

Pins

HC161A

HC163AHC390A

Presettable 4Bit Binary Counter with AsynchronousReset

Presettable 4Bit Binary Counter with Synchronous ResetDual 4Stage Binary Ripple Counter with 2 and 5

Sections

LS161,LS161A

LS161,LS161A

LS

LS

16

161616

HC393 AHC4020AHC4040AHC4060A

Dual 4Stage Binary Ripple Counter14Stage Binary Ripple Counter12Stage Binary Ripple Counter14Stage Binary Ripple Counter with Oscillator

LS393

*4520402040404060

LSCMOSCMOSCMOS

14161616



Device

HC161A

HC163A

HC390A

HC393A

HC4020A

HC4040A

HC4060A

# Pins

16

16

16

14

16

16

16

Single DeviceDual Device

D

D

D

D

D

D

D

Ripple CounterNumber of Ripple Counter Internal StagesNumber of Stages with Available Outputs

D

44

D

44

D

1412

D

1212

D

1410

Count Up

D

D

D

D

D

D

D

4Bit Binary CounterBCD CounterDecimal Counter

D

D

D

D

Separate 2 SectionSeparate 5 Section

D

D

OnChip Oscillator Capability

D

PositiveTransition ClockingNegativeTransition ClockingActiveHigh Clock EnableActiveLow Clock Enable

D

D

D

D

D

D

D

ActiveHigh Count Enable

DD

DD

ActiveHigh Reset

D

D

D

D

D

D

D

4Bit Binary Preset Data Inputs

BCD Preset Data InputsActiveLow Load Preset

D

D

D

D

Carry Output

D

D

DD implies the device has two such enables


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MISCELLANEOUS DEVICES

DeviceNumber

MC74

Function


LSTTLDevice

74


CMOSDevice

MC1XXXXor CDXXXX


Numberof

Pins

HC4046AHC4538A

PhaseLocked LoopDual Precision Monostable Multivibrator

(Retriggerable, Resettable)

40464538,4528

CMOSCMOS

1616


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26

CHAPTER 2Data Sheets


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Semiconductor Components Industries, LLC, 2004

December, 2004 Rev. 9

27 Publication Order Number:

MC74HC00A/D

MC74HC00A

Quad 2Input NAND GateHighPerformance SiliconGate CMOS

The MC74HC00A is identical in pinout to the LS00. The deviceinputs are compatible with Standard CMOS outputs; with pullupresistors, they are compatible with LSTTL outputs.

Features

PbFree Packages are Available* Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 mA High Noise Immunity Characteristic of CMOS Devices In Compliance With the JEDEC Standard No. 7 A Requirements Chip Complexity: 32 FETs or 8 Equivalent Gates

3 Y1

1 A1

PIN 14 = VCCPIN 7 = GND

LOGIC DIAGRAM

2B1

6 Y2

4 A2

5B2

8 Y3

9 A3

10B3

11 Y4

12 A4

13B4

Y = AB

Pinout: 14Lead Packages (Top View)

1314 12 11 10 9 8

21 3 4 5 6 7

VCC B4 A4 Y4 B3 A3 Y3

A1 B1 Y1 A2 B2 Y2 GND

*For additional information on our PbFree strategy and soldering details, pleasedownload the ON Semiconductor Soldering and Mounting TechniquesReference Manual, SOLDERRM/D.

MARKINGDIAGRAMS

A = Assembly LocationWL or L = Wafer LotYY or Y = YearWW or W = Work Week

TSSOP14DT SUFFIXCASE 948G

HC00A

ALYW

1

14

1

14PDIP14

N SUFFIXCASE 646

MC74HC00ANAWLYYWW

SOIC14

D SUFFIXCASE 751A

1

14

HC00AAWLYWW

LLHH

LHLH

FUNCTION TABLE

Inputs Output

A B

HHHL

Y

See detailed ordering and shipping information in the packagedimensions section on pag e 28 of this data sheet.

ORDERING INFORMATION

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MC74HC00A

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28

MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

VCC

DC Supply Voltage (Referenced to GND)

0.5 to + 7.0

V

Vin

DC Input Voltage (Referenced to GND)

0.5 to V CC + 0.5

V

Vout

DC Output Voltage (Referenced to GND)

0.5 to V CC + 0.5

V

Iin

DC Input Current, per Pin

20

mA

Iout

DC Output Current, per Pin

25

mA

ICC

DC Supply Current, V CC and GND Pins

50

mA

P D

Power Dissipation in Still Air, Plastic DIPSOIC Package

TSSOP Package

750500450

mW

Tstg

Storage Temperature

65 to + 150

C

TL

Lead Temperature, 1 mm from Case for 10 SecondsPlastic DIP, SOIC or TSSOP Package

260

C

Maximum ratings are those values beyond which device damage can occur. Maximum ratingsapplied to the device are individual stress limit values (not normal operating conditions) and arenot valid simultaneously. If these limits are exceeded, device functional operation is not implied,damage may occur and reliability may be affected.

Derating Plastic DIP: 10 mW/ C from 65 to 125 CSOIC Package: 7 mW/ C from 65 to 125 CTSSOP Package: 6.1 mW/ C from 65 to 125 C

For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor HighSpeed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

Max

Unit

VCC


2.0

6.0

V

Vin, Vout

DC Input Voltage, Output Voltage (Referenced to GND)

0

VCC

V

TA

Operating Temperature, All Package Types

55

+ 125

C

tr, tf

Input Rise and Fall Time V CC = 2.0 V(Figure 1) V CC = 4.5 V

VCC = 6.0 V

000

1000500400

ns


Device Package Shipping

MC74HC00AN PDIP14 2000 Units / Box

MC74HC00ANG PDIP14(PbFree)

2000 Units / Box

MC74HC00AD SOIC14 55 Units / Rail

MC74HC00ADG SOIC14(PbFree)

55 Units / Rail

MC74HC00ADR2 SOIC14 2500 Units / Reel

MC74HC00ADR2G SOIC14(PbFree) 2500 Units / Reel

MC74HC00ADT TSSOP14* 96 Units / Rail

MC74HC00ADTR2 TSSOP14* 2500 Units / Reel

For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel PackagingSpecifications Brochure, BRD8011/D.

*This package is inherently PbFree.

This device contains protectioncircuitry to guard against damagedue to high static voltages or electricfields. However, precautions mustbe taken to avoid applications of anyvoltage higher than maximum ratedvoltages to this highimpedance cir-cuit. For proper operation, V in andVout should be constrained to therange GND v (Vin or Vout ) v VCC .

Unused inputs must always betied to an appropriate logic voltagelevel (e.g., either GND or V CC ).Unused outputs must be left open.


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29

DC CHARACTERISTICS (Voltages Referenced to GND)

Guaranteed Limit

Symbol Parameter ConditionCCV 55 to 25 C 85 C 125 C Unit

VIH Minimum HighLevel InputVoltage

Vout = 0.1V or V CC 0.1V|Iout | 20 mA

2.03.04.56.0

1.502.103.154.20

1.502.103.154.20

1.502.103.154.20

V

VIL Maximum LowLevel InputVoltage


2.03.04.56.0

0.500.901.351.80

0.500.901.351.80

0.500.901.351.80

V

VOH Minimum HighLevel OutputVoltage

Vin = VIH or VIL|Iout | 20 mA

2.04.56.0

1.94.45.9

1.94.45.9

1.94.45.9

V

Vin =VIH or VIL |Iout | 2.4mA|Iout | 4.0mA|Iout | 5.2mA

3.04.56.0

2.483.985.48

2.343.845.34

2.203.705.20

VOL Maximum LowLevel OutputVoltage


2.04.56.0

0.10.10.1

0.10.10.1

0.10.10.1

V

Vin = VIH or VIL |Iout | 2.4mA|Iout | 4.0mA|Iout | 5.2mA

3.04.56.0

0.260.260.26

0.330.330.33

0.400.400.40

Iin Maximum Input LeakageCurrent

Vin = VCC or GND 6.0 0.1 1.0 1.0 mA

ICC Maximum Quiescent SupplyCurrent (per Package)

Vin = VCC or GNDIout = 0 mA

6.0 1.0 10 40 mA

NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor HighSpeed CMOS Data Book(DL129/D).

AC CHARACTERISTICS (CL = 50 pF, Input t r = tf = 6 ns)

VGuaranteed Limit

Symbol ParameterCCV 55 to 25 C 85 C 125 C Unit

tPLH ,tPHL

Maximum Propagation Delay, Input A or B to Output Y(Figures 1 and 2)

2.03.04.56.0

75301513

95401916

110552219

ns

tTLH,tTHL

Maximum Output Transition Time, Any Output(Figures 1 and 2)

2.03.04.56.0

75271513

95321916

110362219

ns

Cin Maximum Input Capacitance 10 10 10 pF

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ONSemiconductor HighSpeed CMOS Data Book (DL129/D).

Typical @ 25 C, V CC = 5.0 V, V EE = 0 VCPD Power Dissipation Capacitance (Per Buffer)* 22 pF

* Used to determine the noload dynamic power consumption: P D = CPD VCC 2f + ICC VCC . For load considerations, see Chapter 2 of theON Semiconductor HighSpeed CMOS Data Book (DL129/D).


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30

Figure 1. Switching Waveforms

GND

VCC

OUTPUT Y

INPUT A OR B

CL *

*Includes all probe and jig capacitance

TESTPOINT

90%

50%10%

tTLH

DEVICEUNDERTEST

OUTPUT

Figure 2. Test Circuit

Y A

B

Figure 3. Expanded Logic Diagram(1/4 of the Device)

tTHL

90%50%

10%

tPLH tPHL

tf tr


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December, 2004 Rev. 9


MC74HC02A/D

MC74HC02A

Quad 2Input NOR GateHighPerformance SiliconGate CMOS

The MC74HC02A is identical in pinout to the LS02. The deviceinputs are compatible with standard CMOS outputs; with pullupresistors, they are compatible with LSTTL outputs.

Features

PbFree Packages are Available* Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 mA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard

No. 7.0 A Chip Complexity: 40 FETs or 10 Equivalent Gates

LOGIC DIAGRAM

1 Y1

2 A1


3B1

Y4

Y = A + B

4 Y2

5 A2

6B2

10 Y3

8 A3

9B3

1311

A412

B4

PIN ASSIGNMENT

11

12

13

14

8

9

105

4

3

2

1

7

6

Y3

A4

B4

Y4

VCC

A3

B3

Y2

B1

A1

Y1

GND

B2

A2


MARKINGDIAGRAMS



HC02A

ALYW

1

14

1

14PDIP14

N SUFFIXCASE 646

MC74HC02ANAWLYYWW

SOIC14D SUFFIX

CASE 751A1

14

HC02A

AWLYWW

FUNCTION TABLE

A

LLHH

Inputs Output

B

LHLH

Y

HLLL



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32

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

VCC


0.5 to + 7.0

V

Vin


0.5 to V CC + 0.5

V

Vout


0.5 to V CC + 0.5

V

Iin


20

mA

Iout


25

mA

ICC


50

mA

P D


TSSOP Package

750500450

mW

Tstg

Storage Temperature

65 to + 150

C

TL


260

C

Maximum ratings are those values beyond which device damage can occur. Maximum ratingsapplied to the device are individual stress limit values (not normal operating conditions) and arenot valid simultaneously. If these limits are exceeded, device functional operation is not implied,damage may occur and reliability may be affected.




Symbol

Parameter

Min

Max

Unit

VCC


2.0

6.0

V

Vin, Vout


0

VCC

V

TA


55

+ 125

C

tr, tf


VCC = 6.0 V

000

1000500400

ns




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33

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

Guaranteed Limit

Symbol

Parameter

Test Conditions

VCCV

55 to25 C

v 85 C

v 125 C

Unit

VIH

Minimum HighLevel InputVoltage

Vout = 0.1 V or V CC 0.1 V|Iout | v 20 mA

2.03.04.56.0

1.52.1

3.154.2

1.52.1

3.154.2

1.52.1

3.154.2

V

VIL

Maximum LowLevel InputVoltage

Vout = 0.1 V or V CC 0.1 V|Iout | v 20 mA

2.03.04.56.0

0.50.9

1.351.8

0.50.9

1.351.8

0.50.9

1.351.8

V

VOH

Minimum HighLevel OutputVoltage

Vin = VIH or VIL|Iout | v 20 mA

2.04.56.0

1.94.45.9

1.94.45.9

1.94.45.9

V

Vin = VIH or VIL |Iout | v 2.4 mA|Iout | v 4.0 mA|Iout | v 5.2 mA

3.04.56.0

2.483.985.48

2.343.845.34

2.203.75.2

VOL

Maximum LowLevel OutputVoltage

Vin = VIH or VIL|Iout | v 20 mA

2.04.56.0

0.10.10.1

0.10.10.1

0.10.10.1

V

Vin = VIH or VIL |Iout | v 2.4 mA|Iout | v 4.0 mA|Iout | v 5.2 mA

3.04.56.0

0.260.260.26

0.330.330.33

0.40.40.4

Iin

Maximum Input LeakageCurrent

Vin = VCC or GND

6.0

0.1

1.0

1.0

mA

ICC

Maximum Quiescent SupplyCurrent (per Package)

Vin = VCC or GND|Iout | = 0 mA

6.0

1.0

10

40

mA

NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor HighSpeed CMOS Data Book(DL129/D).

AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input t r = tf = 6.0 ns)

Guaranteed Limit

Symbol

Parameter

VCCV

55 to25 C

v 85 C

v 125 C

Unit

tPLH ,tPHL


2.03.04.56.0

75301513

95401916

110552219

ns

tTLH,tTHL


2.03.04.56.0

75301513

95401916

110552219

ns

Cin

Maximum Input Capacitance

10

10

10

pF


Typical @ 25 C, V CC = 5.0 V

CPD Power Dissipation Capacitance (Per Gate)* 22 pF



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34



MC74HC02AN PDIP14 2000 Units / Box


2000 Units / Box

MC74HC02AD SOIC14 55 Units / Rail

MC74HC02ADG SOIC14(PbFree)

55 Units / Rail

MC74HC02ADR2 SOIC14 2500 Units / Reel

MC74HC02ADR2G SOIC14(PbFree)

2500 Units / Reel

MC74HC02ADT TSSOP14* 96 Units / Rail

MC74HC02ADTR2 TSSOP14* 2500 Units / Reel




tf trVCC

GND

90%50%10%

90%50%

10%

INPUT A OR B

OUTPUT Y

tPHL tPLH

tTLH tTHL *Includes all probe and jig capacitance


CL *

TEST POINT

DEVICEUNDERTEST

OUTPUT

EXPANDED LOGIC DIAGRAM(1/4 OF THE DEVICE)

Y

A

B


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March, 2000 Rev. 8


MC74HC03A/D

MC74HC03A

Quad 2Input NAND Gatewith OpenDrain OutputsHighPerformance SiliconGate CMOS


The HC03A NAND gate has, as its outputs, a highperformanceMOS NChannel transistor. This NAND gate can, therefore, with asuitable pullup resistor, be used in wiredAND applications. Havingthe output characteristic curves given in this data sheet, this device canbe used as an LED driver or in any other application that only requiresa sinking current. Output Drive Capability: 10 LSTTL Loads With Suitable Pullup

Resistor Outputs Directly Interface to CMOS, NMOS and TTL High Noise Immunity Characteristic of CMOS Devices Operating Voltage Range: 2 to 6V Low Input Current: 1 A In Compliance With the JEDEC Standard No. 7A Requirements Chip Complexity: 28 FETs or 7 Equivalent GatesDESIGN GUIDE

Criteria Value Unit

Internal Gate Count* 7.0 ea

Internal Gate Propagation Delay 1.5 ns

Internal Gate Power Dissipation 5.0 W

Speed Power Product 0.0075 pJ

* Equivalent to a twoinput NAND gate

PIN 14 = VCCPIN 7 = GND* Denotes opendrain outputs

LOGIC DIAGRAM

3,6,8,11 Y*

1,4,9,12 A

2,5,10,13B

OUTPUTPROTECTION

DIODE

VCC


1314 12 11 10 9 8

21 3 4 5 6 7





MC74HC03AN PDIP14 2000 / Box

MC74HC03AD SOIC14

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55 / Rail

MC74HC03ADR2 SOIC14 2500 / Reel

MARKINGDIAGRAMS


MC74HC03ADT TSSOP14 96 / Rail

MC74HC03ADTR2 TSSOP14 2500 / Reel


HC03A

ALYW

1

14

1

14PDIP14

N SUFFIXCASE 646

MC74HC03ANAWLYYWW

SOIC14D SUFFIX

CASE 751A

1

14

HC03AAWLYWW

LLHH

LHLH

FUNCTION TABLE

Inputs Output

A B

ZZZL

Y

Z = High Impedance


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36

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

VCC


0.5 to + 7.0

V

Vin


0.5 to V CC + 0.5

V

Vout


0.5 to V CC + 0.5

V

Iin


20

mA

Iout


25

mA

ICC


50

mA

P D

Power Dissipation in Still Air Plastic DIPSOIC Package

TSSOP Package

750500450

mW

Tstg

Storage Temperature

65 to + 150

C

TL


260

C

*Maximum Ratings are those values beyond which damage to the device may occur.Functional operation should be restricted to the Recommended Operating Conditions.




Symbol

Parameter

Min

Max

Unit

VCC


2.0

6.0

V

Vin, Vout


0

VCC

V

TA


55

+ 125

C

tr, tf


VCC = 6.0 V

000

1000500400

ns


V Guaranteed Limit

Symbol Parameter Condition V 55 to 25 C 85 C 125 C Unit


Vout = 0.1V or V CC 0.1V|Iout | 20 A

2.03.04.56.0

1.502.103.154.20

1.502.103.154.20

1.502.103.154.20

V



2.03.04.56.0

0.500.901.351.80

0.500.901.351.80

0.500.901.351.80

V



2.04.56.0

0.10.10.1

0.10.10.1

0.10.10.1

V


3.04.56.0

0.260.260.26

0.330.330.33

0.400.400.40

Iin Maximum Input Leakage Current V in = VCC or GND 6.0 0.1 1.0 1.0 A


Vin = VCC or GNDIout = 0 A

6.0 1.0 10 40 A

IOZ Maximum ThreeState LeakageCurrent

Output in HighImpedance StateVin = VIL or VIHVout = VCC or GND

6.0 0.5 5.0 10 A

NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor HighSpeed CMOS Data Book (DL129/D).




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MC74HC03A

http://onsemi.com

37

AC CHARACTERISTICS (CL = 50pF, Input t r = tf = 6ns)

Guaranteed Limit


tPLZ,tPZL


2.03.04.56.0

120452420

150603026

180753631

ns

tTLH,tTHL


2.03.04.56.0

75271513

95321916

110362219

ns


Cout Maximum ThreeState Output Capacitance(Output in HighImpedance State)

10 10 10 pF


Typical @ 25 C, V CC = 5.0 V, V EE = 0 V

CPD Power Dissipation Capacitance (Per Buffer)* 8.0 pF



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MC74HC03A

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38


CL *


TESTPOINTDEVICE

UNDERTEST

OUTPUT


1k Rpd

VCC

INPUT A90%50%10%

tftr

GND

VCC

OUTPUT Y

tPZL

tTHL

HIGHIMPEDANCE

VOL 10%

tPLZ

90%50%10%

VO, OUTPUT VOLTAGE (VOLTS)0 1 2 3 4 5

0

5

10

15

20

25

I D , S

I N K C U R R E N T ( m A )

Figure 3. OpenDrain Output Characteristics

A1

B1

A2

B2

An

Bn

1/4HC03

1/4

HC03

1/4HC03

Y1

Y2

Yn

TYPICAL T=25C

T=25C

T=85C

T=125C

EXPECTED MINIMUM*

VCC =5V

*The expected minimum curves are not guarantees, but are design aids.

VCC

PULLUPRESISTOR

OUTPUT

OUTPUT = Y1 Y2 . . . Yn= A1B1 A2B2 . . . AnBn

Figure 4. Wired AND

LED11/4

HC03

LED2

LEDENABLE

VCC+

VR+

VF

1/4HC03

VCC

DESIGN EXAMPLECONDITIONS: I

D^ 10mA

USING FIGURE NO TAG TYPICAL CURVE, at ID=10mA, VDS^ 0.4V

N R +VCC * VF * VO

ID

+ 5V* 1.7V* 0.4V10mA

USE R = 270

+ 290W

Figure 5. LED Driver With Blanking


40/410


November, 2004 Rev. 9


MC74HC04A/D

MC74HC04A

Hex InverterHighPerformance SiliconGate CMOS

The MC74HC04A is identical in pinout to the LS04 and theMC14069. The device inputs are compatible with Standard CMOSoutputs; with pullup resistors, they are compatible with LSTTLoutputs.

The device consists of six threestage inverters.

Features Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2 to 6V Low Input Current: 1 mA High Noise Immunity Characteristic of CMOS Devices

In Compliance With the JEDEC Standard No. 7A Requirements Chip Complexity: 36 FETs or 9 Equivalent Gates PbFree Packages are Available*

LOGIC DIAGRAM

Y1 A1

A2

A3

A4

A5

A6

Y2

Y3

Y4

Y5

Y6

1

3

5

9

11

13

2

4

6

8

10

12

Y = A


1314 12 11 10 9 8

21 3 4 5 6 7

VCC A6 Y6 A5 Y5 A4 Y4

A1 Y1 A2 Y2 A3 Y3 GND


MARKING DIAGRAMS



HC04A

ALYW

1

14

PDIP14N SUFFIXCASE 646

SOIC14D SUFFIX

CASE 751A

LH

FUNCTION TABLEInputs Outputs

A

HL

Y



MC74HC04ANAWLYYWW

1

14

HC04A

AWLYWW

1

14

http://onsemi.com


41/410

MC74HC04A

http://onsemi.com

40

MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

VCC


0.5 to + 7.0

V

Vin


0.5 to V CC + 0.5

V

Vout


0.5 to V CC + 0.5

V

Iin


20

mA

Iout


25

mA

ICC


50

mA

P D


TSSOP Package

750500450

mW

Tstg

Storage Temperature

65 to + 150

C

TL


260

C

This device contains protection circuitry to guard against damage due to high static voltages or electric f ields. However, precautions mustbe taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation,Vin and V out should be constrained to the range GND v (Vin or Vout ) v VCC . Unused inputs must always be tied to an appropriate logicvoltage level (e.g., either GND or V CC ). Unused outputs must be left open.

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limitvalues (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,damage may occur and reliability may be affected.Derating Plastic DIP: 10 mW/ C from 65 to 125 C

SOIC Package: 7 mW/ C from 65 to 125 CTSSOP Package: 6.1 mW/ C from 65 to 125 C



Symbol

Parameter

Min

Max

Unit

VCC


2.0

6.0

V

Vin, Vout


0

VCC

V

TA


55

+ 125

C

tr, tf

Input Rise and Fall Time V CC = 2.0 V(Figure 1) V CC = 4.5 VVCC = 6.0 V

000

1000500400

ns


Device Order Number Package Shipping



2000 / Box

MC74HC04AN SOIC14 55 / Rail

MC74HC04ADR2 SOIC14 2500 / Tape & Reel

MC74HC04ADR2G SOIC14(PbFree)

2500 / Tape & Reel

MC74HC04ADT TSSOP14*(PbFree)

96 / Rail

MC74HC04ADTR2 TSSOP14*(PbFree)

2500 / Tape & Reel




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MC74HC04A

http://onsemi.com

41


Guaranteed Limit




2.03.04.56.0

1.502.103.154.20

1.502.103.154.20

1.502.103.154.20

V



2.03.04.56.0

0.500.901.351.80

0.500.901.351.80

0.500.901.351.80

V



2.04.56.0

1.94.45.9

1.94.45.9

1.94.45.9

V


3.04.56.0

2.483.985.48

2.343.845.34

2.203.705.20



2.04.56.0

0.10.10.1

0.10.10.1

0.10.10.1

V


3.04.56.0

0.260.260.26

0.330.330.33

0.400.400.40


Vin = VCC or GND 6.0 0.1 1.0 1.0 mA


Vin = VCC or GNDIout = 0 mA

6.0 1.0 10 40 mA



Guaranteed Limit


tPLH ,tPHL


2.03.04.56.0

75301513

95401916

110552219

ns

tTLH,tTHL


2.03.04.56.0

75271513

95321916

110362219

ns



Typical @ 25 C, VCC = 5.0 V

CPD Power Dissipation Capacitance (Per Inverter)* 20 pF

* Used to determine the noload dynamic power consumption: P D = C PD VCC 2f + ICC VCC . For load considerations, see Chapter 2 of theON Semiconductor HighSpeed CMOS Data Book (DL129/D).


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MC74HC04A

http://onsemi.com

42


GND

VCC

OUTPUT Y

INPUT A

CL *


TESTPOINT

90%

50%10%

tTLH

DEVICEUNDERTEST

OUTPUT


Y A

Figure 3. Expanded Logic Diagram(1/6 of the Device Shown)

tTHL

90%50%

10%

tPLH tPHL

tf tr


44/410


March, 2000 Rev. 8


MC74HC08A/D

MC74HC08A

Quad 2Input AND GateHighPerformance SiliconGate CMOS


Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2 to 6V Low Input Current: 1 A High Noise Immunity Characteristic of CMOS Devices In Compliance With the JEDEC Standard No. 7A Requirements Chip Complexity: 24 FETs or 6 Equivalent Gates

3 Y1

1 A1


LOGIC DIAGRAM

2B1

6 Y2

4 A2

5B2

8 Y3

9 A3

10B3

11 Y4

12 A4

13B4

Y = AB


1314 12 11 10 9 8

21 3 4 5 6 7






MC74HC08AD SOIC14

http://onsemi.com

55 / Rail

MC74HC08ADR2 SOIC14 2500 / Reel

MARKINGDIAGRAMS


MC74HC08ADT TSSOP14 96 / Rail

MC74HC08ADTR2 TSSOP14 2500 / Reel


HC08A

ALYW

1

14

1

14PDIP14

N SUFFIXCASE 646

MC74HC08ANAWLYYWW

SOIC14D SUFFIX

CASE 751A1

14

HC08AAWLYWW

LLHH

LHLH

FUNCTION TABLE

Inputs Output

A B

LLLH

Y


45/410

MC74HC08A

http://onsemi.com

44

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

VCC


0.5 to + 7.0

V

Vin


0.5 to V CC + 0.5

V

Vout


0.5 to V CC + 0.5

V

Iin


20

mA

Iout


25

mA

ICC


50

mA

P D


TSSOP Package

750500450

mW

Tstg

Storage Temperature

65 to + 150

C

TL


260

C





Symbol

Parameter

Min

Max

Unit

VCC


2.0

6.0

V

Vin, Vout


0

VCC

V

TA


55

+ 125

C

tr, tf


VCC = 6.0 V

000

1000500400

ns




46/410

MC74HC08A

http://onsemi.com

45


Guaranteed Limit




2.03.04.56.0

1.502.103.154.20

1.502.103.154.20

1.502.103.154.20

V



2.03.04.56.0

0.500.901.351.80

0.500.901.351.80

0.500.901.351.80

V


Vin = VIH or VIL|Iout | 20 A

2.04.56.0

1.94.45.9

1.94.45.9

1.94.45.9

V


3.04.56.0

2.483.985.48

2.343.845.34

2.203.705.20


Vin = VIH or VIL|Iout | 20 A

2.04.56.0

0.10.10.1

0.10.10.1

0.10.10.1

V


3.04.56.0

0.260.260.26

0.330.330.33

0.400.400.40


Vin = VCC or GND 6.0 0.1 1.0 1.0 A


Vin = VCC or GNDIout = 0 A

6.0 1.0 10 40 A



Guaranteed Limit


tPLH ,tPHL


2.03.04.56.0

75301513

95401916

110552219

ns

tTLH,tTHL


2.03.04.56.0

75271513

95321916

110362219

ns



Typical @ 25 C, V CC = 5.0 V, V EE = 0 V

CPD Power Dissipation Capacitance (Per Buffer)* 20 pF

* Used to determine the noload dynamic power consumption: P D = C PD VCC 2f + ICC VCC . For load considerations, see Chapter 2 of theON Semiconductor HighSpeed CMOS Data Book (DL129/D).


47/410

MC74HC08A

http://onsemi.com

46


OUTPUT Y

INPUT A OR B

CL *


TESTPOINT

90%

50%10%

tTLH

DEVICEUNDERTEST

OUTPUT


Y A

B

Figure 3. Expanded Logic Diagram(1/4 of the Device)

tTHL

tPLH tPHL

tr tf

GND

VCC90%50%

10%


48/410


March, 2000 Rev. 9


MC74HC125A/D

MC74HC125A,MC74HC126A

Quad 3State NoninvertingBuffersHighPerformance SiliconGate CMOS

The MC74HC125A and MC74HC126A are identical in pinout tothe LS125 and LS126. The device inputs are compatible with standardCMOS outputs; with pullup resistors, they are compatible withLSTTL outputs.

The HC125A and HC126A noninverting buffers are designed to beused with 3state memory address drivers, clock drivers, and otherbusoriented systems. The devices have four separate output enablesthat are activelow (HC125A) or activehigh (HC126A).

Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 A High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard

No. 7A Chip Complexity: 72 FETs or 18 Equivalent Gates

LOGIC DIAGRAMHC125A

ActiveLow Output EnablesHC126A

ActiveHigh Output Enables

Y1

Y2

Y4

3

6

8

11

13

12

10

9

4

5

1

2 A1

OE1

A2

OE2

A3

OE3

A4

OE4


A1

OE1

A2

OE2

A3

OE3

A4

OE4

Y3

Y1

Y2

Y4

Y3

13

12

10

9

4

5

1

2 3

6

8

11

FUNCTION TABLE

HC125AInputs Output

A OE Y

H L HL L LX H Z

HC126AInputs Output

A OE Y

H H HL H LX L Z



MC74HC12xAN PDIP14 2000 / Box

MC74HC12xAD SOIC14

http://onsemi.com

55 / Rail

MC74HC12xADR2 SOIC14 2500 / Reel

MARKINGDIAGRAMS


MC74HC12xADT TSSOP14 96 / Rail

MC74HC12xADTR2 TSSOP14 2500 / Reel


HC12xAALYW

1

14

1

14PDIP14

N SUFFIXCASE 646

MC74HC12xANAWLYYWW

SOIC14D SUFFIX

CASE 751A

1

14

HC12xA

AWLYWW

PIN ASSIGNMENT

11

12

13

14

8

9

105

4

3

2

1

7

6

OE3

Y4

A4

OE4

VCC

Y3

A3

OE2

Y1

A1

OE1

GND

Y2

A2


49/410

MC74HC125A, MC74HC126A

http://onsemi.com

48

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

VCC


0.5 to + 7.0

V

Vin


0.5 to V CC + 0.5

V

Vout


0.5 to V CC + 0.5

V

Iin


20

mA

Iout


35

mA

ICC


75

mA

P D

Power Dissipation in Still Air Plastic DIPSOIC Package

TSSOP Package

750500450

mW

Tstg

Storage Temperature

65 to + 150

C

TL

Lead Temperature, 1 mm from Case for 10 Seconds(Plastic DIP, SOIC or TSSOP Package)

260

C





Symbol

Parameter

Min

Max

Unit

VCC


2.0

6.0

V

Vin, Vout

DC Input Voltage, Output Voltage(Referenced to GND)

0

VCC

V

TA


55

+ 125

C

tr, tf


VCC = 6.0 V

000

1000500400

ns

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

Guaranteed Limit

Symbol

Parameter

Test Conditions

VCCV

55 to25 C

v 85 C

v 125 C

Unit

VIH

Minimum HighLevel InputVoltage

Vout = VCC 0.1 V|Iout | v 20 A

2.03.04.56.0

1.52.1

3.154.2

1.52.1

3.154.2

1.52.1

3.154.2

V

VIL

Maximum LowLevel InputVoltage

Vout = 0.1 V|Iout | v 20 A

2.03.04.56.0

0.50.9

1.351.8

0.50.9

1.351.8

0.50.9

1.351.8

V

VOH

Minimum HighLevel OutputVoltage

Vin = VIH|Iout | v 20 A

2.04.56.0

1.94.45.9

1.94.45.9

1.94.45.9

V

Vin = VIH |Iout | v 3.6 mA

|Iout | v 6.0 mA|Iout | v 7.8 mA

3.0

4.56.0

2.48

3.985.48

2.34

3.845.34

2.2

3.75.2

VOL

Maximum LowLevel OutputVoltage

Vin = VIL|Iout | v 20 A

2.04.56.0

0.10.10.1

0.10.10.1

0.10.10.1

V

Vin = VIL |Iout | v 3.6 mA|Iout | v 6.0 mA|Iout | v 7.8 mA

3.04.56.0

0.260.260.26

0.330.330.33

0.40.40.4




50/410


51/410

MC74HC125A, MC74HC126A

http://onsemi.com

50

SWITCHING WAVEFORMS

Figure 1.

Figure 2.

OUTPUT Y

50%

50%

50%

50%90%

10%

VCC

VCC

GND

GND

HIGHIMPEDANCE

VOL

VOH

OUTPUT Y

OUTPUT Y

high speed cmos, series 74hc, on semiconductor

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