microsemi’s clock translators for optical transport networks
TRANSCRIPT
Product PreviewMicrosemi’s Clock Translators for Optical Transport Networks
• Multiple clock frequencies are required tosupport multiple services.
• Dynamic rate conversion is required forforward error correction (FEC)
• OTN requires a similar feature-set of digitalphase lock loop (DPLL) for SONET/SDH.
• Independent timing paths are needed tosupport to transmit and receive multipleservices.
• Stringent low jitter generation requirements
Optical transport network (OTN) has emerged as the physical layer interface
protocol of choice enabling carriers to bridge the transition from circuit-switched
to internet protocol (IP) legacy transmission of voice over optical fiber or packet-
switched transmission of data over optical fiber. Due to the variety of services and
provisions, the OTN timing solutions must be flexible and easily programmable to
support multiple unique and independent channel frequencies.
Microsemi® offers the widest portfolio of single-chip devices delivering “any
frequency, any port, all the time” performance for OTN.
For OTN equipment, Microsemi phase locked loops (PLLs) are used for the following
line card timing:
• Clock rate translation from line to client rates
• One PLL path per client port
• Clock rate programmability per client port
OTN Requirements
Features
Product Solutions
• Single-chip solutions compliant to thetelecom timing standards
• Meeting OTN multi-service requirements
• Highly-integrated to support multiple OTNfrequencies and channels
• Output Jitter 0.25 ps RMS
Highly-integrated and programmable solution provides translation from any input reference frequency to any output clock frequency with jitter performance for interfaces 10G, 40G, and 100G coherent.
The single, dual, and quad channel devices with independent digital PLLs accept and generate any frequency from 1 kHz to 1.25 GHz to support any communication service over optical networks.
Client Side:SONET/SDH
Line Side:OTN
Transponder
PHY/Mapper
MSCC PLL
MSCC PLL
Muxponder
MSCC PLL
MSCC PLL
MSCC CLKGEN
OTN Line Side:OTU2 (10 G)
OTU1 (2.5 G)
NxTiming Channels
PHY/Mapper
N ClientPorts
Client Side:SONET/SDH
GEFC
Video
Figure 1. Transponder and Muxponder Applications
© 2014 Microsemi Corporation. All rights reserved. Microsemi and the Microsemi logo are trademarks of Microsemi Corporation. All other trademarks and service marks are the property of their respective owners.
Publication Number: MS7-010-14
Microsemi Corporate HeadquartersOne Enterprise, Aliso Viejo CA 92656 USAWithin the USA: +1 (800) 713-4113 Outside the USA: +1 (949) 380-6100Sales: +1 (949) 380-6136Fax: +1 (949) 215-4996E-mail: [email protected]
Microsemi Corporation (Nasdaq: MSCC) offers a comprehensive portfolio of semiconductor and system solutions for communications, defense and security, aerospace, and industrial markets. Products include high-performance and radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs, and ASICs; power management products; timing and synchronization devices and precise time solutions, setting the world’s standard for time; voice processing devices; RF solutions; discrete components; security technologies and scalable anti-tamper products; Power-over-Ethernet ICs and midspans; as well as custom design capabilities and services. Microsemi is headquartered in Aliso Viejo, Calif. and has approximately 3,400 employees globally. Learn more at www.microsemi.com.
Microsemi Clock Translators for OTN
• Any input frequency from 1 KHz to 1.25 GHz
• Continuous input clock quality monitoring
• Hitless reference switching on loss of input
• Programmable bandwidth: 14 Hz to 500 Hz
• Output jitter typically 0.16 ps RMS APLL-only
• Output jitter for other modes 0.25 ps RMS
• Small package: 5 x 5 mm
• Four independent clock channels
• Four programmable digital PLLs/numerically controlled oscillators (NCOs)
• Low power: < 2W with four channels on
• Programmable bandwidth: 5 Hz to 896 Hz
• Automatic hitless reference switching and digital holdover on reference fail
• Easy Configuration: Field programmable via SPI/ I2C interface
ZL30169: 3-Input, 3-Output Clock Translator for OTN ZL30165: Quad Channel Precision Clock Translator
Figure 2. ZL30169 Block Diagram Figure 3. ZL30165 Block Diagram
Featured Products
JTAGControlInterface
OSCo
OSCi
GPIO[0:15]
Clock Generation 0
ref0ref1ref2ref3ref4ref5ref6ref7
PrecisionSynthesizer 0
Clock Generation 1Precision
Synthesizer 1
Clock Generation 2Precision
Synthesizer 2
Clock Generation 3Precision
Synthesizer 3
hpdiff0_p/nhpdiff1_p/nhpout0hpout1hpdiff2_p/nhpdiff3_p/nhpout2hpout3hpdiff4_p/nhpdiff5_p/nhpout4hpout5hpdiff6_p/nhpdiff7_p/nhpout6hpout7
MasterClock
DPLL0/NCO0
DPLL0/NCO1
DPLL0/NCO2
DPLL0/NCO3
Configurationand status
ReferenceMonitoring
SPI/I2CSlave JTAG GPIO /
Alarms
CrystalDriver
ic1_p/n
ic2_p/n Input BlockDivider, Monitor
DPLLFiltering, Holdover,Reference Switch
APLL
oc1_p/nDIV
ControlInterface
orEEPROM(optional)
GPIO
SPI /I2C
GPIO /Alarms
ic3/gpio3oc2_p/nDIV
oc3_p/nDIV
DIV
DIV
x2
EEPROM Config &Status
xout
xin
1 12 2
Number of Synthesizers1 High
Precision2 High
Precision2 High
Precision4 High
Precision
1 High Precision1 General
2 High Precision
2 General
4 High Precision Buffer fill feature
4 4 4
Clocks
Products
1 kHz – 750 MHz
1 kHz – 750 MHz
1 kHz – 750 MHz
1 kHz – 750 MHz
1 kHz – 750 MHz
1 kHz – 750 MHz
1 kHz – 750 MHz
2 kHz – 750 MHz
1 High Precision
1
1 kHz – 750 MHz
4 High Precision
Frame Sync feature
3
1 kHz – 750 MHz
4 High Precision
Frame Sync feature
2Number of PLL
OTN Product Chart