milo polte and robert j. simmons dram is running into density...
TRANSCRIPT
university-logo
IntroductionExperimental setup
EvaluationConclusion
MotivationPrevious work
Attacking and defending PCM-based main memoryMilo Polte and Robert J. Simmons
DRAM is running into density scaling problemsPhase-Change Memory (PCM) is a NVRAM technologythat uses thermal expansion properties to store dataPrevious work: PCM feasible as DRAM replacementLike Flash, PCM is susceptible to wearout.
Attacking: Worst case wear? Realistic wear?Defending: Can it be mitigated with wear-leveling?
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
MotivationPrevious work
Attacking and defending PCM-based main memoryMilo Polte and Robert J. Simmons
DRAM is running into density scaling problemsPhase-Change Memory (PCM) is a NVRAM technologythat uses thermal expansion properties to store dataPrevious work: PCM feasible as DRAM replacementLike Flash, PCM is susceptible to wearout.
Attacking: Worst case wear? Realistic wear?Defending: Can it be mitigated with wear-leveling?
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
MotivationPrevious work
Attacking and defending PCM-based main memoryMilo Polte and Robert J. Simmons
DRAM is running into density scaling problemsPhase-Change Memory (PCM) is a NVRAM technologythat uses thermal expansion properties to store dataPrevious work: PCM feasible as DRAM replacementLike Flash, PCM is susceptible to wearout.
Attacking: Worst case wear? Realistic wear?Defending: Can it be mitigated with wear-leveling?
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
MotivationPrevious work
Attacking and defending PCM-based main memoryMilo Polte and Robert J. Simmons
DRAM is running into density scaling problemsPhase-Change Memory (PCM) is a NVRAM technologythat uses thermal expansion properties to store dataPrevious work: PCM feasible as DRAM replacementLike Flash, PCM is susceptible to wearout.
Attacking: Worst case wear? Realistic wear?Defending: Can it be mitigated with wear-leveling?
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
MotivationPrevious work
Attacking and defending PCM-based main memoryMilo Polte and Robert J. Simmons
DRAM is running into density scaling problemsPhase-Change Memory (PCM) is a NVRAM technologythat uses thermal expansion properties to store dataPrevious work: PCM feasible as DRAM replacementLike Flash, PCM is susceptible to wearout.
Attacking: Worst case wear? Realistic wear?Defending: Can it be mitigated with wear-leveling?
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
MotivationPrevious work
Attacking and defending PCM-based main memoryMilo Polte and Robert J. Simmons
DRAM is running into density scaling problemsPhase-Change Memory (PCM) is a NVRAM technologythat uses thermal expansion properties to store dataPrevious work: PCM feasible as DRAM replacementLike Flash, PCM is susceptible to wearout.
Attacking: Worst case wear? Realistic wear?Defending: Can it be mitigated with wear-leveling?
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
MotivationPrevious work
Previous work
Primary background: Lee et al., Architecting Phase ChangeMemory as a Scalable DRAM Alternative, ISCA 2009
PCM is competitive with DRAM in terms of time and powerInstead of one 2048-byte memory buffer (sense amplifier),have four 512-byte memory buffers
Mitigates comparatively slow writesInstead of writing back the whole buffer back to memory,track modified data by L2 cache blocks or by word
Prevents wearout
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
MotivationPrevious work
Previous work
Primary background: Lee et al., Architecting Phase ChangeMemory as a Scalable DRAM Alternative, ISCA 2009
PCM is competitive with DRAM in terms of time and powerInstead of one 2048-byte memory buffer (sense amplifier),have four 512-byte memory buffers
Mitigates comparatively slow writesInstead of writing back the whole buffer back to memory,track modified data by L2 cache blocks or by word
Prevents wearout
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
MotivationPrevious work
Previous work
Primary background: Lee et al., Architecting Phase ChangeMemory as a Scalable DRAM Alternative, ISCA 2009
PCM is competitive with DRAM in terms of time and powerInstead of one 2048-byte memory buffer (sense amplifier),have four 512-byte memory buffers
Mitigates comparatively slow writesInstead of writing back the whole buffer back to memory,track modified data by L2 cache blocks or by word
Prevents wearout
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
MotivationPrevious work
Previous work
Primary background: Lee et al., Architecting Phase ChangeMemory as a Scalable DRAM Alternative, ISCA 2009
PCM is competitive with DRAM in terms of time and powerInstead of one 2048-byte memory buffer (sense amplifier),have four 512-byte memory buffers
Mitigates comparatively slow writesInstead of writing back the whole buffer back to memory,track modified data by L2 cache blocks or by word
Prevents wearout
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
Experimental setup
Simulation EnvironmentComponents: Main memory, wear levelers, attackers
Wear leveler
Intercepts requests to memoryCan redirect reads and writes made to logical memory(size N) to physical memory (size N×α)
Attacker
Generates requests to memoryDegenerate requests
Always write to same logical locationAlways write to same same physical location (if possible)
Real requests derived from SPEC benchmarksTurns out they can look pretty degenerate!
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
Experimental setup
Simulation EnvironmentComponents: Main memory, wear levelers, attackers
Wear leveler
Intercepts requests to memoryCan redirect reads and writes made to logical memory(size N) to physical memory (size N×α)
Attacker
Generates requests to memoryDegenerate requests
Always write to same logical locationAlways write to same same physical location (if possible)
Real requests derived from SPEC benchmarksTurns out they can look pretty degenerate!
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
Experimental setup
Simulation EnvironmentComponents: Main memory, wear levelers, attackers
Wear leveler
Intercepts requests to memoryCan redirect reads and writes made to logical memory(size N) to physical memory (size N×α)
Attacker
Generates requests to memoryDegenerate requests
Always write to same logical locationAlways write to same same physical location (if possible)
Real requests derived from SPEC benchmarksTurns out they can look pretty degenerate!
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
Experimental setup
Simulation EnvironmentComponents: Main memory, wear levelers, attackers
Wear leveler
Intercepts requests to memoryCan redirect reads and writes made to logical memory(size N) to physical memory (size N×α)
Attacker
Generates requests to memoryDegenerate requests
Always write to same logical locationAlways write to same same physical location (if possible)
Real requests derived from SPEC benchmarksTurns out they can look pretty degenerate!
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
Experimental setup
Simulation EnvironmentComponents: Main memory, wear levelers, attackers
Wear leveler
Intercepts requests to memoryCan redirect reads and writes made to logical memory(size N) to physical memory (size N×α)
Attacker
Generates requests to memoryDegenerate requests
Always write to same logical locationAlways write to same same physical location (if possible)
Real requests derived from SPEC benchmarksTurns out they can look pretty degenerate!
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
Experimental setup
Simulation EnvironmentComponents: Main memory, wear levelers, attackers
Wear leveler
Intercepts requests to memoryCan redirect reads and writes made to logical memory(size N) to physical memory (size N×α)
Attacker
Generates requests to memoryDegenerate requests
Always write to same logical locationAlways write to same same physical location (if possible)
Real requests derived from SPEC benchmarksTurns out they can look pretty degenerate!
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
Necessity of wear levelingEffect of wear levelingOverhead of wear leveling
Necessity of wear leveling
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
Necessity of wear levelingEffect of wear levelingOverhead of wear leveling
Effect of wear leveling
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
Necessity of wear levelingEffect of wear levelingOverhead of wear leveling
Overhead of wear leveling
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
Conclusions and future work
ConclusionsRelatively straight-forward traces can be surprisingly badRelatively simple wear leveling can be surprisingly effective
Short-term future:Tweak existing algorithmsReduce overhead
Longer-term future:Evaluate timingIntegrate with the existing MSR simulation infrastructureDifferent approaches: OS? “Write Victim Cache?”
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
Conclusions and future work
ConclusionsRelatively straight-forward traces can be surprisingly badRelatively simple wear leveling can be surprisingly effective
Short-term future:Tweak existing algorithmsReduce overhead
Longer-term future:Evaluate timingIntegrate with the existing MSR simulation infrastructureDifferent approaches: OS? “Write Victim Cache?”
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
Conclusions and future work
ConclusionsRelatively straight-forward traces can be surprisingly badRelatively simple wear leveling can be surprisingly effective
Short-term future:Tweak existing algorithmsReduce overhead
Longer-term future:Evaluate timingIntegrate with the existing MSR simulation infrastructureDifferent approaches: OS? “Write Victim Cache?”
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory
university-logo
IntroductionExperimental setup
EvaluationConclusion
Conclusions and future work
ConclusionsRelatively straight-forward traces can be surprisingly badRelatively simple wear leveling can be surprisingly effective
Short-term future:Tweak existing algorithmsReduce overhead
Longer-term future:Evaluate timingIntegrate with the existing MSR simulation infrastructureDifferent approaches: OS? “Write Victim Cache?”
Milo Polte, Robert J. Simmons Attacking and defending PCM-based main memory