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Welcome to NXP’s voltage translators training module. This module will

explain the techniques and features of NXP’s voltage translators. The

module will also help to select the right voltage translator for specific

applications.

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Voltage translation is required to ensure that devices operating at

different supply voltages in a system are able to work with each other

without any damaging current flow and signal loss.

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Input switching threshold and output voltage levels for 5V/3V CMOS,

mixed CMOS/TTL and BiCMOS logic families are shown here. High

level output voltage (Voh) of driver device must be higher than high

level input threshold voltage (Vih) of receiver device and the low level

output voltage (Vol) of driver must be lower than low level input

threshold voltage (Vil) of receiver for proper working of CMOS devices.

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However, if Voh of driver is lower than Vih of receiver and/or Vol of

driver is higher than Vil of receiver, the system behavior becomes

unpredictable as shown in this slide. Therefore, it is necessary to match

the input switching thresholds of receiver with output voltage levels of

driver in a mixed voltage system.

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If inputs of receiving device are over supply voltage tolerant, they can

accept the input signals which are higher than the supply voltage. Since

the outputs of such devices are referenced to Vcc, high to low voltage

translation becomes possible. Use of current limiting resistors with

CMOS devices which have diodes between inputs and Vcc is another

technique for high to low voltage translation.

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Open drain outputs and low input switching thresholds of CMOS

devices are common techniques for low to high voltage translation.

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Use of current limiting resistors in CMOS devices for high to low voltage

translation is explained in this slide. Value of required current limiting

resistor can be calculated by using Vcc values of driver and receiver

devices and allowed input clamping current for reciever as shown here.

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A pull up resister can be used with the open drain outputs of standard

logic functions to implement the low to high voltage translation and drive

the next device as shown in this slide.

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NXP’s LVC, LVT, ALVT and AHC/T devices have over-voltage tolerant

inputs up to 5.5V and can be used for HIGH to LOW voltage

translation in 5V/3.3V mixed supply voltage systems. Inputs of

AUP and AVC devices are tolerant up to 3.6V only. They are

suitable for 1.8V/3.3V mixed designs. LV, HC and HEF devices can

be used with current limiting resistors for HIGH to LOW voltage

translation for interfacing with voltages far in excess of typical logic

families.

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NXP’s AUPxT and HCT logic have lower than typical input switching

thresholds and can be used for low to high voltage level translation.

AUP1T57, AUP1T58, AUP1T97, AUP1T98 (1.8V to 3.6V) and HCT

logic devices fall in this category. 03, 06, 07, 09, 11, 38, 7273, 9114,

9115 are the functions with open drain outputs in HC/T, LV, AHCT, AUP,

LVC and FAST logic families.

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Wide voltage translation range, low propagation delays, and different

drive currents are available in AUP, LVC and AVC voltage translators

from NXP. With the low Icc and Ioff in partial power down mode, these

devices consume very low power in active and standby modes.

Optional bus hold and integrated termination resisters can reduce the

external components saving board space and cost. PicoGate is a very

small 5, 6 or 8 pin TSSOP package with leads and MicroPak is the

leadless smaller package. DQFN is the world’s smallest leadless

package for full function logic devices.

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For high to low voltage translation HC/T, AHC/T and HEF4000B logic

families offer different logic functions with over supply voltage tolerant

inputs and built in Schmitt trigger for slower inputs. With TTL compatible

inputs, some level of low to high voltage translation can also be

achieved. Wide operating temperature range of -55C to 150C makes

these devices ideal for use in systems designed for harsh weather

conditions as well.

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ALVC logic is a high speed version of LVC logic with supply voltage

range of 1.2V to 3.6V. LVT and ALVT are BiCMOS logic devices with

drive currents as high as 64mA, suitable for high load applications.

Outputs of LVT and ALVT devices can be tristated with output enable

control and during power up and power down. Also the inputs of these

devices are over voltage tolerant. These features provide an additional

level of live insertion for LVT and ALVT voltage translators.

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These are the devices with two supply voltages and different voltage

ranges. These translators can be used for uni or bidirectional voltage

level translation. Some bidirectional voltage translators have a ‘DIR’ pin

to control the direction of data while others have ‘DIR” and ‘Output

Enable’ pins for tristating the outputs and save power. Output enable

control is available in 245 functions. Low to high as well as high to low

voltage translation can be done with these devices.

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Dual supply voltage translators with ‘DIR” pin are available from NXP in

AVC, LVC, ALVC and AUP logic families. Output Enable feature is

available in ‘245 functions offered in 4, 8, 16 and 20 bit devices. A wide

voltage translation range of 0.8V to 5.5V can be addressed by using

these devices.

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Dual supply translators are available with various unique features that

make them suitable for many different applications. Bidirectional data

flow, flow through pin out, bus hold and live insertion are some of these

features.

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Standard SO, SSOP and TSSOP packages are offered in addition to

innovative smaller leadless MicroPak and DQFN packages for voltage

translators from NXP. Packages from NXP are RoHS compliant with no

lead and are also dark green with no halogen and antimony oxides for

better safer environment.

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The slide provides helpful hints for selection of a right voltage translator

in a system. Determination of number of channels, direction of data

flow, translation voltage and current levels and required propagation

delay are critical in selection of right voltage translator. With NXP’s

broad voltage translation portfolio, right voltage translator is always

available for any application with specific operating requirements.

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An 8 bit, dual supply voltage level translator is used to translate the

voltage signal levels from 1.8V CPU bus to 3.3V memory and vice

versa.

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The slide explains the use of LVCH162245A as a bidirectional voltage

level translator between 3.3V processor bus and 5V SRAM with TTL

compatible input levels. By default, processor writes the data on

memory. Whenever, processor tries to read the SRAM, it will generate

Chip Select first. Since there is bus hold at inputs of LVCH162245,

address will be passing through the transceiver into SRAM data lines.

After sometime processor bus will be tristated and it'll generate RD

signal. While /OE is still low, SRAM starts transmitting data. Data from

SRAM appears at B port at the same time as the DIR input goes from

HIGH to LOW and data starts flowing from B to A port. Data flows from

processor to SRAM since inputs of SRAM are TTL compatible. Data

flow from SRAM to processor due to high to low voltage translation by

using over supply voltage translation at LVC inputs. Also, LVCH162245

is designed with 30 Ohm series termination resistors in both HIGH and

LOW output stages to reduce line noise and ensure better signal

integrity in design with no reflections, undershoots or overshoots.

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NXP offers a broad portfolio of voltage translators in various logic

families with different electrical specifications and package options.

These voltage translators can be used for low to high or high to low

voltage level translation between driver and receiver at high speed with

very low power consumption. Various standard and leadless packages

are available for these devices that can be used to save PCB space

significantly. For a complete portfolio offering of voltage translators,

please visit www.standardics.nxp.com/products/voltage.translation

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Thank You!