applications of pll

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136 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 44, NO. 1, FEBRUARY 1997

Application of a PLL and ALL Noise

Reduction Process in Optical Sensing Systems

D. F. Clark and T. J. Moir

Abstract A novel approach to the demodulation of a frequencymodulated optical signal using an amplitude-locked loop (ALL) in the

presence of noise is presented. The ALL is the mathematical dual of thephase-locked loop (PLL), but works on amplitude rather than phase. Thistechnique will benefit areas where noise due to scattering or multiplereflections is present.

Index Terms Amplitude-locked loop (ALL), heterodyne detection,optical sensing, phase-locked loop (PLL).

I. INTRODUCTION

Optical remote free-space sensing has many applications [1].

However, it is generally recognized that a major drawback with these

coherent detection systems is that interference generated by scattering

from extraneous sources along the free space path decreases the

detection sensitivity. The problem has remained unsolved because

of the nature of the interference, which when decoded, appears asspikes of multiplicative noise which cannot be filtered in the usual

way.

The problems of interference between the desired signal and

scattered light can be solved by using the technology offered by the

amplitude-locked loop (ALL) [2][4]. Using the ALL, the interfer-

ence can be significantly reduced, and the purpose of this letter is

to show how this may be applied to any coherent detection scheme

used for optical sensing.

II. OPTICAL REMOTE SENSING

A typical optical free-space sensing system consisting of a laser,

three beam splitters (BS 13), a photodetector (PD) and an acoustoop-

tic modulator (AO) is shown in Fig. 1. The laser provides an output

which is split by BS1 and BS2 to give a reference signal at the PDof

A

L

c o s ( !

c

t ) :

The other signal from BS1 is frequency-shifted by

the AO to give an output of

a

i

( t ) = A

L

c o s ( !

c

+ !

A O

) t :

(1)

The output from the AO hits the target and is Doppler-shifted by

virtue of the target vibrating. Ignoring atmospheric scattering, the

return signal incident on the PD is

a

0

( t ) = A

R

c o s [ ( !

c

+ !

A O

) t + s i n ( !

D

t ) ] :

(2)

In the above,

is the (FM) modulation index given by =

1 !

D

= !

D

where!

D

is the Doppler shift frequency and1 !

D

is

the peak frequency deviation. The return signal then interferes with

the reference to produce an electrical output from the PD:

a

D

( t )

=

A

2

L

2

+ A

L

A

R

c o s [ !

A O

t + s i n ( !

D

t ) ]

(3)

i.e., a dc term plus a frequency-modulated carrier with baseband

frequency!

D

:

After down conversion to a suitable intermediate

Manuscript received January 25, 1996; revised February 20, 1996.The authors are with the Department of Electrical and Electronic Engineer-

ing, University of Paisley, Paisley, PA1 2BE U.K.Publisher Item Identifier S 0278-0046(97)00081-6.

Fig. 1. Optical vibration sensor.

frequency, the above FM signal presents no difficulties and can be

demodulated in the usual way.

III. THE PROBLEM OF ATMOSPHERIC SCATTERING

In practice, an extra additive term arises from atmospheric scatter-

ing along the propagation path. If the magnitude of this scattering ism ;

at a frequency!

r

;

then the signal at the PD will be

s ( t ) = A

R

c o s [ ( !

c

+ !

A O

) t + s i n ( !

D

t ) ] + m c o s ( !

r

t ) :

(4)

Using trigonometric identities, the above signal can be represented

as

s ( t ) = r ( t ) c o s [ ( !

c

+ !

A O

) t + s i n ( !

D

t ) + ( t ) ] :

(5)

If the reflected frequency!

r

is at the same frequency as( !

c

+ !

A O

)

thenr ( t )

and ( t )

in (5) becomes

r ( t ) = A

2

R

+ 2 A

R

m c o s ( s i n ( !

D

t ) ) + m

2

( t ) = a r c t a n

0 m s i n ( s i n ( !

D

t ) )

A

R

+ m c o s ( s i n ( !

D

t ) )

:

(6)

The PD output now becomes

s ( t ) = f r ( t ) 1 c o s [ ( !

r

t ) + s i n ( !

D

t ) + ( t ) ]

+ A

L

c o s ( !

c

t ) g

2

:

(7)

Expanding the above expression and assumingA

L

r ( t )

, then

the output will be

s ( t )

=

r ( t ) A

L

c o s [ !

A O

t + s i n ( !

D

t ) + ( t ) ]

(8)

which is a frequency modulated signal at a carrier offset frequency

!

A O

:

Assuming the FM detector to be immune to amplitude changesand normalizing

A

L

= ;

a typical PLL FM detector will give

(ideally) a waveform of the form!

i n s t

( t )

where

!

i n s t

( t ) = 0

m [ m + c o s ( s i n ( !

D

t ) ) ]

d ( t )

!

D

c o s ( !

D

t )

(9)

andd ( t ) = + 2 m c o s ( s i n !

D

t ) + m

2

:

This kind of waveform has spikes, which cause severe distortion,

and has been well documented [5].

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138 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 44, NO. 1, FEBRUARY 1997

ACKNOWLEDGMENT

The authors are indebted to A. M. Pettigrew, AMPSYS Ltd., for

his help and assistance in writing this paper.

REFERENCES

[1] G. Swan, Principles of Modern Optical Systems, Andonovic and Uttam,Eds. Norwood, MA: Artech House, 1987, ch. 13.

[2] A. M. Pettigrew and T. J. Moir, Electron. Lett., vol. 27, p. 1082, 1991.[3] T. J. Moir and A. M. Pettigrew, Electron. Lett., vol. 28, p. 814, 1992.[4] A. M. Pettigrew and T. J. Moir, J. AES, vol. 41, p. 998, 1993.[5] M. S. Corrington, RCA Rev., vol. 7, p. 522, 1946.[6] T. J. Moir, Electron. Lett., vol. 31, p. 694, 1995.

Analysis of Unlocked and Acquisition Operation

of a Phase-Locked Speed Control System

C. A. Karybakas and Theodore L. Laopoulos

AbstractA study of a phase-locked speed control system is presented,focusing on the out-of-lock operation. System behavior is discussed foreach case, while acquisition operation is described by phase plane analysisand capture mechanism is explained. Experimental results for a systemdeveloped are also given.

Index TermsPhase detectors, phase-locked loop, phase-locked motorspeed control.

I. INTRODUCTION

Motor speed control systems based on the phase-locked loop

(PLL) principle have already been presented in the literature. The

operation of various systems of this kind has been described, andprecise speed regulation has been reported. PLL has excellent tracking

performance, but it tends to be slow and unreliable in acquisition

[1], [3]. Acquisition of phase locked speed control (PLSC) systems

has not been extensively discussed, especially for systems with fast-

response phase detectors [2], [5].

This letter presents a description of the out-of-lock behavior of

a PLSC system developed. The system is based on a sample-and-

hold phase detector already proposed [2]. A detailed presentation of

the locked operation of this system, along with an analysis of the

synchronization (hold-in) range, has been previously published [4].

The unlocked operation of this system is considered here, and it is

studied on the basis of a detailed analysis of the operation of all

sections. Phase plane analysis is presented, and acquisition operation

is examined theoretically and verified experimentally.

II. THE SYSTEM DEVELOPED

A serious limitation of phase locked speed control (PLSC) systems

is related to the usually large system response time. Low-pass

Manuscript received January 30, 1996; revised May 21, 1996.The authors are with the Electronics Laboratory, Physics Department,

Aristotle University of Thessaloniki, 54006 Thessaloniki, Greece.Publisher Item Identifier S 0278-0046(97)00082-8.

loop filter along with the motor introduced low-pass network are

responsible for this behavior. A phase detector already proposed [2],

which gives a dc output voltage proportional to phase difference

input, makes the use of the loop filter unnecessary and, therefore,

results in reducing the systems response time. Phase difference1 8

is detected by this circuit every half-period of the two input signals

and a pulse train proportional in duration and sign to1 8

is produced

(V

P

in Fig. 1). An integrator converts pulse duration to voltage (V

I

in

Fig. 1) and a holding circuit keeps this voltage steady until the nextdetection leads to a new value of the output voltageV

D

:

Information

about phase difference is considered sampled, since it is detected

every half-period of the input signals.

The sample and hold phase detectors (SHPD) outputV

D

is

amplified and added to an offset voltageV

o

before entering motor

driving circuit. VoltageV

o

is used to bias the SHPDs output to

positive values only and determines system free running frequency

f

o

:

The resulting voltageV

m

= V

o

+ A V

D

is the driving input signal

of the motor. The motor is represented by a transfer function

G

m

( s ) =

f

m

( s )

V

m

( s )

=

k

o

+ T

m

s

(1)

where T m is its mechanical time constant (s) and k o is motor constant(Hz/V). Feedback frequency

f

F

isf

F

= n f

m

= f

o

+ f ;

wheren

is

encoders density,f

o

is the free-running frequency, andf

is output

variable frequency component.

The experimental system was built using a small, permanent

magnet, 150-W dc motor driven by a transistor power circuit,

while the encoder was an optical one based on an infrared LED-

phototransistor pair. Test results indicated considerable improvement

in system speed regulation, speed variation, and response time. Actual

system parameters are:T

m

= 0 ; 0 2 9

s,k

o

= 5 : 5

Hz/V, and

n = 3 :

It should be noted here that, although present analysis describes

the actual PLSC system developed, the operation of any other PLSC

system based on any fast-response phase detector [5, and others] is

similar and, therefore, may be studied in a similar way.

III. UNLOCKED OPERATION

Considered next is a typical case of system operation under un-

locked conditions( f

R

< f

F

) :

The SHPDs output waveform results

from the combination of the two input signals as shown in Fig. 1.

Since the SHPD cannot detect phase difference outside( 0 ; + )

interval, its output will take the form of this normalized waveform

(V

D

in Fig. 1). Characteristic quantities of this waveform which are

periodT

D

and peak-to-peak amplitudeE ;

may now be determined.

PeriodT

D

will be equal to the time interval that the two signals

return to the same relative position( t

n

= a T

R

= ( a + ) T

F

) ;

hence,

T

D

= t

n

= a T

R

=

T

R

T

F

T

R

0 T

F

=

f

F

0 f

R

) f = f

F

0 f

R

(2)

and the SHPDs output frequency is equal to the difference of

the two input frequencies. AmplitudeE

may be calculated by

multiplying the voltage-step value1 V

by the total number of steps

per period and results finally to beE = K

I

T

F

;

whereK

I

is

the time constant of the SHPDs integration. The (p-p) amplitude

of the SHPDs output signal is proportional to the high frequency

02780046/97$10.00 1997 IEEE

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