collaborative flcc experiments

April 16th, 2007

1

FLCC

Optical Digital Profilometry Test Patterns, Database, and Strategy

Wojtek Poppe, Ben Yu, Jing Xue, Marshal Miller, and Andy Neureuther

University of California Berkeley

April 16th, 2007

2

FLCC

Collaborative FLCC Experiments

FLCC

Experiments

Cypress Experiments

Device Process

Circuits

60nm 60.5nm 61nm 61.5nm …

Ioff = 2nA 1.5nA 1.2nA 1nA 0.8nA

VT

Shift with different tips implant

80nm

=+

Super low power design

Finding correlation between gates

Circuits built to measure circuit variations

Using device design to measure CD variation

Characterizing your process

Cypress Experiments

Device Process

Circuits

60nm 60.5nm 61nm 61.5nm …


60nm 60.5nm 61nm 61.5nm …


VT


80nm

VT


80nm

=+ =+






FLCCCypress Experiments

Device Process

Circuits

60nm 60.5nm 61nm 61.5nm …


VT


80nm

=+






Cypress Experiments

Device Process

Circuits

60nm 60.5nm 61nm 61.5nm …


60nm 60.5nm 61nm 61.5nm …


VT


80nm

VT


80nm

=+ =+






Cypress Experiments

Device Process

Circuits

60nm 60.5nm 61nm 61.5nm …


VT


80nm

=+






Cypress Experiments

Device Process

Circuits

60nm 60.5nm 61nm 61.5nm …


60nm 60.5nm 61nm 61.5nm …


VT


80nm

VT


80nm

=+ =+






FLCC

Optical Digital Profilometry (ODP)

Original Experiments

FLCCExperiments

Designs from industry

April 16th, 2007

3

FLCC

Outline• New set of masks from Toppan and experiments at SVTC with the help of ASML

• Web accessible database for data aggregation and analysis

• Optical Digital Profilometry• New Defocus Test Structures• Measuring Mask Edge Effects• Illumination and 2-D Patterns• Conclusion

April 16th, 2007

4

FLCC

New Company New ProcessCypress

SVTCSilicon Valley

Technology Center

65nm CMOS Flow

April 16th, 2007

5

FLCC


SVTCSilicon Valley

Technology Center

65nm CMOS Flow

April 16th, 2007

6

FLCC


SVTCSilicon Valley

Technology Center

65nm CMOS Flow

Developing new vanilla CMOS flow

• No Cypress customizations, so more representative

• More synergy and direct benefit for SVTC translates to more wafers

April 16th, 2007

7

FLCC

Old Test Chip Layout

Cypress Test Structures

178 30-pad cells

• Over 15,000 Electrical Test Structures

• Six students, six sets of conclusions, one chip

April 16th, 2007

8

FLCC

Old Test Chip Layout

Cypress Test Structures

178 30-pad cells

• Over 15,000 Electrical Test Structures

• Six students, six sets of conclusions, one chip

April 16th, 2007

9

FLCC

New FLCC06.v2 Chip

Electrical Test Structures (Magma)

ODP litho (Yu Ben)

ODP Mask Edge (Marshal Miller)

ODP Etch (Cadence)

• 21 extra 30-pad cell structures (199 total)

• 256 gratings for Optical Digital Profilometry (ODP)

• Two more students and three companies contributing

New Overlay Structures (ASML)

April 16th, 2007

10

FLCC

4 Layers Per Mask

9X

8 450um x 220um gratings

1mm x 1mm block

April 16th, 2007

11

FLCC

4 Layers Per Mask

48 450um x 220um gratings

3mm x 2mm block

Wojtek

Marshal

Yu

April 16th, 2007

12

FLCC

Space Available on Dark Field Mask

All four layers available

Thirty-Two 1mm x 1mm blocks

Four 2mm x 3mm blocks

• Atten PSM + 90 degree phase etch

• Mosi or Chrome

• Glass can have extra 90 degree etch

April 16th, 2007

13

FLCC

Outline• New set of experiments at SVTC and a new set of masks



April 16th, 2007

14

FLCC

Tons of Test Structures, Tons of Data, One ChipLooking at

• Systematic CD variation

• LWR

• Defocus

• Enhanced Transistors

• Contact hole variation (correlate with pattern noise work)

• BSIM model fitting

• Oxide thickness and channel doping

• Poly corner rounding

• Active corner rounding

• Non-rectangular transistors

• Poly overlap

• Electrical Overlay Error

• SRAMs and Standard Cells

• Poly Etch

• Poly CMP

• Mask edge effects

April 16th, 2007

15

FLCC

Tons of Test Structures, Tons of Data, One ChipLooking at

• Systematic CD variation

• LWR

• Defocus

• ETEC-M validation

• Contact hole variation (correlate with pattern noise work)

• BSIM model fitting

• Oxide thickness and channel doping

• Poly corner rounding

• Active corner rounding

• Non-rectangular transistors

• Poly overlap

• Electrical Overlay Error

• SRAMs and Standard Cells

• Poly Etch

• Poly CMP

• Mask edge effects

Data Management Nightmare

April 16th, 2007

16

FLCC

Relational Database for Data Aggregation• Over 15,000 transistors, 150 die per wafer, and dozens of wafers

• Slice and dice the data in any way

• Each data point will be associated with many different tables

• Comparing simulation and experiment results

• Finding Correlation

• Can find correlation between transistors with specific attributes such as proximity or distance from center

• Looking at subsets of test structures

• Filtering out confounding effects (systematic CD variation)

• Platform for Collaboration

• Each designer can access and update the database online

• Outside people can log on as guests and explore different pattern dependent phenomena

April 16th, 2007

17

FLCC

transistor

Simulated Dimensions

has

Simulated C urrents

has

Measured Dimensions

Electrical Dimensions

has

Transistor_typeis_like

from

from

E-beamMachine

Probe Card

using

Optical Model

Transistor Model

(1,n)

(1,n)

(1,n)

(1,n)

(1,n)

(1,n)(1,n)

(1,n)

(1,1)

(1,1)

(1,1)

(1,1)

(1,1)

(1,1)

(1,1)

(1,1)

IsCharacterized

by

CD_SEM_data

from

(1,n)

(1,1)

(0,n)

(1,1)

Cell

Cell_type

contains

Is of

Test Strategy

(1,n)

(1,n)

has(1,1)

(1,1)

(1,1)

(1,1)die contains

(1,1)

(1,n)

Isprocessed

at

Process conditions

(1,n)

(1,1)

by

Tester

(1,n)

(1,n)date

Created bydesigner(1,1)(1,n)

reports generates

guest

reads

has Non_idealities(1,1)

(1,1)

(1,n)

(1,n) (1,n)

(1,1)

ModifiedDimensions

has(1,1)

(1,n)

Characterized Wafer map

(1,1)

generates

(1,n)

is_at(1,1)

location

(1,1)

Electrical Data

from

(1,n)

(1,1)

(1,n)

(1,1)

IsCharacterized

by

using

(1,n)

o,t

user

o,t

Electrical Measurements

from(1,1)

(1,n)

See next pageFor non-transistor

types

contains

Hasextra

Other_values

(0,n)

(1,1)

has

Pin Config

(1,1)

(1,n)Store All Possible Data

Measurement Conditions (ex. Temp) Transistor Attributes

Simulation results for different process conditions

Upload process non-idealities

Store Process Conditions

Transistor Location

Data Analysis Reports

Testing Strategy

April 16th, 2007

18

FLCC

transistor

Simulated Dimensions

has

Simulated C urrents

has

Measured Dimensions

Electrical Dimensions

has

Transistor_typeis_like

from

from

E-beamMachine

Probe Card

using

Optical Model

Transistor Model

(1,n)

(1,n)

(1,n)

(1,n)

(1,n)

(1,n)(1,n)

(1,n)

(1,1)

(1,1)

(1,1)

(1,1)

(1,1)

(1,1)

(1,1)

(1,1)

IsCharacterized

by

CD_SEM_data

from

(1,n)

(1,1)

(0,n)

(1,1)

Cell

Cell_type

contains

Is of

Test Strategy

(1,n)

(1,n)

has(1,1)

(1,1)

(1,1)

(1,1)die contains

(1,1)

(1,n)

Isprocessed

at

Process conditions

(1,n)

(1,1)

by

Tester

(1,n)

(1,n)date

Created bydesigner(1,1)(1,n)

reports generates

guest

reads

has Non_idealities(1,1)

(1,1)

(1,n)

(1,n) (1,n)

(1,1)

ModifiedDimensions

has(1,1)

(1,n)

Characterized Wafer map

(1,1)

generates

(1,n)

is_at(1,1)

location

(1,1)

Electrical Data

from

(1,n)

(1,1)

(1,n)

(1,1)

IsCharacterized

by

using

(1,n)

o,t

user

o,t

Electrical Measurements

from(1,1)

(1,n)

See next pageFor non-transistor

types

contains

Hasextra

Other_values

(0,n)

(1,1)

has

Pin Config

(1,1)

(1,n)Store All Possible Data

Measurement Conditions (ex. Temp) Transistor Attributes

Simulation results for different process conditions

Upload process non-idealities

Store Process Conditions

Transistor Location

Data Analysis Reports

Testing Strategy

What else should I look at???

April 16th, 2007

19

FLCC

Web Accessible and Centrally Located

Server

Probe Station

Upload test results

Download test scripts

• Download data for analysis.

• Access any data through SQL queries or pre-built filters

• Run some basic statistical analysis

• Upload results for others to see

• Update database with calculated process offsets

Cypress Experiments

Device Process

Circuits

60nm 60.5nm 61nm 61.5nm …


VT


80nm

=+






Cypress Experiments

Device Process

Circuits

60nm 60.5nm 61nm 61.5nm …


60nm 60.5nm 61nm 61.5nm …


VT


80nm

VT


80nm

=+ =+






FLCCCypress Experiments

Device Process

Circuits

60nm 60.5nm 61nm 61.5nm …


VT


80nm

=+






Cypress Experiments

Device Process

Circuits

60nm 60.5nm 61nm 61.5nm …


60nm 60.5nm 61nm 61.5nm …


VT


80nm

VT


80nm

=+ =+






Cypress Experiments

Device Process

Circuits

60nm 60.5nm 61nm 61.5nm …


VT


80nm

=+






Cypress Experiments

Device Process

Circuits

60nm 60.5nm 61nm 61.5nm …


60nm 60.5nm 61nm 61.5nm …


VT


80nm

VT


80nm

=+ =+






FLCC

Designers

April 16th, 2007

20

FLCC

grating

CDSEM Dimensions

ODP Dimensions

has

Grating_typeis_like

from

makingE-beamMachine

assumptions

(1,n)

(1,n)

(1,1)

(1,n)

(1,1)

(1,1)

(1,1)

(1,1)

die contains(1,1)

(256,256)

Isprocessed

at

Process conditions

(1,n)

(1,1)

Measured by

Tester

(1,n)

date

is_at(1,1)

location

(1,1)

o,t

Ellipsometry Output

from

(1,1)

(1,n)

from

Ellipsometer

(1,n)

(1,n)

date

date

ODP Data Management and Sharing

April 16th, 2007

21

FLCC




April 16th, 2007

22

FLCC

Optical Digital Profilometry

UpperCD

PitchLower CD

FilmThickness

300 350 400 450 500 550 600 650 700 7500

0.05

0.1

0.15

0.2

0.25

0.3

0.35

wavelength (nm)

R,

cos

, T

an

LIGHT SOURCE SPECTROMETER

100umThe goal of scatterometry is to measure the geometry of fine lines nondestructively with light

April 16th, 2007

23

FLCC

Simulated vs. Measured Results

200 300 400 500 600 700 8000

0.2

0.4

0.6

0.8

1

1.2

1.4

Wavelength (nm)

Goodness of Fit (GOF) – Indication of best match. 1 is best, 0 is worst. Typical iODP100 GOF > 0.995

Note: Red spectra is simulated and blue is measured

Ref

lect

ance

April 16th, 2007

24

FLCC

ODP Overview

1

3

24

1. (n,k) values can be determined on Sopra, or from standard table.

2. Spectra will be collected on Sopra. Data need to be interpreted in the form that can be read by Timbre ODP TeraGen.

3. This is what we have from Timbre.

4. Only for volume production.

April 16th, 2007

25

FLCC

Step 1: Thin Film Data Collection (Recommended)

April 16th, 2007

26

FLCC

Step 2: Collect and Import Data of Patterned Wafer

April 16th, 2007

27

FLCC

Step 3: The Profile Model

April 16th, 2007

28

FLCC

Step 3: The Profile Model

Si3N4

SiO2

Si

April 16th, 2007

29

FLCC

Model Verification

ForwardSimulation

tn

0th

1st

1st

IncidentLight

nt

for θ 、 λ

Rigorous Coupled Wave Analysis (RCWA)

April 16th, 2007

30

FLCC

Model Verification

Wavelength (nm)

Ref

elc

tan

ceForwardSimulation

tn

0th

1st

1st

IncidentLight

nt

for θ 、 λ

Rigorous Coupled Wave Analysis (RCWA)

April 16th, 2007

31

FLCC

Model Verification

April 16th, 2007

32

FLCC

Step 4: Library Generation and Verification

• Based on the confirmed model (parameter)

• RCWA simulation generates the library

• The library is applied to the whole data set to verify its validity

• Export the library to PAS system for in-line metrology

April 16th, 2007

33

FLCC




April 16th, 2007

34

FLCC

p

d

wb

wn d

90o -90o0o 0o

wb

0o

dpitch 4

o90

bw

- Periodic testing pattern, - Probe width provides reference 25% CF magnitude:

- Pattern width equal to minimum feature size

3.05.8

%25)/( NAwb

- Probe phase coherent to even (defocus) aberration NA/6.0

- Distance d determines the sensitivity of this aberration and the orthogonality to the other aberrations

Resonant Even Aberration Testing Mask

April 16th, 2007

35

FLCC

Line Spread Function vs. Aberration

Defocus Spherical Coma

Reference

0.01451

0.018170.02314 0.05831

April 16th, 2007

36

FLCC

Resonant Even Aberration Testing

- Inverse Fourier transform of even aberration based on line spread function- Reciprocity of the electric-field spillover

Line & point spread function

April 16th, 2007

37

FLCC

Resonant Even Aberration Testing

Sensitivities of defocus and spherical target are at least 28 times larger than the Strehl ratio measurement of aberration at 0.01aberration

April 16th, 2007

38

FLCC

Defocus Monitoring + ODP Calibration?

pos-resist

neg-resist

April 16th, 2007

39

FLCC




April 16th, 2007

40

FLCC

Mask Edge Effects

• Phase Shifting Mask Opening Cross-Talk– Use TEMPEST time-evolution

to visualize cross-talk as it occurs among masks openings

– Introduced reduced parameter edge and line source modelsImag CEI

Real CER

April 16th, 2007

41

FLCC

Simple Mathematical Model for 2nd order Fourier component

02

xP

j

ebox

x

For 50% duty cycle

Edge effects approximated by rectangular box with height unity and width w

xx

werectx

Pj

22

w is assumed to be small, so the function is approximated as constant

This value are the quantities CER and CER for the real and imaginary correction components

w

Ideal thin mask model

April 16th, 2007

42

FLCC

Intuition

Re(E)(ideal box)

Im(E)

Mag(E)actual

E Field

Duty Cycle

Mag(E) (actual)

50%

Mag(E)ideal

fHorizontal Shift: CER

Vertical Shift: CCEI

April 16th, 2007

43

FLCC

Simulation Results

Cutline taken far from interface in order to analyze propagating modes

April 16th, 2007

44

FLCC

2nd order component of TE mode

Vertical Walls

Walls undercut 5 degrees

Expect 2nd order to go to zero

Period Magnitude Minimum

Zero50% Duty

April 16th, 2007

45

FLCC

PeriodE

CEI

2min

Period

fCER

Imag CEI

Real CER

Simulation Values for CER and CEI

April 16th, 2007

46

FLCC

Experiment: FLCC March ‘07 Mask

• Gratings put on current FLCC mask to explore simulation results– Alternating 0o and 180o phase shift regions– 4 periods ranging from 3 to 12 (on mask)– Duty cycle ranging from 35-65%– 24 different gratings in total

• Compare data from these gratings to the TEMPEST simulations

April 16th, 2007

47

FLCC




April 16th, 2007

48

FLCC

ODP Illumination Test PatternsBinary Mask Example

P = 1.7/NA

Normal Incidence

Spillover SubtractsCenter line not print

April 16th, 2007

49

FLCC

ODP Illumination Test PatternsBinary Mask Example

P = 1.7/NA

s = 0.59 dipole

Spillover Adds!

Center line prints!

+ 180- 180 0

April 16th, 2007

50

FLCC

ODP Illumination Test Patterns

Binary Mask Example

P = 1.7/NA

s = 0.59 dipole

+ 180- 180 0

A richer set of combinations are allowed by• Phase-shifted openings• Using spillover from a sizeable 1RU+

programmed focus offset example P = 1.2/NA => s = 0.83 dipole

April 16th, 2007

51

FLCC

ODP 2-D Test Patterns are BetterBinary Mask Example

r = 0.85/NA

• More Flexible: spillover separation and illumination phase can be adjusted somewhat independently.

= 0.45/NA => 0.9 dipole

April 16th, 2007

52

FLCC

Optical Digital Profilometry Test Patterns, Database, and Strategy:

Conclusion• We have been able to respond quickly in generating a new

multi-student test mask for automatic measurement and profile recognition with ODP.

• The clear field mask includes line patterns. Phase-shifting patterns will be put on the dark-field mask that tapes out soon.

• A database is also proposed for assembling and cross-interpreting ODP results.

• Monitoring concepts from pattern-and-probe test patterns and electronic test patterns have been used to generate novel ODP-based parameter specific monitors for focus, illumination, and mask edges.

collaborative flcc experiments

Documents