fpga (field programmable gate array)
DESCRIPTION
FPGA (Field Programmable Gate Array). Presented By: Obaid ur Rehman Badar Hussain . FPGA. * A Field Programmable Gate Array (FPGA) is a Programmable Logic Device(PLD) with higher densities and capable of implementing different functions in a short period of time. - PowerPoint PPT PresentationTRANSCRIPT
![Page 1: FPGA (Field Programmable Gate Array)](https://reader035.vdocument.in/reader035/viewer/2022081511/5681637d550346895dd45da3/html5/thumbnails/1.jpg)
FPGA (Field Programmable
Gate Array)
Presented By:Obaid ur Rehman
Badar Hussain
![Page 2: FPGA (Field Programmable Gate Array)](https://reader035.vdocument.in/reader035/viewer/2022081511/5681637d550346895dd45da3/html5/thumbnails/2.jpg)
FPGA* A Field Programmable Gate Array (FPGA)
is a Programmable Logic Device(PLD) with higher densities and capable of implementing different functions in a short period of time.
* Topics covered:-• FPGA Overview• Logic Block• FPGA Routing Techniques• Programming Methodology• FPGA Design Flow
![Page 3: FPGA (Field Programmable Gate Array)](https://reader035.vdocument.in/reader035/viewer/2022081511/5681637d550346895dd45da3/html5/thumbnails/3.jpg)
HistoryProgrammable Read Only Memory (PROM) fuse programming n- address i/p can implement n i/p logic fun.Problem:Area efficiency.
Programmable Logic Array (PLA)Programmable AND plane followed by
programmable or wired OR plane.Sum of product formProblem :Two level programming adds delay
![Page 4: FPGA (Field Programmable Gate Array)](https://reader035.vdocument.in/reader035/viewer/2022081511/5681637d550346895dd45da3/html5/thumbnails/4.jpg)
NextProgrammable Array Logic (PAL)Programmable AND plane and fixed OR
plane.Flexible comparably.
All these PLA and PAL are Simple Programmable Logic Devices (SPLD).
Problem:Logic plane structure grows rapidly with
number of inputs
![Page 5: FPGA (Field Programmable Gate Array)](https://reader035.vdocument.in/reader035/viewer/2022081511/5681637d550346895dd45da3/html5/thumbnails/5.jpg)
Next -To mitigate the problemComplex Programmable Logic Devices (CPLD)programmable interconnect multiple SPLDs. Problem :Extending to higher density difficultLess flexibility
![Page 6: FPGA (Field Programmable Gate Array)](https://reader035.vdocument.in/reader035/viewer/2022081511/5681637d550346895dd45da3/html5/thumbnails/6.jpg)
FPGA overview2-D array of logic blocks and flip-flops with
programmable interconnections.Compact designUser can configure
Intersections between the logic blocks The function of each block
![Page 7: FPGA (Field Programmable Gate Array)](https://reader035.vdocument.in/reader035/viewer/2022081511/5681637d550346895dd45da3/html5/thumbnails/7.jpg)
Why do we need FPGAs?World of Integrated Circuits
Full-CustomASICs
Semi-CustomASICs
UserProgrammable
PLD FPGA
![Page 8: FPGA (Field Programmable Gate Array)](https://reader035.vdocument.in/reader035/viewer/2022081511/5681637d550346895dd45da3/html5/thumbnails/8.jpg)
Which Way to Go?
ASICs FPGAs
Low development cost
Short time to market
Reprogrammable
High performance
Low power
Low cost inhigh volumes
![Page 9: FPGA (Field Programmable Gate Array)](https://reader035.vdocument.in/reader035/viewer/2022081511/5681637d550346895dd45da3/html5/thumbnails/9.jpg)
Other FPGA Advantages
Manufacturing cycle for ASIC is very costly, lengthy and engages lots of manpower
Mistakes not detected at design time have large impact on development time and cost
FPGAs are perfect for rapid prototyping of digital circuits
Easy upgrades like in case of softwareUnique applications
![Page 10: FPGA (Field Programmable Gate Array)](https://reader035.vdocument.in/reader035/viewer/2022081511/5681637d550346895dd45da3/html5/thumbnails/10.jpg)
Programming Methodology
Electrically programmable switches are used to program FPGA
Properties of programmable switch determine on- resistance, parasitic capacitance, volatility, reprogram ability, size etc.
Various programming techniques are:- SRAM programming technologyFloating Gate ProgrammingAnti fuse programming methodology
![Page 11: FPGA (Field Programmable Gate Array)](https://reader035.vdocument.in/reader035/viewer/2022081511/5681637d550346895dd45da3/html5/thumbnails/11.jpg)
SRAM programming technology
Use Static RAM cells to control pass gates or multiplexers.1= closed switch connection
0= open For mux, SRAM determines the mux input selection process.
Advantage• Fast re-programmability• Standard IC fabrication Tech. is
used Disadvantage• SRAM volatile • Requires large area
![Page 12: FPGA (Field Programmable Gate Array)](https://reader035.vdocument.in/reader035/viewer/2022081511/5681637d550346895dd45da3/html5/thumbnails/12.jpg)
Why better ?FPGA programmed using electrically
programmable switchesRouting architectures are complex.Logic is implemented using multiple levels of
lower fan-in gates.Shorter time to market Ability to re-program in the field to fix bugs
FPGA DISADVANTAGE FPGAs are generally slower than their
application-specific integrated circuit (ASIC) Can't handle as complex a design, and draw
more power.
![Page 13: FPGA (Field Programmable Gate Array)](https://reader035.vdocument.in/reader035/viewer/2022081511/5681637d550346895dd45da3/html5/thumbnails/13.jpg)
Application Reconfigurable computing. Applications of FPGAs include DSP,
software-defined radio. The inherent parallelism of the logic
resources on the FPGA allows for considerable compute throughput.
![Page 14: FPGA (Field Programmable Gate Array)](https://reader035.vdocument.in/reader035/viewer/2022081511/5681637d550346895dd45da3/html5/thumbnails/14.jpg)
FPGA Design and ProgrammingTo define the behavior of the FPGA the user provides
a hardware description language (HDL) or a schematic design.
Then, using an electronic design automation tool, a technology-mapped net list is generated.
The net list can then be fitted to the actual FPGA architecture using a process called place-and-route.
The user will validate the map, place and route results via timing analysis, simulation, and other verification methodologies.
Once the design and validation process is complete, the binary file generated used to configure the FPGA.
![Page 15: FPGA (Field Programmable Gate Array)](https://reader035.vdocument.in/reader035/viewer/2022081511/5681637d550346895dd45da3/html5/thumbnails/15.jpg)
*THANK YOU*