john coughlan tracker week october 2005 0 fed status production status acceptance testing

John Coughlan Tracker Week October 2005

www.te.rl.ac.uk/esdg/cms-fed/qa_web

1

FED Status

Production Status Acceptance Testing

Project Countdowncurrent week nr 43

Nr Weeks to Nov 1st 2006 53

Nr Working Days remaining 224



2

FED Production Summary• 1st batch of 50 FED boards are almost all at RAL• 2nd batch of 50 at test at Assembly Plant, many already at RAL.• 3rd batch of 50 in production in progress.

• Board Quality of boards at RAL is good and is improving as we iron out minor faults.

• Test Crates & Software at Assembly Plant are working very well.

• 40 FEDs sent to CERN last week

• + 70 SLINK 6U VNE Transition cards at CERN already(to be tested with final DAQ link before completing production).

CMS Tracker FED Final Production Cumulative Delivery Schedule (NB figures do not include Pre-Series or Prototype FED deliveries)

0

100

200

300

400

500

600

To

tal N

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ds

Planned at CERN

Actual at CERN

Planned at CERN 0 0 25 50 100 150 200 250 300 350 400 450 475 500 500 500

Actual at CERN 0 0 40 40 40 40 40 40 40 40 40 40 40 40 40 40

Apr May Jun Jul Aug Sep Oct Nov Dec Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov

2005 2006



3

Stage 1. Testing at Assembly Plant

• First Stages of Test are done at Assembly Plant. After standard Assembly QA procedures.• Carried out by trained Assembly Plant Operatives using RAL/Imperial Test Equipment.

1. LHC Crate with Boundary Scan Test – For Digital circuitry incl BGAs

2. LHC Crate with Custom VME Test – For Analogue circuitry

• History of Test Results are stored in HTML files. Summary stored in EPROM on FED.

LabView over Std FED Software



4

FED Testing

OptoRx

VME

34 xFPGAs

Custom Analogue Test

TTC

JTAGBoundary Scan Test

Throttle

SLink

96 ADC channels



5

Stage 2. Testing at RAL • Using FED Tester units and SLINK FEDKits…

• ORx Input Test

• SLINK and VME Fast Readout Test

• Throttle signal Test

• TTC Test

• Timing Calibration Test

• Power full crate (16 FEDs) for 24+ hours.

• Water Cooling for Rack installed to run 16 FEDs.

FED Testers

16 FEDs

FED under Test

SLINK FEDKit

Transition Cards are at Rear



6

Testing so far…• 1st Batch of 50 FEDs received at RAL…

Assembly Plant Tests:Company needed RAL help with ~ 6 boards.Others identified and corrected with minor repairs; solder bridges, couple ADCs replaced.2 boards had a BGA rework.

Quality of boards received at RAL is very good. Assembly testing has weeded out previous faults.

Few minor issues, couple of dry joints, led wrong way round, missing air deflectors, TTC couplers.2 boards replaced 1.5V DC converter, power up problem. Under investigation.

Remaining 4 boards failing RAL acceptance Tests:No common failures.e.g. 1 with bad TTC ; 1 SLINK errors ; 1 warped board ; 1 no ORx channel ouputNone of which would expect to find at Assembly test.

Concerns:

• One LHC Final Crate Power Supply blew. But no FEDs were damaged.

• Long lead time on Xilinx FPGA ACE controller chip (~150 in hand, alternative sources being investigated).



7

FED Firmware Improvements• VME Interface Firmware is working stably with CAEN VME bridge (new Driver for SMP).

• VME Block Transfer Read Speed increased.• from ~ 6 MBytes/sec to ~ 14 MBytes/sec (using CAEN with 16 FEDs in crate)• to improve much further we will need go to MBLT64 (Mux 64 bit transfers)

• Fake Events (Raw Data or Zero Suppressed) is working.

• “Zero-Suppressed-Lite” mode (minimal data volume) is working.

• Clock Skews to ADCs improved, now providing v. smooth 25 x 1 nsec steps.• should help with timing calibration

Next : Spy Channel with Frame Trigger



8

Other Items• Production boards are only intended for large scale Tracker commissioning and USC.

24 Pre-Series FEDs have been delivered to date for use in LSA / DAQ tests.

Pre-Series are identical to Production boards.

• “Vertical Slice” Test.

Test of Production FED with other Production Tracker/CMS Electronic systems needed.

• Stage 3. Acceptance testing at CERN 904.

Test delivered FEDs in 904 crates.

Aim to test and install: “FED + Transition card + SLINK Transmitter CMC” as unit ?



9

Summary

CMS Tracker FED Final Production Cumulative Delivery Schedule (NB figures do not include Pre-Series or Prototype FED deliveries)

0

100

200

300

400

500

600

To

tal N

r B

oar

ds

Planned at CERN

Actual at CERN

Planned at CERN 0 0 25 50 100 150 200 250 300 350 400 450 475 500 500 500

Actual at CERN 0 0 40 40 40 40 40 40 40 40 40 40 40 40 40 40

Apr May Jun Jul Aug Sep Oct Nov Dec Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov

2005 2006

+ 70 SLINK Transition cards at CERN

• Board production is progressing to plan.

• Good working arrangements between Assembly company and RAL Test effort.

40 FEDs delivered and a further ~ 20 FEDs ready to send.



10

Spare Slides



11

Close up



12

ADC Clock Skewing

Selected Steps

0

5

10

15

20

25

30

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

Step

nse

c

Series1

Fine Delay SkewsDelay 24000223 DCM steps of 8

0.0

5.0

10.0

15.0

20.0

25.0

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Fine Skew setting + 1

Rel

ativ

e S

hif

t in

nse

cs

Improved

Presently



13

Temperatures in Full Crate

Temperatures of 16 FEDs in Crate with Water Cooled Rack at RAL

20

25

30

35

40

45

50

55

60

65

70

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

VME Slot

Deg

C

8

7

6

5

4

3

2

1

Top

Bot

Input Fan Temp 24 CBin Temp 20 C

Fan Speed 3600 rpmTotal Power 1105 W5V 93 A12V 12.2 A3V3 150 A

john coughlan tracker week october 2005 0 fed status production status acceptance testing

Documents

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