ltcc - rn2rn2.co.kr/images/ltcc.pdf · vias may be formed in the rn2 low-k ltcc using mechanical...

LTCC

Low Temperature Co-fired Ceramic

Design Rule

This guideline is applicable to LTCC substrates manufactured by RN2 Technologies Co., Ltd

This guideline provides you the general information. Please feel free to contact us for the detail or

further information. We will be able to provide you further information depending on your individual

request.

All figures in this guideline indicate minimum values unless specified.

RN2 Technologies

http://www.RN2LTCC.com

1

Technologies 1. RN2 Instruction

1-1. About RN2

Company Name RN2 Technologies Co., Ltd.

Established 2002. 3. 20

President Hyo Jong, Lee ph.D

Address

1ST Factory

11, Dongtansandan 9-gil, Dongtan-myeon, Hwaseong-si, Gyeonggi-do, Korea

2ND Factory

Ka-4-1 block Daejeon-dong, Gangneung-City, Gangwon-do, 210-340, Korea

Tel. +82 31-376-5400

+82 33-646-4161

Fax. +82 31-376-9151

+82 33-645-4160

Business LTCC Total Solution

(Components/Substrate/Foundry Service)

1-2. RN2 Core competence

1) Material Design Capability

2) Fine Process by Experienced Personnel

3) Low material cost by in-house powder Manufacturing

4) Circuit Design Flexibility

5) Co-firing with different LTCC Materials

6) High Yield & Performance by New Process

1-3. LTCC Total Solution


2

Technologies 2. What is LTCC?

LTCC (Low Temperature Co-firing Ceramic) can be defined as a cutting-edge mechanism by which

layers of silver or copper metal is printed onto ceramic substrates to form passive components and the

layers are then fired to form a very durable end product. The key advantage of this technology is that by

being able to use multiple layers, many different passive components can be fitted into a very small area

and then compounded to form a single device.

Benefit of LTCC is to use higher conductive material, silver and copper can be used under 900

instead of molybdenum and tungsten that are used in the HTCC (High Temperature Co-firing Ceramic at

1,500). Among the multilayer ceramic technology, the LTCC has drawn a great deal of attention for its

low dielectric loss and relatively low firing temperature, which make it possible to make products be

smaller, thinner and high density multilayer.


3

Technologies 3. LTCC advantage

3-1. Low cost technology

1) Collective process adapted to automated manufacturing equipment

2) Only one firing step for all internal layers

3) Silver based conductors with high electrical conductivity

4) Firing temperature below 900

3-2. High reliability

1) Ceramic based materials

2) Temperature range up to -55 ~ 150

3) Hermetic seal

4) Low thermal coefficient of expansion

5) Compatibility with bare dies

3-3. High flexibility

1) Compatibility with a wide range of assembly techniques

2) Packaging capability

3) Complex shape of substrate

4) Cavities

3-4. High electrical performance

1) Various tape thickness[30 to 200]: low parasitic line capacitances

2) Low resistivity conductor[Ag or Au – XX mΩ/square]

3) Low loss(tanδ) High Q dielectric ceramic

3-5. High integration density

1) Conductor line width and spacing down to 60

2) Buried via structures [staggered and stacked]

3) Via diameter down 100

4) Via pitch down to 300

5) High number of conductive layers: up to 30 layer

6) Double sided substrate capability

7) Integrated packaging components


4

Technologies 4. Process technology

4-1. CAD System

1) Data format: Gerber file, Auto CAD file

2) Design example

① Divide a multi-layer design into each layer pattern.

② Divide a multi-layer design into each layer via.

③ Divide a multi-layer design into each layer cavity.

④ Send to RN2: Pin-map, design file.

4-2. Manufacturing process

1) Green sheet casting: After mixing ceramic raw materials and organic materials such as binder,

plasticizer, dispersing agent, and solvent according to a specific composition using a ball mill, the

resulting slurry is formed into green sheet.

2) Via/Cavity punching: In order to form via conductor in the green sheets for connections between

each layer, it is necessary to form holes with a diameter of around 100 ~ 200um in the sheets.

Vias may be formed in the RN2 Low-k LTCC using mechanical punches, drill or lasers.

3) Via filling: Via filling is the process in which the via holes formed in the green sheet (Using a

punch, pin, laser and so on) are filled with the conductor.

4) Conductor printing: In general, the screen printing technique known as gap printing is used for

printing the wiring pattern on the green sheet. Gap printing is a method in which a gap is set

between the mask and the green sheet and when the squeegee passes over the mask, the

conductive paste is pushed through the opening in the mask onto the green sheet.

After conductor printing, the sheet is dried at room temperature 15 to 60 minutes, or in

conventional drying oven at a maximum temperature of 60 for 5 to 10 minutes.


5

Technologies 5) Alignment: The purpose of the lamination process is to make a single substrate by aligning several

layers of green sheet on which vias and wiring have been formed. Pressure and heat is then

applied and the several individual green sheets are combined into one unit. All layers should be

inspected for visual acceptance and collated.

6) Lamination: Accomplished using isostatic lamination in a specially designed press under heated

water. (To make laminated sheets as integrated one green body)

7) Co-firing [Burn-out]: In the LTCC co-firing process, normally the organic constituents such as binder

and so on are driven off and eliminated in the de-binding axing process before each material is

sintered and densified. The difficulty of firing a ceramic substrate using silver as the wiring lines in

firing the dissimilar material silver and ceramic at the same time.

8) Electric testing: After co-firing and post firing operations have been completed, the laminate is 100%

tested for electrical opens and shorts.


6

Technologies 5. Material Property

LTCC Material properties

RNE-0302

Typical fired Electrical Properties

Dielectric constant at 1MHz 6.0

Dielectric constant variation ±0.2

Dielectric loss(tan δ) <0.002

Plating Ni/Au

Typical fired Physical Properties

Min. Layer thickness 0.1 mm

Thermal expansion Coefficient.[ppm/C] 5.8

Thermal conductivity[W/m·k] 2.0

Flexural strength[MPa] 220

Processing Guidelines

Working area Max 100 x 100mm

Color White

RN2 Material Merit

Demonstrated reliability

Consistent performance

Excellent high frequency performance

Complete gold, silver system

Plating

RF & Microwave IC packaging

A complete solution from design to manufacturing

Easy to process

Uniform performance over broad frequency range

Stable in harsh environments

Strong mechanical properties


7

Technologies 6. LTCC Design Recommendations

6-1. Conductor Layout

1) Exposed signal & Buried signal conductor

Item Standard Special

Design() Tolerance() Design() Tolerance()

A Via Diameter 0.15 ± 0.020 Min. 0.10 ± 0.010

B Via cover pad diameter 0.35 ± 0.010 Min. 0.15 ± 0.005

C Via pitch 0.45 ± 0.020 Min. 0.20 ± 0.010

D Via cover to line 0.10 ± 0.010 Min. 0.06 ± 0.010

E Via cover to substrate edge 0.30 ± 0.100 Min. 0.20 ± 0.100

F Via cover to cavity edge 0.20 ± 0.050 Min. 0.10 ± 0.050

G Line to cavity edge 0.20 ± 0.050 Min. 0.10 ± 0.050

H Line space 0.10 ± 0.010 Min. 0.06 ± 0.005

I Line width 0.10 ± 0.010 Min. 0.06 ± 0.005

J Line to substrate edge 0.30 ± 0.100 Min. 0.20 ± 0.100

K Castellation to line 0.30 ± 0.100 Min. 0.20 ± 0.100


8

Technologies 2) Ground Plane



L Via Diameter 0.15 ± 0.020 Min. 0.10 ± 0.010

M Via cover pad diameter 0.35 ± 0.010 Min. 0.15 ± 0.005

N Via cover to via cover 0.45 ± 0.020 Min. 0.20 ± 0.010

O Isolation gap 0.20 ± 0.010 Min. 0.10 ± 0.010

P Solid plane 0.10 ± 0.010 Min. 0.07 ± 0.010

Q Line to GND 0.10 ± 0.030 Min. 0.06 ± 0.020

R Cavity edge to via cover 0.20 ± 0.050 Min. 0.10 ± 0.050

S Cavity edge to GND 0.20 ± 0.050 Min. 0.10 ± 0.050

T Substrate edge to GND 0.20 ± 0.010 Min. 0.10 ± 0.100

U Substrate edge to via cover 0.30 ± 0.010 Min. 0.20 ± 0.100


9

Technologies 3) Wire Bonding Pad

Item Standard special


a Pad width 0.15 ± 0.020 Min. 0.10 ± 0.005

b Pad space 0.10 ± 0.020 Min. 0.05 ± 0.005

c Pad edge to cavity 0.20 ± 0.050 Min. 0.10 ± 0.050

4) SMD Pad

Item Design() Tolerance()

d Pad width Min. 0.15 ± 0.02

e Pad space Min. 0.20 ± 0.02

f Pad edge to substrate edge Min. 0.30 ± 0.10


10

Technologies 6-2. Cavity Design



h Cavity edge to substrate edge 1.50 ± 0.10 Min. 1.00 ± 0.10

i Cavity edge to via edge 0.30 ± 0.05 Min. 0.15 ± 0.05

j Cavity edge to via cover 0.20 ± 0.05 Min. 0.10 ± 0.05

k Cavity Width 2.50 ± 0.05 Min. 1.50 ± 0.05

l Cavity to cavity gap 1.00 ± 0.05 Min. 1.00 ± 0.05

m Cavity Height 1.00 ± 0.05 Max. 1.50 ± 0.10

n Thickness under the cavity 0.30 ± 0.02 Min. 0.20 ± 0.02

Aspect Ratio* 0.4 - Max. 1.0 -

※ Aspect Ratio = Cavity Height(m) / Cavity Width(K)


11

Technologies 6-3. Cutting / Sawing

1) Cutting / Sawing

① Green body-cutting : Tolerances are defined by the cutting tolerance (Typically ± 0.15)

② Ceramic substrate scribing

Item Standard

① & ② GND plane to substrate edge Min. 0.05

③ Scribing depth 30 ~ 50%(Total thickness)

2) Ceramic substrate-sawing

Item Standard

① & ② GND plane to substrate edge Min. 0.05

③ Sawing Line Width 0.2

ltcc - rn2rn2.co.kr/images/ltcc.pdf · vias may be formed in the rn2 low-k ltcc using mechanical...

Documents