pwi: plasma wave instrument. past major events: october 13: pwi 6th kyoto meeting ( kyoto univ.)...
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MEFISTO-E
EFD
OFA/WFC
SORBET
AM2P-E
WPT-E
AM2P-S
MDP(CPU/RAM)
PWI-E
LF-SC
DB-SC
DB-SC
MEFISTO-S
WPT-S
SC-Pre
SC-Pre
WPT-PreWPT Drive
MEFISTO Drive
FPG
A
x 2 (for E, and B)
PWI Block Diagram
MEFISTO-E
EFD
OFA/WFC
SORBET
AM2P-E
WPT-E
AM2P-S
MDP(CPU/RAM)
PWI-E
LF-SC
DB-SC
DB-SC
MEFISTO-S
WPT-S
SC-Pre
SC-Pre
WPT-PreWPT Drive
MEFISTO Drive
FPG
A
x 2 (for E, and B)
PWI Block Diagram
PWI: Plasma Wave Instrument
Past major events:
October 13: PWI 6th Kyoto meeting ( Kyoto Univ.)
Discussion of the electrical interface and
EMC
October 18: EMC board meeting (ISAS)November 21: EGSE Meeting ( Meudon )
PWI Common GSEDecember 6: EMC tests of TWTA (Kanazawa)
Update of the PWI status (after the previous SWG)
EWO
•BBM Development & Tests: DC CAL/BIAS 、 Loop gain controlLPF of WFC/OFA/EFD-E & B
AM2P
•Power supply :•Voltage conversion- Usage of -12V ->-5V
-> increase of power consumption• Under the discussion of the size and weight
considering the additional functions(To be discussed this week in Kanazawa)
Whole SCMSCM has been fully tested at Kanzawa University,
LF-x (JAPAN)LF-y (JAPAN)LF-z (FRANCE)HF-z (FRANCE)
Gain
Phase
Frequency [Hz]1 1M
Gain
Phase
Frequency [Hz]1 1M
SC-LF/SC-DB
TiAlN probe 40 mm diameter
MEFISTO update 22 March 2006
Sensor wire, 0.1-0.3 mm
“puck” Boom, connected to s/c ground
• Max. amplitude (LF) 500 mV/m• Bit resolution 0.015 mV/m• Spacecraft potential -100 to +100 V• Frequency range DC – 3 MHz
1-2 m 13-14 m
Second-Surface Mirror Development
Work is on-going to develop an SSM, mainly for the boom wire. Goal is to achieve:
• Mechanical flexibility• Electrical conductivity, to keep all satellite
surface potentials within ~1V• Temperature below 150°C to avoid damage to
wire insulator material
Thermal Modelling
• Thermal model of MEFISTO “stand-alone” has been developed and run
• All temperatures within acceptable limits for all mission phases
• Model has been supplied to JAXA, for integration with spacecraft level model
• Currently model details are being discussed and iterated with JAXA thermal engineers
Electronics
• Design and development of flight electronics is proceeding as planned
• Co-ordinated EGSE development in Europe is progressing
Mechanics
• Design and development of flight machannics is proceeding as planned
Funding status
• Swedish National Space Board
• Royal Institute of Technology
• Swedish Institute of Space Physics
have signed funding commitments
Requests (reminder)
• Normal sun angle > 92 deg, i.e., 93 +/- 1 deg, if possible
• Maximum potential difference on external surfaces of order 1 V, i.e., all external surfaces must be (reasonably) conductive
SORBET instrument bloc diagram
S ea rch C o il D B
to /fr o m
D P U
+ E x
-E x
+ E y
F P G A
A G C
A G C
P A
P A
P A
1 0 k-4 0k
2 .5 k-1 0 k
1 6 0 k-64 0 k
4 0 k-1 60 k
1 0 k-4 0k
2 .5 k-1 0 k
1 6 0 k-64 0 k
4 0 k-1 60 k
R O M
-E yP A
S O R B E TIn stru m en t
+
-
+
-
C a l
C a l
C a l
Bz
T N R (T h erm a l N o ise R ece iver )
IF F ilter2 1 .4 2 5 M
L O2 1 .2 8 5 M
S y n th2 1 .9 2 5 M3 1 .6 2 5 M
H F R (H ig h F req u en cy R ece iver )D ig ita l
u n it
+
-
A D C
V ref
V ref
+
-
New ASIC design (January 2006)Analogue functions on a single chip :– Specific design (Full Custom)
– Thin CMOS technology (AMS 0.35um)
– 2 logarithmic amplifiers (AGC)
– 2 low noise mixers
– 1 selective band-pass filter
– 1 low noise operational amplifier
Functional testing showed :– Good performances
– Improvement of the dynamic range
– Less power needed
Future actions– Thermal testing (soon)
– Radiation evaluation (2Q/2006)
– Decision to continue the ASIC solution (3Q/2006)
2.6mm
2.6mm
ELISA_0110/14 2.5V
Vref (3.5V)
AOP
In+ In-
IBIAS
Out
Clock driver
Clk_In
p_Clk
n_Clk
Mixer_1
Mixer_2
1
245 10
8
7
6
11121314 17 18
1921 25
2930
31
33
34
36 37 38 39 4042
IBIAS
RF-
RF+
OL+OL-
IF+
IF-
IBIAS
IF+
RF-
RF+
LO+LO-
IF-
AGC_1 Out
In
V CM
V AGC
IBIAS+
IBIAS -
V REF
R FBK
AGC_2Out
In
V CMV AGC
R FBK
IBIAS+
IBIAS -
V REF
4445
46
47
Band-Pass
SC-Filter
IBIAS
In Com
Out
p_Phi
n_Phi
Amp+
-
Amp-
+
M ix_Bias
IF_O
ut1
LO
1+
LO
1 -
RF1+
RF1 -
AG
C_O
ut1
Rfb
k1
Vc1
Vcm
1
AG
C_I
n1
Fil
t_O
ut
Fil
t_B
ias
AO
P_I
n+
AO
P_I
n -
AOP_Out
Fil
t_C
lk
Fil
t_C
om
Fil
t_In
AG
C_B
ias
-
Vcm
2
AG
C_I
n2
Vc2
Rfb
k2
AG
C_B
ias+
RF2+
RF2 -
LO
2+
LO
2 -
AG
C_O
ut2
IF_O
ut2
Major Events in the future
March, 2006:PWI local meeting in Kanazawa
March 2006:EMC tests of the MSASI motor
● エレキEWO-EFD: 回路設計
DC CAL/BIAS 、 Loop gain control
EWO-WFC/OFA: 回路設計センサとのインタフェース、 AC CAL
レベルダイアグラム
SORBET: EWO とのインタフェースAM2P:
LVDS: +20g 、電力 3 倍?MEFISTO レングスモニタ検討中CMD&STATUS
CAL 信号 → EWO へ観測シーケンス検討
BBM 製作・特性試験(富山県大)( BIAS/CAL 、 LGC 、 FPGA )
フィルタ BBM 製作( MHI ) 特性試験(京大)
PWI前回設計会議からの進捗状況 今後の予定
● その他Software / operation:
データ取得シーケンス検討(金沢大)各センサ/受信機 ⇔ MDP
EMC:
MMO EMC Meeting ( 10/18:ISAS )→ EMC ver.1.11
TWTA EMC 試験( 12/6 :金沢大)RE-02 / RE-04 (電界 / 磁界)CDC (電流)
MDP-2 内接地方式: 1 点接地を基本アナログ観測信号は差動受渡 cf. multiple ground: for clean E
single ground: for clean B
基本案確定( 3 月: PWI+MDP )
MSASI モータ EMC 試験( 3 月:金沢大)
具体的議論( 3 月)
PWI前回設計会議からの進捗状況 今後の予定
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