Microelectronics Reliability xxx (2015) xxx–xxx

MR-11614; No of Pages 5

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Microelectronics Reliability

j ourna l homepage: www.e lsev ie r .com/ locate /mr

Physically-based extraction methodology for accurate MOSFET degradation assessment

Giulio Torrente a,b,c,⁎, Jean Coignus b, Sophie Renard a, Alexandre Vernhet b, Gilles Reimbold b,David Roy a, Gerard Ghibaudo c

a STMicroelectronics, 850 rue Jean Monnet, F-38926 Crolles, Franceb CEA, LETI, MINATEC Campus, 17 Avenue des Martyrs, F-38054 Grenoble, Francec IMEP-LAHC, MINATEC Campus, 3 Parvis Louis Néel, F-38016 Grenoble, France

⁎ Corresponding author at: IMEP-LAHC,MINATEC CampGrenoble, France.

E-mail addresses: giulio.torrente@st.com (G. Torrente)(J. Coignus), sophie.renard@st.com (S. Renard), alexandregilles.reimbold@cea.fr (G. Reimbold), david.roy@st.com (Dghibaudo@minatec.inpg.fr (G. Ghibaudo).

http://dx.doi.org/10.1016/j.microrel.2015.06.0630026-2714/© 2015 Elsevier Ltd. All rights reserved.

Please cite this article as: G. Torrente, et al.,tronics Reliability (2015), http://dx.doi.org/1

a b s t r a c t

a r t i c l e i n f o

Article history:Received 21 May 2015Received in revised form 16 June 2015Accepted 16 June 2015Available online xxxx

Keywords:Parameter extractionsHCIDegradationTrapsInterface traps

This paper analyzes conventional parameter extraction methodologies applied to MOSFET devices subject toelectrical stress and highlights the complexity to accurately get and separate both electrostatic and transport deg-radations. It is shown that an accurate Coulomb scattering assessment from the linear Id-Vg characteristics ismandatory whenever the amount of interface charges/traps becomes significant. Thus, this paper proposes anovel technique able to extract the electrostatic drift and the field-dependent mobility directly from the experi-mental data without any a priori assumption for the transport.Applied to MOSFETs experiencing Hot Carrier Stress, the proposed methodology provides deeper insights intothe relationship between stress-induced defects location and their impact on electrostatic and transportdegradations.

© 2015 Elsevier Ltd. All rights reserved.

1. Introduction

The precise extraction of MOSFET parameters is a major concern forboth characterization and circuit design purposes in microelectronics.With the continuous device down-scaling an accurate extraction ofthe physical parameters recorded as a function of the stress isfundamental to get the device behavior for any kind of degradation. Ifcapacitance measurements (CV) [1] or charge pumping technique(CP) [2] cannot provide relevant results because of geometrical issues,efforts can be done to get physical information from the linear Id-Vgcurves measured during the stress, for example as the Y-functionmethod does [3].

In this paperwe focus the attention on Hot Carrier Stress (HCS), thatremains one of themajor reliability concerns [4,5], in particular for flashmemories [6,7], since the programming current degradation is mainlydue to hot carrier damage leading to the failure of the cell itself. Ap-proaches proposed in literature to predict the MOSFET degradationunder HCS are based on the Energy Driven Paradigm [8,9], whosemodels have been calibrated on the drift of the inverse of themaximumtransconductance (1/Gmmax), extracted from the linear Id-Vg

us, 3 Parvis Louis Néel, F-38016

, jean.coignus@cea.fr.vernhet@cea.fr (A. Vernhet),. Roy),

Physically-based extraction m0.1016/j.microrel.2015.06.06

characteristics. This parameter has been demonstrated to be propor-tional to the amount of interface traps and to the low field mobilityreduction [10].

This paper explores the physical validity of Gmmax extraction togetherwith Y-function technique and proposes a novel extractionmethodologyfor an accurate degradation assessment whenever the device is stressed.

2. Experimental details and conventional parameter extractions

The experiments presented in this work have been done onMOSFETs belonging to the 40 nm embedded 1T-NOR flash technologydeveloped at STMicroelectronics. These transistors have flash technolo-gy geometry (tox = 9.7 nm, W= 60 nm, L = 140 nm), and are built byshorting the control and floating gates with the objective to reproduceand study the stress suffered by the bottom part of the cell. For suchgeometry CP measurements do not lead to relevant results due to“geometrical effects” [11]. Two different HCS conditions have beenapplied: Vg/Vd = 6 V/4 V and Vg/Vd = 8 V/3.6 V, where Vg and Vddenoting gate and drain biases respectively. In both cases, measure-ments have been performed in AC (alternate stress and delay periodsof 1 μs), and the degradation displayed is exactly the same as observedwith the DC pattern (not shown here). During the stress, measuredlinear Id-Vg curves (Vd = 50 mV) drift towards higher Vg, as shownfor the stress condition Vg/Vd = 6 V/4 V in Fig. 1a.

The observed drift may originate from three sources of degradation:electrostatic, transport and access resistance (Racc). In order to probeand distinguish them, a first approach is to track the drift of Gmmax

and of the “Vth at constant current” (VthCC) at Idth = 5 μA, that are

ethodology for accurate MOSFET degradation assessment, Microelec-3

a)

b)

c)

Fig. 1. Results and conventional extractions concerning HCS condition Vg= 6 V and Vd=4 V: (a) Linear Id-Vg degradation, (b) calculated transport and (c) electrostatic degrada-tions with conventional approaches.

2 G. Torrente et al. / Microelectronics Reliability xxx (2015) xxx–xxx

expected to represent the transport and the electrostatic drifts respec-tively. Since Racc drift is not taken into account with this procedure,Vth, µ0 and θ1 have been extracted with Y-function method [3]. InFig. 1b–c the parameters extracted with these two procedures havebeen compared and it is worth noting that the two extractions are notconsistent to each other and lead to different results.

3. Limitations of conventional techniques for parameter extractions

The underlyingmismatch between the conventional methodologiesnoticed in the previous section could come fromdifferent sources. Firstly,Y-function technique accounts for the presence of access resistancethrough θ1 while it is not the case for Gmmax extraction. However, ithas been verified for such devices that θ1 decrease proportionally withµ0, indicating that Racc is almost constant during the stress (not shownhere).

In order to investigate the validity of the extracted parameters, aTCAD model has been used as reference. Indeed, the extracted parame-ters from the simulated Id-Vg curves (Vd=50mV) and the degradationthat TCAD really shows have been compared. This model has been de-veloped considering the real process steps and is electrically calibrated.The mobility model being considered [12,13] takes into account theCoulomb scattering occurring with interface charges.

The device has been simulated with different negative and uniforminterface charges Nit. Fig. 2 exhibits the drift of Vth extracted from sim-ulated linear Id-Vg using different methodologies. Δ VthCC at Idth =0.1 nA appears to be close to the intrinsic threshold voltage drift ΔVthINTRINSIC (i.e., the Vth shift simulated by turning off the model forthe mobility reduction with Nit) whenever the Idth considered is well

Fig. 2.Δ Vth extractions on simulated Id-Vg (Vd= 50mV) curves: this has been done fordifferent densities of uniform interface negative charge.

Please cite this article as: G. Torrente, et al., Physically-based extraction mtronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.06.06

below threshold. This is because Vth extraction is less sensitive to mo-bility degradation in this region, otherwise it mixes electrostatic andtransport shifts (it obviously fails @Idth = 5 μA). It is also shown thatthe Gmmax position (Vgmax) drifts much more than the VthINTRINSIC,meaning that Gmmax is not a good sensor of the physical device aging:its position drifts more than the pure electrostatic shift, leading to anot fair comparison of mobility (different overdrive Vg-Vth). Analo-gously it is observed that Δ VthY-function overestimates Δ VthINTRINSIC,which similarly leads to an underestimation of low field mobility drift.

Considering the case of a localized fixed negative charge close to thedrain region (as for hot carrier damage) in Fig. 3, the situation iseven more clear, as transport degradation is mainly observed. IndeedTCAD simulation gives a negligible electrostatic shift component(Δ VthINTRINSIC = 107 mV), while Vth values extracted by conven-tional methods are strongly impacted by transport degradation (ΔVthCC@5μA = 1.4 V, Δ VthY-function = 0.98 V and Δ Vgmax = 1.16 V).

4. New extraction procedures

4.1. Method 1

As evidenced in Fig. 2, drain current below threshold is a good indi-cator of pure electrostatic drifts. However, interface defects have an am-photeric nature [14] and so one cannot easily get the Δ VthCC belowthreshold because of the subthreshold slope (SS) evolution with Dit(Fig. 1a). The first proposed approach is to quantify the physical degra-dation in a wide Vg range keeping a phenomenological model for μ(Vg)and improving the QINV(VG) from the conventionally used strong inver-sion approximation COX(VG − VTH) (i.e., the assumption lying behindboth Y-function and Gmmax extractions). The procedure is based on agood fitting of the whole Id-Vg curve in order to extract both electro-static and transport degradations, mainly in weak and in stronginversion respectively. The model used is the classical 1D model forlong-channel transistors [1]:

QS ¼ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi2qεSi NAϕS þ

ni2

bNAexp bϕSð Þ−1ð Þ

� �sð1Þ

QINV ¼ QS−ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi2qεSiNAϕS

pð2Þ

VG ¼ V FB þ ϕS þQS

COXþ qΔDIT ϕS−ϕBð Þ þ ΔQOX

COXð3Þ

ID VGð Þ ¼ WLVD

μ0

1þ θ1QINV VGð Þ

COX

QINV VGð Þ ð4Þ

where b= kT/q [V],ϕB= b ⋅ ln(NA/ni) [V],ϕS [V] is the surface potential,QS [C·cm−2] is the total charge in the silicon bulk, QINV [C·cm−2] is theinversion charge,ΔDIT [cm−2 eV−1] andΔQOX [C·cm−2] are respective-ly the amount of interface traps (considered constantwith energy in sil-icon band gap) and equivalent bulk oxide charges at the interface.

The methodology proposed here is based on an iterative fitting pro-cedure of the experimental curves Log(Id)-Vg and Id-Vg with the solu-tion Id(Vg) of the system Eqs. (1)–(4). For a fresh device (i.e., beforestress) ΔDIT = ΔQOX = 0 is assumed and the fitting procedure is donevia the following steps:

– Fit of Log(Id)-Vg varying NA& VFB, because the SS is sensitive to CD,keeping µ0 & θ1 fixed.

– Fit of linear Id-Vg varying µ0 & θ1, because linear regime being moresensitive to the transport, keeping NA & VFB fixed.

The convergence occurs very fast, after a couple of loops. For astressed device the scheme is the same, with the difference that NA &VFB are fixed and ΔDIT & ΔQOX vary for the Log(Id)-Vg fitting. In this

ethodology for accurate MOSFET degradation assessment, Microelec-3

b)

x

a)

Fig. 3. Id-Vg simulations for localized interface negative charge at the drain edge: (a) simulated Id-Vg (Vd=50mV)with Nit=0 andwith Nit b 0 distributed close to the drain regionwitha Gaussian shape as depicted in (b).

3G. Torrente et al. / Microelectronics Reliability xxx (2015) xxx–xxx

way the four degradation parameters ΔDIT, ΔQOX, Δ(1/µ0) and Δθ1 areextracted. Examples of comparison between fitting and experimentalId-Vg curves are shown in Fig. 4.

The resultingfitting is quite good for a fresh device and in general forlow degradation, while it might be lost in threshold region for highlystressed device. Possible explanations for such a mismatch are thefollowing:

– ConstantDIT vs E considered in Eq. (3) is not appropriate. In this casea good fitting can only be achieved with a trap concentration in-crease of ~2 orders of magnitude close to the conduction band,which is unlikely.

– A distorted experimental curve due to parasitic trapping during theVg-sweep. This effect is known to be particularly present in stronginversion [15], which is not the case here.

– Mobility model in Eq. (4) is not appropriate whenever a strong deg-radation occurs. It is known that the Coulomb scattering reduces themobility more at low field than in strong inversion: for highlystressed device, indeed, the field-dependence of the mobility iseven not monotonous anymore, µ(VG) looks like a bell-shape. Thiseffect is well known looking at any result from split CV technique[16]. Since this behavior is not expected by the mobility model inEq. (4), a good fitting could not be achieved. Coming back toSection 3, it is now clear why the two conventional procedures can-not provide an accurate extraction: in both cases the transportmodel behind is the same as in Eq. (4).

4.2. Method 2

Since the divergence in thefitting occurs because themobilitymodeldoes not take into account correctly the real scattering events, the

b)a)

Fig. 4. Confront between the experimental and fitting curves for Method 1: (a) in Log(b) in Lin, both for fresh and stressed cases.

Please cite this article as: G. Torrente, et al., Physically-based extraction mtronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.06.06

objective is to get the transport directly from experimental datawithoutassuming any mobility model. A completely separation of electrostaticand transport extractions have been proposed by getting the realthreshold voltage shift first and then obtaining the field-dependentmobility in strong inversion. For the fresh case nothing changes with re-spect to Method 1, but whenever one considers a stressed device the ΔVth has to be estimated and the mobility is simply given by:

μ VGð Þ ¼ ID VGð Þ WLVDQINV VGð Þ

� �−1

¼ ID VGð Þ WLVDQINV ;0 VG−ΔVthð Þ

� �−1ð5Þ

where QINV,0(VG) is the inversion charge extracted for the fresh case andΔVth is the real threshold voltage shift. The only difficulty of themethod-ology is to accurately determine ΔVth. To achieve this, a given Vg bias atconstant electrostatic state (i.e., constant charge in the channel) has to beconsidered in the Id-Vg curve and possibly close to Vth. Since Δ VthCCand Δ VthY-function overestimate the threshold voltage shift, leading to anon-physical increase of µ(VG) during stress, an alternative way isproposed.

This point is addressed by considering the curve dLog(Id)/dVg vs Vg,that in practice is SS−1(Vg) [dec/V]. The observation of the curve shapein Fig. 5a allow distinguishing the two transistor regions: weak inver-sion (WI) and strong inversion (SI). Since an exponential increase ofthe mobility close to the SI region can affect the validity of the extrac-tion, Vg has been tracked where SS−1 = SS−1

max × 0.8, that corre-sponds to ϕS ≅ 2ϕB for these devices. Whenever the degradationoccurs, this point (Vg@SS−1

maxx0.8) remains in the same electrostaticstate with a very good approximation: simulating the case with DIT =5 ⋅ 1012cm−2eV−1 the error on ϕS is only 17 mV. This occurs because

a) b)

Fig. 5. Δ Vth acquisition with Method 2: (a) simulation of SS−1(Vg) (case DIT =3 ⋅ 1012cm−2eV−1), and (b) acquisition of Δ Vth from experimental data, the circles indi-cate the estimated Vth (Vg@SS−1

max × 0.8).

ethodology for accurate MOSFET degradation assessment, Microelec-3

2 3 4 5 6 7200

300

400

1 2 3 4 5 6 70

2

4

6

8

10

0,0

0,3

0,6

0,9

1,2

1,5

1,8

[cm2/Vs]

Vg [V]

Idexp

Vg [V]

Qinvmodel

2]

exp

extraction (Fig5)

&

a) b)

μ

Fig. 6. μ(Vg) acquisition with Method 2: from the extracted Qinv(Vg) and the experimen-tal Id(Vg) (a), the μ(Vg) has been calculated (b).

Fig. 8. Comparison between μ(Vg) extracted with TCAD andMethod 2 on the same simu-lated device for different uniform negative interface charges/traps (Nit/Dit). In both casesthe mobility has been extracted from the inversion charge. The Qinv(Vg) considered inTCAD case has been extracted integrating the electron density at the channel center.

4 G. Torrente et al. / Microelectronics Reliability xxx (2015) xxx–xxx

the decay in Fig. 5a between the two plateaus is mainly driven by thefact that ϕS loses the linear dependence with Vg.

As shown in Fig. 5b, the drift of this parameter is thus approximatedas the realΔVth, and then used in Eq. (5) in order to get μ(Vg), as shownin Fig. 6. Thereafter the extraction method aims to separate the ΔVthcomponents due to ΔDIT and ΔQOX by extrapolating the Id-Vg curve to-wards the “midgap current” calculated for fresh case. This technique[17] is based on the assumption that whenever ϕS = ϕB the current isnot sensitive to any amphoteric interface trap, so any drift that is ob-served at this current level is attributed to trapped electrons in thebulk oxide.

In order to validate this procedure, Qinv(Vg) extracted by fitting theexperimental Id-Vg (Fig. 7a) and Qinv(Vg) coming from the integral ofthe Cinv(Vg) (Fig. 7b) for a device whose W = L = 10 μm have beencompared (Fig. 7c). The two curves are in good agreement highlightingthe validity of the procedure for a fresh device.

Similarly, μ(Vg) characteristics calculated by TCAD and estimatedby the proposed extraction procedure, applied on the simulated linearId-Vg, are compared. In the first case Qinv(Vg) has been found by inte-grating the electron density in the center of the channel from the Si/Si02interface to the silicon bulk: QinvðVgÞ≈ q∫∞Si=Si02nð0; y;VgÞdy. In Fig. 8 itis observed that the results are very close not only for the case withoutany defects, but also considering both interface negative charges and

a)

b)

c)

Fig. 7. Comparison between split-CV and Method 2 extractions: (c) confront betweenQinv(Vg) extracted for a fresh device after fitting the Id-Vg, in (a), and the Qinv(Vg)obtained from Cinv(Vg), in (b).

Please cite this article as: G. Torrente, et al., Physically-based extraction mtronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.06.06

amphoteric traps, that clearly highlights that the electrostatic drift iswell caught.

The weaknesses of the extraction procedure proposed in the papermainly lie on the ΔVth assessment. Indeed, the sub-threshold currenthas to be measured: since its magnitudemight be very low, an increaseof the measurement time could be necessary. Contrary, if the trappedelectrons in the oxide quickly relax in the silicon bulk, leading to a Vthrecovery, the measurement time has to be as short as possible. Howev-er, this trade-off can be simply overcome considering a device havingvery large width. Another critic can come from the ΔVTH,ox extractionat themidgap state, since it can be affected bymobility lowering leadingto an overestimation of this parameter. However, it is evident that con-sidering the Id-Vg in Logarithmic scale the extraction is exponentiallymore sensitive to electrostatic than transport drift, which extends thevalidity of the procedure till highly aged device.

5. Results and discussions

The proposed extraction technique has been applied on devices hav-ing experienced HCS (as described in Section 2). In Fig. 9 the resultsconcerning the stress condition Vg= 6 V/Vd= 4 V are shown. Lookingat the electrostatic degradation, Fig. 9a, it is clear that the Vth drift ismainly driven by electrons trapped in the oxide bulk up to tstress~100 ms. Afterwards, the interface traps start to play a role: SS−1 startsto decrease and the total ΔVth becomes higher than the electrostaticshift only due to oxide charges. It is important to notice that for tstress

a) b)

Fig. 9. Application of Method 2 during stress: VgSTRESS = 6 V VdSTRESS = 4 V. (a) Resultsconcerning electrostatic degradation (SS−1 considered is the maximum): each pointcomes from the average of 3 nominal equal devices, error bars are the correspondingdispersions. (b) Results concerning transport: μ(Vg) at different stress time.

ethodology for accurate MOSFET degradation assessment, Microelec-3

3 4 5 6 7 80

100

200

300

400

500

600

700

10-6 10-5 10-4 10-3 10-2 10-1 100 1010,0

0,5

1,0

1,5

2,0

2,5

3,0

3,5

4,0Vth

TOT[V]

tstress

[s]

model Y-Function

modelY-function

no stress t

stress=0.25s

[cm2/Vs]

Vg [V]

a) b)μΔ

Fig. 10. Comparison between the results of the methodology proposed in the paper andthe Y-function ones: a) concerning the threshold voltage drift assessment and b) themobility extracted.

5G. Torrente et al. / Microelectronics Reliability xxx (2015) xxx–xxx

b100 ms the fact that ΔDIT does not play any role on Vth doesn't meanthat they are negligible, since they can be close to the drain side andhave a big impact on the mobility (Fig. 3).

In Fig. 9b the results concerning transport degradation are shown,where it can be seen that μ(Vg) drifts during stress. It is clear fromthese results that the mobility lowering occurs much strongly in theweak inversion as compared to the strong inversion region. This leadsto an increase of the QinvTH necessary to screen the interface chargesand so a drift of μMAX towards higher Vg-Vth.

In Fig. 10a the extracted electrostatic degradations for Y-functionmethod (i.e., Fig. 1c) and for the model proposed in the paper (i.e.,Fig. 9a) are shown and compared. The huge overestimation of ΔVTH

for the first methodology is evident whenever considering high stresstime: it has been estimated up to 3.164 V for tstress = 10 s. This is clearlynot physical even just looking at the drift of the linear Id-Vg character-istics during the stress in Fig. 1a. Due to this bad electrostatic assess-ment, the extracted mobility is not accurate: the μ(Vg) estimated bythe Y-function procedure for high stress time (Fig. 10b) doesn't seemto suffer high degradation.

Results extracted from experimental data have shown how interfacetraps degrade significantly the low field mobility even if their electro-static impact is visible just for high stress time. This occurs becausethey are mainly created close to the drain edge at the beginning andlater, after 100ms, a significant presence near the center of the channelis observed. This delay can be explained by a lower generation rate of in-terface traps, which is a result of lower average electron temperaturewhenever considering regions further from the drain side. This doesn't

4

6

8

10

12

14

16

18

20

4 5 6 7 80

100

200

300

400

500

10-6 10-5 10-4 10-3 10-2 10-1 100 1010,0

0,5

1,0

1,5

2,0

tstress

[s]

VthTOT

[V]Vth

oxide charge [V]

Exp. SS-1 [dec/V] no stress t

stress=4ms

tstress

=60ms t

stress=1s

[cm2/Vs]

Vg [V]

a) b)

ΔΔ

μ

Fig. 11. Application ofMethod 2 during stress: VgSTRESS= 8 V VdSTRESS= 3.6 V. (a) Resultsconcerning electrostatic degradation (SS−1 considered is the maximum): each pointcomes from the average of 3 nominal equal devices, error bars are the correspondingdispersions. (b) Results concerning transport: μ(Vg) at different stress time.

Please cite this article as: G. Torrente, et al., Physically-based extraction mtronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.06.06

mean that the degradation rate at the drain side slows down duringthe stress, since interface traps can be created continuously there with-out having any electrical effect after a certain local concentration.

In Fig. 11 the results concerning the stress condition Vg= 8 V/Vd=3.6 V have been shown. It is worth noting that the Vth drift is mainlydriven by electrons trapped in the oxide bulk up to tstress ~1 ms (tillthis time SS−1 ~const and ΔVthTOT ~ΔVthOX), that means higher agingrate at the channel center than the previous stress condition. Despitethe average electron energy has been doubtless decreased respect to be-fore, especially at the drain side, the degradation rate at channel centerhas been increased thanks to a strong increase of the electron density(mainly driven by Vg).

6. Conclusions

Conventional procedures for parameter extraction applied duringstress for MOSFET devices have been investigated. After havinganalyzed them and underlined the difficulty to correctly separate elec-trostatic and transport degradations occurring in the presence of inter-face charges, a novel technique that successfully addresses this point ispresented and validated.

The experimental results obtained using the proposed methodologyduring Hot Carrier Stress provide deeper insights into the relation be-tween the trap location and its impact on electrostatic and transportdegradations.

References

[1] Y. Taur, T.H. Ning, Fundamental of Modern VLSI Devices, 2nd ed., June 2013.[2] G. Groeseneken, H.E. Maes, N. Beltran, R.F. de Keersmaecker, A reliable approach to

charge-pumping measurements in MOS transistors, IEEE Trans. Electron Devices 31(1) (January 1984) 42–53.

[3] G. Ghibaudo, New method for the extraction of MOSFET parameters, Electron. Lett.24 (9) (April 1988) 543–545.

[4] G. Groeseneken, R. Bellens, G. Van den bosch, H.E. Maes, Hot carrier degradation insubmicrometre MOSFETs: from uniform injection towards the real operatingconditions, Semicond. Sci. Technol. 10 (9) (September 1995) 1208–1220.

[5] M. Cho, P. Roussel, B. Kaczer, R. Degraeve, J. Franco, M. Aoulaiche, et al., Channel hotcarrier degradation mechanism in long/short channel n-FinFETs, IEEE Trans.Electron Devices 60 (12) (December 2013) 4002–4007.

[6] G. Verma, N. Mielke, Reliability performance of ETOX based flash memories, 26thAnnual Proceedings, Reliability Physics 1988, pp. 158–166.

[7] S. Aritome, R. Shirota, G. Hemink, T. Endoh, F. Masuoka, Reliability issues of flashmemory cells, Proc. IEEE 81 (5) (May 1993) 776–788.

[8] S.E. Rauch, G. La Rosa, The energy-driven paradigm of NMOSFET hot-carrier effects,IEEE Trans. Device Mater. Reliab. 5 (4) (December 2005) 701–705.

[9] C. Guérin, V. Huard, A. Bravaix, The energy-driven hot-carrier degradation modes ofnMOSFETs, IEEE Trans. Device Mater. Reliab. 7 (2) (June 2007) 225–235.

[10] R. Woltjer, G. Paulzen, Universal description of hot-carrier induced interface statesin NMOSFETs, International Electron Devices Meeting 1992, pp. 535–538.

[11] G. Van den Bosch, G. Groeseneken, H.E. Maes, On the geometric component ofcharge-pumping current in MOSFET's, IEEE Electron Device Lett. 14 (3) (March1993) 107–109.

[12] C. Lombardi, S. Manzini, A. Saporito, M. Vanzi, A physically based mobility model fornumerical simulation of nonplanar devices, IEEE Trans. Comput. Aided Des. 7 (11)(November 1988) 1164–1171.

[13] Synopsys, Zurich, Switzerland, Sentaurus device user guide, J-2014.09.[14] Y. Nishi, Study of silicon–silicon dioxide structure by electron spin resonance, Jpn. J.

Appl. Phys. 10 (1) (January 1971) 52–62.[15] A. Subirats, X. Garros, J. Mazurier, J. El Husseini, O. Rozeau, G. Reimbold, et al., Impact

of single charge trapping on the variability of ultrascaled planar and trigateFDSOI MOSFETs: experiment versus simulation, IEEE Int. Reliab. Phys. Symp. 60(8) (August 2013) 2604–2610.

[16] C.G. Sodini, T.W. Ekstedt, J.L. Moll, Charge accumulation and mobility in thin dielec-tric MOS transistors, Solid State Electron. 25 (9) (September 1982) 833–841.

[17] P.J. McWhorter, P.S. Winokur, Simple technique for separating the effects of inter-face traps and trapped-oxide charge in metal-oxide-semiconductor transistors,Appl. Phys. Lett. 48 (2) (January 1986) 133–135.

ethodology for accurate MOSFET degradation assessment, Microelec-3