[pll]personalpages.to.infn.it/~cobanogl/cdr/pll_cern_mic-dg.pdf · cp-pll, Ö.Ç., 2007 reminder...

[[PLLPLL]]

Özgür ÇobanoğluUniv. and INFN of Turin

http://www.ph.unito.it/~cobanoglhttp://cern.ch/Ozgur.Cobanoglu

http://www.ph.unito.it/~cobanogl

http://cern.ch/Ozgur.Cobanoglu

CP-PLL, Ö.Ç., 2007

Content

● Short Reminder

● Hand calculations with CaPPeLLo

● Transfer functions, responses, root loci with Octave (Open Source)

● VerilogXL, VerilogA (Cadence) and iVerilog (Open Source) simulations

ChargePump Phase Locked Loop (CPPLL)

> CaPPeLLo Kvco 35.0e9 N 120 Wi 40.0e6 Ksi 1.0 Wn 1.0e6 Icp 10.0e6

FeedBack System Under Consideration in CaPPeLLo : Kp Icp Tau Kvco ++ ++ ++ ++ Wi >| PFD |>| CP |>| LPF |>| VCO |+> Wo +++ ++ ++ ++ | | | | Wo/N ++ N*Wi | +| %N |<+ ++ Low Pass Filter Configuration : ++| LPF | ==> ++++++ | | | | | ++ | C3 | | R | | | | | ++ | | | | C1 | | | | | |

CP-PLL, Ö.Ç., 2007

Reminder 2nd Order Closed Loop Behavior (continuous approximation)

● S-Plane representation (for continuous approx.)

● Convergence is adjusted by means of chosing an appropriate damping factor

RootLocus

During the operation, things change, thus the behavioral parameters

Loop responds differently to a

step for different s-plane

coordinates

Measured & simulated step response

CP-PLL, Ö.Ç., 2007

Reminder 2nd Order Closed Loop Behavior (discrete approximation)

TheoreticalStability Limit

Vctrl excursions should not cause frequency excursions exceeding the input reference clock frequency.

Practically Stable

(high resolution images, zoom in)

CP-PLL, Ö.Ç., 2007

Hand Calculations (for narrow and wide band PLL)

C1 R

BL

Kvco

Ksi

Wn

Icp

Go to Octave Control System Toolbox (OCST) with these parameters to see the closed loop behavior


CP-PLL, Ö.Ç., 2007

Octave Control System Toolbox (for narrow band PLL)

Ksi = 0.707

Ksi = 1.0

# Parameter set for narrowband

wn = 2*pi*100.0e3;ksi= 0.7;R = 321.699127;C = 6926.251465e12;

# Enter the transfer function

num = [(R*C*wn^2) (wn^2)];den = [1 (2*ksi*wn) (wn^2)];T = tf(num, den, 0, "ClkLHC", "ClkPLL/N");

# See what you entered

sysout(T)

# Extract some parameters to cross check

damp(T)

# Do I have a manageble system (Terminology from Control Theory)

is_observable (T)is_controllable (T)is_stabilizable (T)is_detectable (T)is_stable (T)

# Simulate the system

wrange = logspace(log10(0.1),log10(10^10),100);impulse(T, 1, 2*10^5, 1000);step(T, 1, 2*10^5, 1000);bode(T, wrange);rlocus(T);

Ksi is chosen to be 4.67 to keep jitter peaking below 0.1 dB in the final parametrization.


CP-PLL, Ö.Ç., 2007

Octave Control System Toolbox (for wide band PLL)

Ksi = 0.707

Ksi = 1.0

# Parameter set for wideband PLL

wn = 2*pi*1.0e6;ksi= 0.7;R = 3216.991211;C = 69.262520e12;

# Enter the transfer function

num = [(R*C*wn^2) (wn^2)];den = [1 (2*ksi*wn) (wn^2)];T = tf(num, den, 0, "ClkLHC", "ClkPLL/N");


sysout(T)


damp(T)



# Simulate the system

wrange = logspace(log10(0.1),log10(10^10),100);impulse(T, 1, 2*10^6, 1000);step(T, 1, 2*10^6, 1000); bode(T, wrange);rlocus(T);

Ksi is chosen to be 4.67 to keep jitter peaking below 0.1 dB in the final parametrization.


CP-PLL, Ö.Ç., 2007

Parametrization (Programmable PLL via CP current and LPF component values)

# Enter the transfer function #

num = [(R*C*wn^2) (wn^2)];den = [(1/N) (2*Ksi*wn/N) (wn*wn/N)];T = tf(num, den, 0, "ClkLHC", "ClkPLL/N");


sysout(T)


damp(T)



# Simulate the system #

wrange = logspace(log10(0.1),log10(10^10),100);impulse(T, 1, 2*10^6, 1000); figure;step(T, 1, 2*10^6, 1000); figure;bode(T, wrange); figure;rlocus(T, 0.001, 0.0, 1.0); figure;

# Noise performance of the system #

num = [(2*Ksi*wn*N) (N*wn^2)];den = [1 (2*Ksi*wn) (wn^2)];Tref2out = tf(num, den, 0, "LHC_Clock_Noise", "PLL_Output_Noise");bode(Tref2out, wrange); figure;

sysout(T)damp(T)

num = [1 0 0];den = [1 (K) ((Ko*Icp)/(2*pi*N*C))];Tvco2out = tf(num, den, 0, "VCO_Noise", "PLL_Output_Noise");bode(Tvco2out, wrange); figure;

sysout(T)damp(T)

wn = 12.566371e6;N = 120.000000;Ksi = 1.000000;Ko = 219.911484e9;Icp = 19.999999e6;C = 36.940010e12;R = 4308.470215;K = 25132742.000000;Tau = 0.159155e6;KTau2 = 4.000000;WiTau2 = 40.000000;

● Dynamic behavior is programmable via Icp, R, C1, and C3 values

● 16 Parameter sets have been calculated by CaPPeLLo and simulated in Octave to be verified by VerilogAMS for 15 process corners

CaPPeLLo

Last piece of Octave m-file

Parameter Sets

0 CaPPeLLo -Kvco 35.0e9 -N 120 -Wi 40.0e6 -Ksi 1.0 -Wn 500.0e3 -Icp 5.0e-61 CaPPeLLo -Kvco 35.0e9 -N 120 -Wi 40.0e6 -Ksi 1.0 -Wn 1000.0e3 -Icp 5.0e-62 CaPPeLLo -Kvco 35.0e9 -N 120 -Wi 40.0e6 -Ksi 1.0 -Wn 1500.0e3 -Icp 5.0e-63 CaPPeLLo -Kvco 35.0e9 -N 120 -Wi 40.0e6 -Ksi 1.0 -Wn 2000.0e3 -Icp 5.0e-64 CaPPeLLo -Kvco 35.0e9 -N 120 -Wi 40.0e6 -Ksi 1.0 -Wn 500.0e3 -Icp 10.0e-65 CaPPeLLo -Kvco 35.0e9 -N 120 -Wi 40.0e6 -Ksi 1.0 -Wn 1000.0e3 -Icp 10.0e-66 CaPPeLLo -Kvco 35.0e9 -N 120 -Wi 40.0e6 -Ksi 1.0 -Wn 1500.0e3 -Icp 10.0e-67 CaPPeLLo -Kvco 35.0e9 -N 120 -Wi 40.0e6 -Ksi 1.0 -Wn 2000.0e3 -Icp 10.0e-68 CaPPeLLo -Kvco 35.0e9 -N 120 -Wi 40.0e6 -Ksi 1.0 -Wn 500.0e3 -Icp 15.0e-69 CaPPeLLo -Kvco 35.0e9 -N 120 -Wi 40.0e6 -Ksi 1.0 -Wn 1000.0e3 -Icp 15.0e-610 CaPPeLLo -Kvco 35.0e9 -N 120 -Wi 40.0e6 -Ksi 1.0 -Wn 1500.0e3 -Icp 15.0e-611 CaPPeLLo -Kvco 35.0e9 -N 120 -Wi 40.0e6 -Ksi 1.0 -Wn 2000.0e3 -Icp 15.0e-612 CaPPeLLo -Kvco 35.0e9 -N 120 -Wi 40.0e6 -Ksi 1.0 -Wn 500.0e3 -Icp 20.0e-613 CaPPeLLo -Kvco 35.0e9 -N 120 -Wi 40.0e6 -Ksi 1.0 -Wn 1000.0e3 -Icp 20.0e-614 CaPPeLLo -Kvco 35.0e9 -N 120 -Wi 40.0e6 -Ksi 1.0 -Wn 1500.0e3 -Icp 20.0e-615 CaPPeLLo -Kvco 35.0e9 -N 120 -Wi 40.0e6 -Ksi 1.0 -Wn 2000.0e3 -Icp 20.0e-6

Process Corners

0 1_m20_1321 1_125_1082 1_25_1203 2_m20_1324 2_125_1085 2_25_1206 3_m20_1327 3_125_1088 3_25_1209 4_m20_13210 4_125_10811 4_25_12012 5_m20_13213 5_125_10814 5_25_120

x16

CP-PLL, Ö.Ç., 2007

Parametrization (Programmable PLL via CP current and LPF component values)

VCO Noise to PLL output noise & Ref. Noise to PLL output noise

transfer functions plotted

These transfer functions must be verified by VerilogAMS simulations

Parameter sets define a practically stable loop

VCO->Out

Ref.->Out

Noise Transfer Functions (two overlapped)


CP-PLL, Ö.Ç., 2007

Simulations iVerilog (open), VerilogXL & VerilogA (Cadence)) Kp Icp Tau Kvco ++ ++ ++ ++ Wi >| PFD |>| CP |>| LPF |>| VCO |+> Wo +++ ++ ++ ++ | | | | Wo/N ++ N*Wi | +| %N |<+ ++

I use these only in VerilogA

ProbeHigh

ProbeLow

● LHC Reference Clk is generated by a 4.8GHz Clk followed by a %120 which leads to two different probes : high and low

● The aim is phase locking at high

● Waveform is “better” in VerilogA as it is not “square”

● More flexible as standard lib for lumped components and trigonometric functions exist

● Simulations are coherent with the design expectations

Vctrl

Clocks

CP-PLL, Ö.Ç., 2007

Simulations (iVerilog (open), VerilogXL & VerilogA (Cadence)) Kp Icp Tau Kvco ++ ++ ++ ++ Wi >| PFD |>| CP |>| LPF |>| VCO |+> Wo +++ ++ ++ ++ | | | | Wo/N ++ N*Wi | +| %N |<+ ++

Red : VCO periodBlack : Ideal VCO periodGreen : Phase error (probe high)Blue : VCO Duty cycle errorYellow : Ideal duty cycle error

Reference moved from 40MHz to 36MHz)

Phase lock is lost

● Very noisy VCO + very noisy reference

● Initially not locked

● Reference frequency step of 10% some time after locking

● Low bandwidth CP-PLL filters out the noise at the reference input (i.e. slow loop)

● Effect of damping factor for 0.3 and 1.0

Red : Period of VCO+%NBlack : Reference period with 200ps (p-p) jitter

[fs]


CP-PLL, Ö.Ç., 2007

Simulations (iVerilog (open), VerilogXL & VerilogA (Cadence)) Kp Icp Tau Kvco ++ ++ ++ ++ Wi >| PFD |>| CP |>| LPF |>| VCO |+> Wo +++ ++ ++ ++ | | | | Wo/N ++ N*Wi | +| %N |<+ ++

Vctrl

Phase Error @Inputs of the PFD

Phase Error @Output of the PLL

Stable condition (lockedstate) statistics to be extracted (jitter treatment).

[[Jitter TreatmentJitter Treatment]]

CP-PLL, Ö.Ç., 2007

CPPLL Simulation Setup (VerilogA)

There are 4 setups similar to this one :1 – VCO white jitter only2 – Reference white jitter only3 – Reference sin jitter only (to verify the jitter transfer function)4 – Reference and VCO white jitter together

Models CP leakage

Low Pass Filter

Probes

Probe

Probe

4.8GHz Clock Gen.

Jittered and no-jitter dividers

Jittered and no-jitter VCOs


CP-PLL, Ö.Ç., 2007

Jitter Transfer (VerilogA, no VCO noise)

Introduced input jitter (1MHz sin wave) compared

to ideal as a function of simulation time; the

histogram form.

Instant period values @ the output of %N; the histogram

form

Instant period values @ the output of PLL; the histogram

form

Kp Icp Tau Kvco ++ ++ ++ ++ Wi >| PFD |>| CP |>| LPF |>| VCO |+> Wo +++ ++ ++ ++ | | | | Wo/N ++ N*Wi | +| %N |<+ ++

During the simulations, instant periods and errors (with respect to ideal) of signals were dumped to local files to be processed by Octave m-files.


CP-PLL, Ö.Ç., 2007

Jitter Transfer/Peaking (VerilogA)

A

B

C

Kp Icp Tau Kvco ++ ++ ++ ++ Wi >| PFD |>| CP |>| LPF |>| VCO |+> Wo +++ ++ ++ ++ | | | | Wo/N ++ N*Wi | +| %N |<+ ++

T=PLL−c2c− JitterRef−c2c− Jitter

JS=Local−c2c− JitterRef−c2c− Jitter

0.0043 0.433 A0.0067 0.84 B0.0003 0.04 C

Jitter Freq.

● Three simulations where sin shaped input reference jitter were introduced (no VCO noise)

● at 100kHz, 1MHz (Wn of the PLL) and 10MHz

Confirming the transfer function andno jitter peaking (less then 0.1dB by design).

JS = JS = red red / / blackblack

CP-PLL, Ö.Ç., 2007

White Jitter (VerilogA) Kp Icp Tau Kvco ++ ++ ++ ++ Wi >| PFD |>| CP |>| LPF |>| VCO |+> Wo +++ ++ ++ ++ | | | | Wo/N ++ N*Wi | +| %N |<+ ++

● Simulations for white input reference jitter were performed (no VCO noise)

Input jitter %N Jitter PLL output Jitter


CP-PLL, Ö.Ç., 2007

White Jitter (VerilogA) Kp Icp Tau Kvco ++ ++ ++ ++ Wi >| PFD |>| CP |>| LPF |>| VCO |+> Wo +++ ++ ++ ++ | | | | Wo/N ++ N*Wi | +| %N |<+ ++


● For Wn of PLL : 500kHz, 1MHz and 1.5MHz



0.00025 0.049 500kHz (Narrowerband)0.0013 0.207 1MHz (Middleband)0.0034 0.53 1.5MHz (Widerband)

Wn Behavior

Confirming the transfer function andno jitter peaking (less then 0.1dB by design).

500kHz 1MHz 1.5MHz

JS = JS = red red / / blackblack

CP-PLL, Ö.Ç., 2007

Jitter Suppression Plots (VerilogA)


● For Wn of PLL : 500kHz, 1MHz and 1.5MHz

● As the bandwidth increases, reference jitter suppression gets worse but VCO noise suppression is expected to get better

Incre

asin

g b

an

dw

idth

Incre

asin

g b

an

dw

idth



0.00025 0.049 500kHz0.0013 0.207 1MHz0.0034 0.53 1.5MHz

Wn


CP-PLL, Ö.Ç., 2007

VCO White Jitter (VerilogA)

The jitter introducedintroduced at the

output of the VCO; the

histogram form

The jitter observedobserved at output of the PLL; the histogram form.

● Accumulating VCO jitter simulation time of 13µs

● Simulation step size of 200fs

● Total real simulation time of more than 20 hours

● Lock completes within a few µs

● Last 3µs is saved

● Introduced jitter is calculated as the difference between an ideal VCO and the jittered one

● Observed jitter is plotted as the distribution of instant PLL output periods

Kp Icp Tau JitteredJittered ++ ++ ++ ++ Wi >| PFD |>| CP |>| LPF |>| VCO |+> Wo_jittered +++ ++ ++ | ++ | | | | | | Ideal Ideal | | | ++ | | +>| VCO ||> Wo_ideal | ++ | | | | Wo/N ++ N*Wi | +| %N |<+ ++

<------------- 22ps ------------>

<------------- 3ps ------------>


[[CodesCodes]]

CP-PLL, Ö.Ç., 2007

Codes #1 (CaPPeLLo and Octave mfiles)

● CaPPeLLo.cxx is the code which corresponds to my hand calculations.

● Run CaPPeLLo for each parameter set to have the required loop parameters for evaluating the closed loop behavior within Octave

16 Parameter sets to be considered

Core calculator functionOctave m-file simulating the PLL for 16 parameter sets (beginning)

Octave m-file simulating the PLL for 16 parameter sets (end)

● Run the above m-file for 16 parameter sets to produce the root loci, and bode plots, impulse and step responses of the transfer functions


CP-PLL, Ö.Ç., 2007

1 Pole

Pole and zeroalmost overlapped(ksi=4.67, loop over damped)

Final Behavioral Plots (Output of Octave)Transfer function Root Locus, continuous approximation (s-plane)

High resolution image, zoom in

Octave output

CP-PLL, Ö.Ç., 2007

Final Behavioral Plots (Output of Octave)Transfer function Bode plots

CP-PLL, Ö.Ç., 2007

Final Behavioral Plots (Output of Octave)Transfer function Impulse response

CP-PLL, Ö.Ç., 2007

Final Behavioral Plots (Output of Octave)Transfer function over damped step response

CP-PLL, Ö.Ç., 2007

Final Behavioral Plots (Output of Octave)Ref. noise transfer function

CP-PLL, Ö.Ç., 2007

Final Behavioral Plots (Output of Octave)VCO noise transfer function

CP-PLL, Ö.Ç., 2007

Codes #2 (Octave mfiles)

● Simulation results (one dimensional data files or vectors of instant period for locked state) are evaluated with the following m-files (high resolution images, zoom in) :

● These are the m-files to calculate the statistics, plot the the periods of interest as a function of simulation time (also in histogram form) as seen below :

Statistics :

Center = 2.08333538e-101/Center = 4.79999528e+09Sigma_abs = 1.87044613e-13Sigma_rel = 0.0897813257%Max dT = 0.27241816%Absolute Jitter = 1.91269e-16Cycle-to-cycle Jitter = 2.70e-18

[[Adjustment LimitsAdjustment Limits]]

CP-PLL, Ö.Ç., 2007

Parameters at the Extremes

There are 8 possible extremes, min and max values for Icp (1-20µA), R (2K5-37K5) and C (14-434pF).

[Wn]=Hz

wn = 7.2644e+05 wn = 1.3047e+05ksi = 0.079876 ksi = 0.44473ktau = 0.025521 ktau = 0.79114wtau = 8.7965 wtau = 272.69




● In the next page, the “operating points” via a little bit overloaded plot and comparison to the stability limits will be presented.

● And in the pages following the next one, behavioral plots will be presented.

● All the plot scales will be the same for a fast comparison.

● These parameter corners have not been simulated, but only calculated.

CP-PLL, Ö.Ç., 2007S

imu

late

d

All simulations showed stable loop dynamics even for operating points above the red curve !!

Concluding that the loop can not

be treated purely as digital

PartlySimulated

Not all the settable parameters guarantee stability !!

CP-PLL, Ö.Ç., 2007

1st Adjustment Limit (Octave Control System Toolbox)

CP-PLL, Ö.Ç., 2007

2nd Adjustment Limit (Octave Control System Toolbox)

CP-PLL, Ö.Ç., 2007

3rd Adjustment Limit (Octave Control System Toolbox)

CP-PLL, Ö.Ç., 2007

4th Adjustment Limit (Octave Control System Toolbox)

CP-PLL, Ö.Ç., 2007


[pll]personalpages.to.infn.it/~cobanogl/cdr/pll_cern_mic-dg.pdf · cp-pll, Ö.Ç., 2007 reminder...

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